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6
7
8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10#include <linux/types.h>
11#include <linux/bitops.h>
12#include <linux/module.h>
13#include <linux/pci.h>
14#include <linux/netdevice.h>
15#include <linux/vmalloc.h>
16#include <linux/string.h>
17#include <linux/in.h>
18#include <linux/ip.h>
19#include <linux/tcp.h>
20#include <linux/sctp.h>
21#include <linux/ipv6.h>
22#include <linux/slab.h>
23#include <net/checksum.h>
24#include <net/ip6_checksum.h>
25#include <linux/ethtool.h>
26#include <linux/if.h>
27#include <linux/if_vlan.h>
28#include <linux/prefetch.h>
29#include <net/mpls.h>
30#include <linux/bpf.h>
31#include <linux/bpf_trace.h>
32#include <linux/atomic.h>
33#include <net/xfrm.h>
34
35#include "ixgbevf.h"
36
37const char ixgbevf_driver_name[] = "ixgbevf";
38static const char ixgbevf_driver_string[] =
39 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
40
41#define DRV_VERSION "4.1.0-k"
42const char ixgbevf_driver_version[] = DRV_VERSION;
43static char ixgbevf_copyright[] =
44 "Copyright (c) 2009 - 2018 Intel Corporation.";
45
46static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
47 [board_82599_vf] = &ixgbevf_82599_vf_info,
48 [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info,
49 [board_X540_vf] = &ixgbevf_X540_vf_info,
50 [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info,
51 [board_X550_vf] = &ixgbevf_X550_vf_info,
52 [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info,
53 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
54 [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info,
55 [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info,
56};
57
58
59
60
61
62
63
64
65
66static const struct pci_device_id ixgbevf_pci_tbl[] = {
67 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
68 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv },
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv },
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
72 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv },
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
74 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },
76
77 {0, }
78};
79MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
80
81MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
82MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
83MODULE_LICENSE("GPL v2");
84MODULE_VERSION(DRV_VERSION);
85
86#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
87static int debug = -1;
88module_param(debug, int, 0);
89MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
90
91static struct workqueue_struct *ixgbevf_wq;
92
93static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
94{
95 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
96 !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
97 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
98 queue_work(ixgbevf_wq, &adapter->service_task);
99}
100
101static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
102{
103 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
104
105
106 smp_mb__before_atomic();
107 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
108}
109
110
111static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
112static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
113static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
114static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer);
115static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
116 struct ixgbevf_rx_buffer *old_buff);
117
118static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
119{
120 struct ixgbevf_adapter *adapter = hw->back;
121
122 if (!hw->hw_addr)
123 return;
124 hw->hw_addr = NULL;
125 dev_err(&adapter->pdev->dev, "Adapter removed\n");
126 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
127 ixgbevf_service_event_schedule(adapter);
128}
129
130static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
131{
132 u32 value;
133
134
135
136
137
138
139
140 if (reg == IXGBE_VFSTATUS) {
141 ixgbevf_remove_adapter(hw);
142 return;
143 }
144 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
145 if (value == IXGBE_FAILED_READ_REG)
146 ixgbevf_remove_adapter(hw);
147}
148
149u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
150{
151 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
152 u32 value;
153
154 if (IXGBE_REMOVED(reg_addr))
155 return IXGBE_FAILED_READ_REG;
156 value = readl(reg_addr + reg);
157 if (unlikely(value == IXGBE_FAILED_READ_REG))
158 ixgbevf_check_remove(hw, reg);
159 return value;
160}
161
162
163
164
165
166
167
168
169static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
170 u8 queue, u8 msix_vector)
171{
172 u32 ivar, index;
173 struct ixgbe_hw *hw = &adapter->hw;
174
175 if (direction == -1) {
176
177 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
178 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
179 ivar &= ~0xFF;
180 ivar |= msix_vector;
181 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
182 } else {
183
184 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
185 index = ((16 * (queue & 1)) + (8 * direction));
186 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
187 ivar &= ~(0xFF << index);
188 ivar |= (msix_vector << index);
189 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
190 }
191}
192
193static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
194{
195 return ring->stats.packets;
196}
197
198static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
199{
200 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
201 struct ixgbe_hw *hw = &adapter->hw;
202
203 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
204 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
205
206 if (head != tail)
207 return (head < tail) ?
208 tail - head : (tail + ring->count - head);
209
210 return 0;
211}
212
213static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
214{
215 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
216 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
217 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
218
219 clear_check_for_tx_hang(tx_ring);
220
221
222
223
224
225
226 if ((tx_done_old == tx_done) && tx_pending) {
227
228 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
229 &tx_ring->state);
230 }
231
232 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
233
234
235 tx_ring->tx_stats.tx_done_old = tx_done;
236
237 return false;
238}
239
240static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
241{
242
243 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
244 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
245 ixgbevf_service_event_schedule(adapter);
246 }
247}
248
249
250
251
252
253static void ixgbevf_tx_timeout(struct net_device *netdev, unsigned int txqueue)
254{
255 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
256
257 ixgbevf_tx_timeout_reset(adapter);
258}
259
260
261
262
263
264
265
266static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
267 struct ixgbevf_ring *tx_ring, int napi_budget)
268{
269 struct ixgbevf_adapter *adapter = q_vector->adapter;
270 struct ixgbevf_tx_buffer *tx_buffer;
271 union ixgbe_adv_tx_desc *tx_desc;
272 unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
273 unsigned int budget = tx_ring->count / 2;
274 unsigned int i = tx_ring->next_to_clean;
275
276 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
277 return true;
278
279 tx_buffer = &tx_ring->tx_buffer_info[i];
280 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
281 i -= tx_ring->count;
282
283 do {
284 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
285
286
287 if (!eop_desc)
288 break;
289
290
291 smp_rmb();
292
293
294 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
295 break;
296
297
298 tx_buffer->next_to_watch = NULL;
299
300
301 total_bytes += tx_buffer->bytecount;
302 total_packets += tx_buffer->gso_segs;
303 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
304 total_ipsec++;
305
306
307 if (ring_is_xdp(tx_ring))
308 page_frag_free(tx_buffer->data);
309 else
310 napi_consume_skb(tx_buffer->skb, napi_budget);
311
312
313 dma_unmap_single(tx_ring->dev,
314 dma_unmap_addr(tx_buffer, dma),
315 dma_unmap_len(tx_buffer, len),
316 DMA_TO_DEVICE);
317
318
319 dma_unmap_len_set(tx_buffer, len, 0);
320
321
322 while (tx_desc != eop_desc) {
323 tx_buffer++;
324 tx_desc++;
325 i++;
326 if (unlikely(!i)) {
327 i -= tx_ring->count;
328 tx_buffer = tx_ring->tx_buffer_info;
329 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
330 }
331
332
333 if (dma_unmap_len(tx_buffer, len)) {
334 dma_unmap_page(tx_ring->dev,
335 dma_unmap_addr(tx_buffer, dma),
336 dma_unmap_len(tx_buffer, len),
337 DMA_TO_DEVICE);
338 dma_unmap_len_set(tx_buffer, len, 0);
339 }
340 }
341
342
343 tx_buffer++;
344 tx_desc++;
345 i++;
346 if (unlikely(!i)) {
347 i -= tx_ring->count;
348 tx_buffer = tx_ring->tx_buffer_info;
349 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
350 }
351
352
353 prefetch(tx_desc);
354
355
356 budget--;
357 } while (likely(budget));
358
359 i += tx_ring->count;
360 tx_ring->next_to_clean = i;
361 u64_stats_update_begin(&tx_ring->syncp);
362 tx_ring->stats.bytes += total_bytes;
363 tx_ring->stats.packets += total_packets;
364 u64_stats_update_end(&tx_ring->syncp);
365 q_vector->tx.total_bytes += total_bytes;
366 q_vector->tx.total_packets += total_packets;
367 adapter->tx_ipsec += total_ipsec;
368
369 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
370 struct ixgbe_hw *hw = &adapter->hw;
371 union ixgbe_adv_tx_desc *eop_desc;
372
373 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
374
375 pr_err("Detected Tx Unit Hang%s\n"
376 " Tx Queue <%d>\n"
377 " TDH, TDT <%x>, <%x>\n"
378 " next_to_use <%x>\n"
379 " next_to_clean <%x>\n"
380 "tx_buffer_info[next_to_clean]\n"
381 " next_to_watch <%p>\n"
382 " eop_desc->wb.status <%x>\n"
383 " time_stamp <%lx>\n"
384 " jiffies <%lx>\n",
385 ring_is_xdp(tx_ring) ? " XDP" : "",
386 tx_ring->queue_index,
387 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
388 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
389 tx_ring->next_to_use, i,
390 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
391 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
392
393 if (!ring_is_xdp(tx_ring))
394 netif_stop_subqueue(tx_ring->netdev,
395 tx_ring->queue_index);
396
397
398 ixgbevf_tx_timeout_reset(adapter);
399
400 return true;
401 }
402
403 if (ring_is_xdp(tx_ring))
404 return !!budget;
405
406#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
407 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
408 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
409
410
411
412 smp_mb();
413
414 if (__netif_subqueue_stopped(tx_ring->netdev,
415 tx_ring->queue_index) &&
416 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
417 netif_wake_subqueue(tx_ring->netdev,
418 tx_ring->queue_index);
419 ++tx_ring->tx_stats.restart_queue;
420 }
421 }
422
423 return !!budget;
424}
425
426
427
428
429
430
431static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
432 struct sk_buff *skb)
433{
434 napi_gro_receive(&q_vector->napi, skb);
435}
436
437#define IXGBE_RSS_L4_TYPES_MASK \
438 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
439 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
440 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
441 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
442
443static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
444 union ixgbe_adv_rx_desc *rx_desc,
445 struct sk_buff *skb)
446{
447 u16 rss_type;
448
449 if (!(ring->netdev->features & NETIF_F_RXHASH))
450 return;
451
452 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
453 IXGBE_RXDADV_RSSTYPE_MASK;
454
455 if (!rss_type)
456 return;
457
458 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
459 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
460 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
461}
462
463
464
465
466
467
468
469static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
470 union ixgbe_adv_rx_desc *rx_desc,
471 struct sk_buff *skb)
472{
473 skb_checksum_none_assert(skb);
474
475
476 if (!(ring->netdev->features & NETIF_F_RXCSUM))
477 return;
478
479
480 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
481 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
482 ring->rx_stats.csum_err++;
483 return;
484 }
485
486 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
487 return;
488
489 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
490 ring->rx_stats.csum_err++;
491 return;
492 }
493
494
495 skb->ip_summed = CHECKSUM_UNNECESSARY;
496}
497
498
499
500
501
502
503
504
505
506
507
508static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
509 union ixgbe_adv_rx_desc *rx_desc,
510 struct sk_buff *skb)
511{
512 ixgbevf_rx_hash(rx_ring, rx_desc, skb);
513 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
514
515 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
516 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
517 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
518
519 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
520 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
521 }
522
523 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
524 ixgbevf_ipsec_rx(rx_ring, rx_desc, skb);
525
526 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
527}
528
529static
530struct ixgbevf_rx_buffer *ixgbevf_get_rx_buffer(struct ixgbevf_ring *rx_ring,
531 const unsigned int size)
532{
533 struct ixgbevf_rx_buffer *rx_buffer;
534
535 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
536 prefetchw(rx_buffer->page);
537
538
539 dma_sync_single_range_for_cpu(rx_ring->dev,
540 rx_buffer->dma,
541 rx_buffer->page_offset,
542 size,
543 DMA_FROM_DEVICE);
544
545 rx_buffer->pagecnt_bias--;
546
547 return rx_buffer;
548}
549
550static void ixgbevf_put_rx_buffer(struct ixgbevf_ring *rx_ring,
551 struct ixgbevf_rx_buffer *rx_buffer,
552 struct sk_buff *skb)
553{
554 if (ixgbevf_can_reuse_rx_page(rx_buffer)) {
555
556 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
557 } else {
558 if (IS_ERR(skb))
559
560
561
562 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
563 ixgbevf_rx_pg_size(rx_ring),
564 DMA_FROM_DEVICE,
565 IXGBEVF_RX_DMA_ATTR);
566 __page_frag_cache_drain(rx_buffer->page,
567 rx_buffer->pagecnt_bias);
568 }
569
570
571 rx_buffer->page = NULL;
572}
573
574
575
576
577
578
579
580
581
582
583
584static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
585 union ixgbe_adv_rx_desc *rx_desc)
586{
587 u32 ntc = rx_ring->next_to_clean + 1;
588
589
590 ntc = (ntc < rx_ring->count) ? ntc : 0;
591 rx_ring->next_to_clean = ntc;
592
593 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
594
595 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
596 return false;
597
598 return true;
599}
600
601static inline unsigned int ixgbevf_rx_offset(struct ixgbevf_ring *rx_ring)
602{
603 return ring_uses_build_skb(rx_ring) ? IXGBEVF_SKB_PAD : 0;
604}
605
606static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
607 struct ixgbevf_rx_buffer *bi)
608{
609 struct page *page = bi->page;
610 dma_addr_t dma;
611
612
613 if (likely(page))
614 return true;
615
616
617 page = dev_alloc_pages(ixgbevf_rx_pg_order(rx_ring));
618 if (unlikely(!page)) {
619 rx_ring->rx_stats.alloc_rx_page_failed++;
620 return false;
621 }
622
623
624 dma = dma_map_page_attrs(rx_ring->dev, page, 0,
625 ixgbevf_rx_pg_size(rx_ring),
626 DMA_FROM_DEVICE, IXGBEVF_RX_DMA_ATTR);
627
628
629
630
631 if (dma_mapping_error(rx_ring->dev, dma)) {
632 __free_pages(page, ixgbevf_rx_pg_order(rx_ring));
633
634 rx_ring->rx_stats.alloc_rx_page_failed++;
635 return false;
636 }
637
638 bi->dma = dma;
639 bi->page = page;
640 bi->page_offset = ixgbevf_rx_offset(rx_ring);
641 bi->pagecnt_bias = 1;
642 rx_ring->rx_stats.alloc_rx_page++;
643
644 return true;
645}
646
647
648
649
650
651
652static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
653 u16 cleaned_count)
654{
655 union ixgbe_adv_rx_desc *rx_desc;
656 struct ixgbevf_rx_buffer *bi;
657 unsigned int i = rx_ring->next_to_use;
658
659
660 if (!cleaned_count || !rx_ring->netdev)
661 return;
662
663 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
664 bi = &rx_ring->rx_buffer_info[i];
665 i -= rx_ring->count;
666
667 do {
668 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
669 break;
670
671
672 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
673 bi->page_offset,
674 ixgbevf_rx_bufsz(rx_ring),
675 DMA_FROM_DEVICE);
676
677
678
679
680 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
681
682 rx_desc++;
683 bi++;
684 i++;
685 if (unlikely(!i)) {
686 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
687 bi = rx_ring->rx_buffer_info;
688 i -= rx_ring->count;
689 }
690
691
692 rx_desc->wb.upper.length = 0;
693
694 cleaned_count--;
695 } while (cleaned_count);
696
697 i += rx_ring->count;
698
699 if (rx_ring->next_to_use != i) {
700
701 rx_ring->next_to_use = i;
702
703
704 rx_ring->next_to_alloc = i;
705
706
707
708
709
710
711 wmb();
712 ixgbevf_write_tail(rx_ring, i);
713 }
714}
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
735 union ixgbe_adv_rx_desc *rx_desc,
736 struct sk_buff *skb)
737{
738
739 if (IS_ERR(skb))
740 return true;
741
742
743 if (unlikely(ixgbevf_test_staterr(rx_desc,
744 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
745 struct net_device *netdev = rx_ring->netdev;
746
747 if (!(netdev->features & NETIF_F_RXALL)) {
748 dev_kfree_skb_any(skb);
749 return true;
750 }
751 }
752
753
754 if (eth_skb_pad(skb))
755 return true;
756
757 return false;
758}
759
760
761
762
763
764
765
766
767static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
768 struct ixgbevf_rx_buffer *old_buff)
769{
770 struct ixgbevf_rx_buffer *new_buff;
771 u16 nta = rx_ring->next_to_alloc;
772
773 new_buff = &rx_ring->rx_buffer_info[nta];
774
775
776 nta++;
777 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
778
779
780 new_buff->page = old_buff->page;
781 new_buff->dma = old_buff->dma;
782 new_buff->page_offset = old_buff->page_offset;
783 new_buff->pagecnt_bias = old_buff->pagecnt_bias;
784}
785
786static inline bool ixgbevf_page_is_reserved(struct page *page)
787{
788 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
789}
790
791static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer)
792{
793 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
794 struct page *page = rx_buffer->page;
795
796
797 if (unlikely(ixgbevf_page_is_reserved(page)))
798 return false;
799
800#if (PAGE_SIZE < 8192)
801
802 if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
803 return false;
804#else
805#define IXGBEVF_LAST_OFFSET \
806 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBEVF_RXBUFFER_2048)
807
808 if (rx_buffer->page_offset > IXGBEVF_LAST_OFFSET)
809 return false;
810
811#endif
812
813
814
815
816
817 if (unlikely(!pagecnt_bias)) {
818 page_ref_add(page, USHRT_MAX);
819 rx_buffer->pagecnt_bias = USHRT_MAX;
820 }
821
822 return true;
823}
824
825
826
827
828
829
830
831
832
833
834static void ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
835 struct ixgbevf_rx_buffer *rx_buffer,
836 struct sk_buff *skb,
837 unsigned int size)
838{
839#if (PAGE_SIZE < 8192)
840 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
841#else
842 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
843 SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
844 SKB_DATA_ALIGN(size);
845#endif
846 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
847 rx_buffer->page_offset, size, truesize);
848#if (PAGE_SIZE < 8192)
849 rx_buffer->page_offset ^= truesize;
850#else
851 rx_buffer->page_offset += truesize;
852#endif
853}
854
855static
856struct sk_buff *ixgbevf_construct_skb(struct ixgbevf_ring *rx_ring,
857 struct ixgbevf_rx_buffer *rx_buffer,
858 struct xdp_buff *xdp,
859 union ixgbe_adv_rx_desc *rx_desc)
860{
861 unsigned int size = xdp->data_end - xdp->data;
862#if (PAGE_SIZE < 8192)
863 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
864#else
865 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
866 xdp->data_hard_start);
867#endif
868 unsigned int headlen;
869 struct sk_buff *skb;
870
871
872 prefetch(xdp->data);
873#if L1_CACHE_BYTES < 128
874 prefetch(xdp->data + L1_CACHE_BYTES);
875#endif
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBEVF_RX_HDR_SIZE);
893 if (unlikely(!skb))
894 return NULL;
895
896
897 headlen = size;
898 if (headlen > IXGBEVF_RX_HDR_SIZE)
899 headlen = eth_get_headlen(skb->dev, xdp->data,
900 IXGBEVF_RX_HDR_SIZE);
901
902
903 memcpy(__skb_put(skb, headlen), xdp->data,
904 ALIGN(headlen, sizeof(long)));
905
906
907 size -= headlen;
908 if (size) {
909 skb_add_rx_frag(skb, 0, rx_buffer->page,
910 (xdp->data + headlen) -
911 page_address(rx_buffer->page),
912 size, truesize);
913#if (PAGE_SIZE < 8192)
914 rx_buffer->page_offset ^= truesize;
915#else
916 rx_buffer->page_offset += truesize;
917#endif
918 } else {
919 rx_buffer->pagecnt_bias++;
920 }
921
922 return skb;
923}
924
925static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
926 u32 qmask)
927{
928 struct ixgbe_hw *hw = &adapter->hw;
929
930 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
931}
932
933static struct sk_buff *ixgbevf_build_skb(struct ixgbevf_ring *rx_ring,
934 struct ixgbevf_rx_buffer *rx_buffer,
935 struct xdp_buff *xdp,
936 union ixgbe_adv_rx_desc *rx_desc)
937{
938 unsigned int metasize = xdp->data - xdp->data_meta;
939#if (PAGE_SIZE < 8192)
940 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
941#else
942 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
943 SKB_DATA_ALIGN(xdp->data_end -
944 xdp->data_hard_start);
945#endif
946 struct sk_buff *skb;
947
948
949
950
951
952
953 prefetch(xdp->data_meta);
954#if L1_CACHE_BYTES < 128
955 prefetch(xdp->data_meta + L1_CACHE_BYTES);
956#endif
957
958
959 skb = build_skb(xdp->data_hard_start, truesize);
960 if (unlikely(!skb))
961 return NULL;
962
963
964 skb_reserve(skb, xdp->data - xdp->data_hard_start);
965 __skb_put(skb, xdp->data_end - xdp->data);
966 if (metasize)
967 skb_metadata_set(skb, metasize);
968
969
970#if (PAGE_SIZE < 8192)
971 rx_buffer->page_offset ^= truesize;
972#else
973 rx_buffer->page_offset += truesize;
974#endif
975
976 return skb;
977}
978
979#define IXGBEVF_XDP_PASS 0
980#define IXGBEVF_XDP_CONSUMED 1
981#define IXGBEVF_XDP_TX 2
982
983static int ixgbevf_xmit_xdp_ring(struct ixgbevf_ring *ring,
984 struct xdp_buff *xdp)
985{
986 struct ixgbevf_tx_buffer *tx_buffer;
987 union ixgbe_adv_tx_desc *tx_desc;
988 u32 len, cmd_type;
989 dma_addr_t dma;
990 u16 i;
991
992 len = xdp->data_end - xdp->data;
993
994 if (unlikely(!ixgbevf_desc_unused(ring)))
995 return IXGBEVF_XDP_CONSUMED;
996
997 dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
998 if (dma_mapping_error(ring->dev, dma))
999 return IXGBEVF_XDP_CONSUMED;
1000
1001
1002 i = ring->next_to_use;
1003 tx_buffer = &ring->tx_buffer_info[i];
1004
1005 dma_unmap_len_set(tx_buffer, len, len);
1006 dma_unmap_addr_set(tx_buffer, dma, dma);
1007 tx_buffer->data = xdp->data;
1008 tx_buffer->bytecount = len;
1009 tx_buffer->gso_segs = 1;
1010 tx_buffer->protocol = 0;
1011
1012
1013
1014
1015 if (!test_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state)) {
1016 struct ixgbe_adv_tx_context_desc *context_desc;
1017
1018 set_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
1019
1020 context_desc = IXGBEVF_TX_CTXTDESC(ring, 0);
1021 context_desc->vlan_macip_lens =
1022 cpu_to_le32(ETH_HLEN << IXGBE_ADVTXD_MACLEN_SHIFT);
1023 context_desc->fceof_saidx = 0;
1024 context_desc->type_tucmd_mlhl =
1025 cpu_to_le32(IXGBE_TXD_CMD_DEXT |
1026 IXGBE_ADVTXD_DTYP_CTXT);
1027 context_desc->mss_l4len_idx = 0;
1028
1029 i = 1;
1030 }
1031
1032
1033 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
1034 IXGBE_ADVTXD_DCMD_DEXT |
1035 IXGBE_ADVTXD_DCMD_IFCS;
1036 cmd_type |= len | IXGBE_TXD_CMD;
1037
1038 tx_desc = IXGBEVF_TX_DESC(ring, i);
1039 tx_desc->read.buffer_addr = cpu_to_le64(dma);
1040
1041 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
1042 tx_desc->read.olinfo_status =
1043 cpu_to_le32((len << IXGBE_ADVTXD_PAYLEN_SHIFT) |
1044 IXGBE_ADVTXD_CC);
1045
1046
1047 smp_wmb();
1048
1049
1050 i++;
1051 if (i == ring->count)
1052 i = 0;
1053
1054 tx_buffer->next_to_watch = tx_desc;
1055 ring->next_to_use = i;
1056
1057 return IXGBEVF_XDP_TX;
1058}
1059
1060static struct sk_buff *ixgbevf_run_xdp(struct ixgbevf_adapter *adapter,
1061 struct ixgbevf_ring *rx_ring,
1062 struct xdp_buff *xdp)
1063{
1064 int result = IXGBEVF_XDP_PASS;
1065 struct ixgbevf_ring *xdp_ring;
1066 struct bpf_prog *xdp_prog;
1067 u32 act;
1068
1069 rcu_read_lock();
1070 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1071
1072 if (!xdp_prog)
1073 goto xdp_out;
1074
1075 act = bpf_prog_run_xdp(xdp_prog, xdp);
1076 switch (act) {
1077 case XDP_PASS:
1078 break;
1079 case XDP_TX:
1080 xdp_ring = adapter->xdp_ring[rx_ring->queue_index];
1081 result = ixgbevf_xmit_xdp_ring(xdp_ring, xdp);
1082 break;
1083 default:
1084 bpf_warn_invalid_xdp_action(act);
1085
1086 case XDP_ABORTED:
1087 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
1088
1089 case XDP_DROP:
1090 result = IXGBEVF_XDP_CONSUMED;
1091 break;
1092 }
1093xdp_out:
1094 rcu_read_unlock();
1095 return ERR_PTR(-result);
1096}
1097
1098static void ixgbevf_rx_buffer_flip(struct ixgbevf_ring *rx_ring,
1099 struct ixgbevf_rx_buffer *rx_buffer,
1100 unsigned int size)
1101{
1102#if (PAGE_SIZE < 8192)
1103 unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
1104
1105 rx_buffer->page_offset ^= truesize;
1106#else
1107 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
1108 SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
1109 SKB_DATA_ALIGN(size);
1110
1111 rx_buffer->page_offset += truesize;
1112#endif
1113}
1114
1115static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
1116 struct ixgbevf_ring *rx_ring,
1117 int budget)
1118{
1119 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1120 struct ixgbevf_adapter *adapter = q_vector->adapter;
1121 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
1122 struct sk_buff *skb = rx_ring->skb;
1123 bool xdp_xmit = false;
1124 struct xdp_buff xdp;
1125
1126 xdp.rxq = &rx_ring->xdp_rxq;
1127
1128 while (likely(total_rx_packets < budget)) {
1129 struct ixgbevf_rx_buffer *rx_buffer;
1130 union ixgbe_adv_rx_desc *rx_desc;
1131 unsigned int size;
1132
1133
1134 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
1135 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
1136 cleaned_count = 0;
1137 }
1138
1139 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
1140 size = le16_to_cpu(rx_desc->wb.upper.length);
1141 if (!size)
1142 break;
1143
1144
1145
1146
1147
1148 rmb();
1149
1150 rx_buffer = ixgbevf_get_rx_buffer(rx_ring, size);
1151
1152
1153 if (!skb) {
1154 xdp.data = page_address(rx_buffer->page) +
1155 rx_buffer->page_offset;
1156 xdp.data_meta = xdp.data;
1157 xdp.data_hard_start = xdp.data -
1158 ixgbevf_rx_offset(rx_ring);
1159 xdp.data_end = xdp.data + size;
1160
1161 skb = ixgbevf_run_xdp(adapter, rx_ring, &xdp);
1162 }
1163
1164 if (IS_ERR(skb)) {
1165 if (PTR_ERR(skb) == -IXGBEVF_XDP_TX) {
1166 xdp_xmit = true;
1167 ixgbevf_rx_buffer_flip(rx_ring, rx_buffer,
1168 size);
1169 } else {
1170 rx_buffer->pagecnt_bias++;
1171 }
1172 total_rx_packets++;
1173 total_rx_bytes += size;
1174 } else if (skb) {
1175 ixgbevf_add_rx_frag(rx_ring, rx_buffer, skb, size);
1176 } else if (ring_uses_build_skb(rx_ring)) {
1177 skb = ixgbevf_build_skb(rx_ring, rx_buffer,
1178 &xdp, rx_desc);
1179 } else {
1180 skb = ixgbevf_construct_skb(rx_ring, rx_buffer,
1181 &xdp, rx_desc);
1182 }
1183
1184
1185 if (!skb) {
1186 rx_ring->rx_stats.alloc_rx_buff_failed++;
1187 rx_buffer->pagecnt_bias++;
1188 break;
1189 }
1190
1191 ixgbevf_put_rx_buffer(rx_ring, rx_buffer, skb);
1192 cleaned_count++;
1193
1194
1195 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
1196 continue;
1197
1198
1199 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
1200 skb = NULL;
1201 continue;
1202 }
1203
1204
1205 total_rx_bytes += skb->len;
1206
1207
1208
1209
1210 if ((skb->pkt_type == PACKET_BROADCAST ||
1211 skb->pkt_type == PACKET_MULTICAST) &&
1212 ether_addr_equal(rx_ring->netdev->dev_addr,
1213 eth_hdr(skb)->h_source)) {
1214 dev_kfree_skb_irq(skb);
1215 continue;
1216 }
1217
1218
1219 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
1220
1221 ixgbevf_rx_skb(q_vector, skb);
1222
1223
1224 skb = NULL;
1225
1226
1227 total_rx_packets++;
1228 }
1229
1230
1231 rx_ring->skb = skb;
1232
1233 if (xdp_xmit) {
1234 struct ixgbevf_ring *xdp_ring =
1235 adapter->xdp_ring[rx_ring->queue_index];
1236
1237
1238
1239
1240 wmb();
1241 ixgbevf_write_tail(xdp_ring, xdp_ring->next_to_use);
1242 }
1243
1244 u64_stats_update_begin(&rx_ring->syncp);
1245 rx_ring->stats.packets += total_rx_packets;
1246 rx_ring->stats.bytes += total_rx_bytes;
1247 u64_stats_update_end(&rx_ring->syncp);
1248 q_vector->rx.total_packets += total_rx_packets;
1249 q_vector->rx.total_bytes += total_rx_bytes;
1250
1251 return total_rx_packets;
1252}
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262static int ixgbevf_poll(struct napi_struct *napi, int budget)
1263{
1264 struct ixgbevf_q_vector *q_vector =
1265 container_of(napi, struct ixgbevf_q_vector, napi);
1266 struct ixgbevf_adapter *adapter = q_vector->adapter;
1267 struct ixgbevf_ring *ring;
1268 int per_ring_budget, work_done = 0;
1269 bool clean_complete = true;
1270
1271 ixgbevf_for_each_ring(ring, q_vector->tx) {
1272 if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
1273 clean_complete = false;
1274 }
1275
1276 if (budget <= 0)
1277 return budget;
1278
1279
1280
1281
1282 if (q_vector->rx.count > 1)
1283 per_ring_budget = max(budget/q_vector->rx.count, 1);
1284 else
1285 per_ring_budget = budget;
1286
1287 ixgbevf_for_each_ring(ring, q_vector->rx) {
1288 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1289 per_ring_budget);
1290 work_done += cleaned;
1291 if (cleaned >= per_ring_budget)
1292 clean_complete = false;
1293 }
1294
1295
1296 if (!clean_complete)
1297 return budget;
1298
1299
1300
1301
1302 if (likely(napi_complete_done(napi, work_done))) {
1303 if (adapter->rx_itr_setting == 1)
1304 ixgbevf_set_itr(q_vector);
1305 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1306 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
1307 ixgbevf_irq_enable_queues(adapter,
1308 BIT(q_vector->v_idx));
1309 }
1310
1311 return min(work_done, budget - 1);
1312}
1313
1314
1315
1316
1317
1318void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
1319{
1320 struct ixgbevf_adapter *adapter = q_vector->adapter;
1321 struct ixgbe_hw *hw = &adapter->hw;
1322 int v_idx = q_vector->v_idx;
1323 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1324
1325
1326
1327
1328 itr_reg |= IXGBE_EITR_CNT_WDIS;
1329
1330 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1331}
1332
1333
1334
1335
1336
1337
1338
1339
1340static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1341{
1342 struct ixgbevf_q_vector *q_vector;
1343 int q_vectors, v_idx;
1344
1345 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1346 adapter->eims_enable_mask = 0;
1347
1348
1349
1350
1351 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
1352 struct ixgbevf_ring *ring;
1353
1354 q_vector = adapter->q_vector[v_idx];
1355
1356 ixgbevf_for_each_ring(ring, q_vector->rx)
1357 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1358
1359 ixgbevf_for_each_ring(ring, q_vector->tx)
1360 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
1361
1362 if (q_vector->tx.ring && !q_vector->rx.ring) {
1363
1364 if (adapter->tx_itr_setting == 1)
1365 q_vector->itr = IXGBE_12K_ITR;
1366 else
1367 q_vector->itr = adapter->tx_itr_setting;
1368 } else {
1369
1370 if (adapter->rx_itr_setting == 1)
1371 q_vector->itr = IXGBE_20K_ITR;
1372 else
1373 q_vector->itr = adapter->rx_itr_setting;
1374 }
1375
1376
1377 adapter->eims_enable_mask |= BIT(v_idx);
1378
1379 ixgbevf_write_eitr(q_vector);
1380 }
1381
1382 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
1383
1384 adapter->eims_other = BIT(v_idx);
1385 adapter->eims_enable_mask |= adapter->eims_other;
1386}
1387
1388enum latency_range {
1389 lowest_latency = 0,
1390 low_latency = 1,
1391 bulk_latency = 2,
1392 latency_invalid = 255
1393};
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1409 struct ixgbevf_ring_container *ring_container)
1410{
1411 int bytes = ring_container->total_bytes;
1412 int packets = ring_container->total_packets;
1413 u32 timepassed_us;
1414 u64 bytes_perint;
1415 u8 itr_setting = ring_container->itr;
1416
1417 if (packets == 0)
1418 return;
1419
1420
1421
1422
1423
1424
1425
1426 timepassed_us = q_vector->itr >> 2;
1427 if (timepassed_us == 0)
1428 return;
1429
1430 bytes_perint = bytes / timepassed_us;
1431
1432 switch (itr_setting) {
1433 case lowest_latency:
1434 if (bytes_perint > 10)
1435 itr_setting = low_latency;
1436 break;
1437 case low_latency:
1438 if (bytes_perint > 20)
1439 itr_setting = bulk_latency;
1440 else if (bytes_perint <= 10)
1441 itr_setting = lowest_latency;
1442 break;
1443 case bulk_latency:
1444 if (bytes_perint <= 20)
1445 itr_setting = low_latency;
1446 break;
1447 }
1448
1449
1450 ring_container->total_bytes = 0;
1451 ring_container->total_packets = 0;
1452
1453
1454 ring_container->itr = itr_setting;
1455}
1456
1457static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
1458{
1459 u32 new_itr = q_vector->itr;
1460 u8 current_itr;
1461
1462 ixgbevf_update_itr(q_vector, &q_vector->tx);
1463 ixgbevf_update_itr(q_vector, &q_vector->rx);
1464
1465 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
1466
1467 switch (current_itr) {
1468
1469 case lowest_latency:
1470 new_itr = IXGBE_100K_ITR;
1471 break;
1472 case low_latency:
1473 new_itr = IXGBE_20K_ITR;
1474 break;
1475 case bulk_latency:
1476 new_itr = IXGBE_12K_ITR;
1477 break;
1478 default:
1479 break;
1480 }
1481
1482 if (new_itr != q_vector->itr) {
1483
1484 new_itr = (10 * new_itr * q_vector->itr) /
1485 ((9 * new_itr) + q_vector->itr);
1486
1487
1488 q_vector->itr = new_itr;
1489
1490 ixgbevf_write_eitr(q_vector);
1491 }
1492}
1493
1494static irqreturn_t ixgbevf_msix_other(int irq, void *data)
1495{
1496 struct ixgbevf_adapter *adapter = data;
1497 struct ixgbe_hw *hw = &adapter->hw;
1498
1499 hw->mac.get_link_status = 1;
1500
1501 ixgbevf_service_event_schedule(adapter);
1502
1503 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1504
1505 return IRQ_HANDLED;
1506}
1507
1508
1509
1510
1511
1512
1513static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
1514{
1515 struct ixgbevf_q_vector *q_vector = data;
1516
1517
1518 if (q_vector->rx.ring || q_vector->tx.ring)
1519 napi_schedule_irqoff(&q_vector->napi);
1520
1521 return IRQ_HANDLED;
1522}
1523
1524
1525
1526
1527
1528
1529
1530
1531static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1532{
1533 struct net_device *netdev = adapter->netdev;
1534 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1535 unsigned int ri = 0, ti = 0;
1536 int vector, err;
1537
1538 for (vector = 0; vector < q_vectors; vector++) {
1539 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1540 struct msix_entry *entry = &adapter->msix_entries[vector];
1541
1542 if (q_vector->tx.ring && q_vector->rx.ring) {
1543 snprintf(q_vector->name, sizeof(q_vector->name),
1544 "%s-TxRx-%u", netdev->name, ri++);
1545 ti++;
1546 } else if (q_vector->rx.ring) {
1547 snprintf(q_vector->name, sizeof(q_vector->name),
1548 "%s-rx-%u", netdev->name, ri++);
1549 } else if (q_vector->tx.ring) {
1550 snprintf(q_vector->name, sizeof(q_vector->name),
1551 "%s-tx-%u", netdev->name, ti++);
1552 } else {
1553
1554 continue;
1555 }
1556 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1557 q_vector->name, q_vector);
1558 if (err) {
1559 hw_dbg(&adapter->hw,
1560 "request_irq failed for MSIX interrupt Error: %d\n",
1561 err);
1562 goto free_queue_irqs;
1563 }
1564 }
1565
1566 err = request_irq(adapter->msix_entries[vector].vector,
1567 &ixgbevf_msix_other, 0, netdev->name, adapter);
1568 if (err) {
1569 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1570 err);
1571 goto free_queue_irqs;
1572 }
1573
1574 return 0;
1575
1576free_queue_irqs:
1577 while (vector) {
1578 vector--;
1579 free_irq(adapter->msix_entries[vector].vector,
1580 adapter->q_vector[vector]);
1581 }
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592 adapter->num_msix_vectors = 0;
1593 return err;
1594}
1595
1596
1597
1598
1599
1600
1601
1602
1603static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1604{
1605 int err = ixgbevf_request_msix_irqs(adapter);
1606
1607 if (err)
1608 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
1609
1610 return err;
1611}
1612
1613static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1614{
1615 int i, q_vectors;
1616
1617 if (!adapter->msix_entries)
1618 return;
1619
1620 q_vectors = adapter->num_msix_vectors;
1621 i = q_vectors - 1;
1622
1623 free_irq(adapter->msix_entries[i].vector, adapter);
1624 i--;
1625
1626 for (; i >= 0; i--) {
1627
1628 if (!adapter->q_vector[i]->rx.ring &&
1629 !adapter->q_vector[i]->tx.ring)
1630 continue;
1631
1632 free_irq(adapter->msix_entries[i].vector,
1633 adapter->q_vector[i]);
1634 }
1635}
1636
1637
1638
1639
1640
1641static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1642{
1643 struct ixgbe_hw *hw = &adapter->hw;
1644 int i;
1645
1646 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
1647 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1648 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
1649
1650 IXGBE_WRITE_FLUSH(hw);
1651
1652 for (i = 0; i < adapter->num_msix_vectors; i++)
1653 synchronize_irq(adapter->msix_entries[i].vector);
1654}
1655
1656
1657
1658
1659
1660static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
1661{
1662 struct ixgbe_hw *hw = &adapter->hw;
1663
1664 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1665 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1666 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
1667}
1668
1669
1670
1671
1672
1673
1674
1675
1676static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1677 struct ixgbevf_ring *ring)
1678{
1679 struct ixgbe_hw *hw = &adapter->hw;
1680 u64 tdba = ring->dma;
1681 int wait_loop = 10;
1682 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1683 u8 reg_idx = ring->reg_idx;
1684
1685
1686 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1687 IXGBE_WRITE_FLUSH(hw);
1688
1689 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1690 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1691 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1692 ring->count * sizeof(union ixgbe_adv_tx_desc));
1693
1694
1695 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1696 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1697
1698
1699 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1700 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1701 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1702
1703
1704 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1705 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
1706 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
1707
1708
1709 ring->next_to_clean = 0;
1710 ring->next_to_use = 0;
1711
1712
1713
1714
1715
1716 txdctl |= (8 << 16);
1717
1718
1719 txdctl |= (1u << 8) |
1720 32;
1721
1722
1723 memset(ring->tx_buffer_info, 0,
1724 sizeof(struct ixgbevf_tx_buffer) * ring->count);
1725
1726 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
1727 clear_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
1728
1729 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1730
1731
1732 do {
1733 usleep_range(1000, 2000);
1734 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1735 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1736 if (!wait_loop)
1737 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
1738}
1739
1740
1741
1742
1743
1744
1745
1746static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1747{
1748 u32 i;
1749
1750
1751 for (i = 0; i < adapter->num_tx_queues; i++)
1752 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
1753 for (i = 0; i < adapter->num_xdp_queues; i++)
1754 ixgbevf_configure_tx_ring(adapter, adapter->xdp_ring[i]);
1755}
1756
1757#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1758
1759static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter,
1760 struct ixgbevf_ring *ring, int index)
1761{
1762 struct ixgbe_hw *hw = &adapter->hw;
1763 u32 srrctl;
1764
1765 srrctl = IXGBE_SRRCTL_DROP_EN;
1766
1767 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1768 if (ring_uses_large_buffer(ring))
1769 srrctl |= IXGBEVF_RXBUFFER_3072 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1770 else
1771 srrctl |= IXGBEVF_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1772 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1773
1774 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1775}
1776
1777static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1778{
1779 struct ixgbe_hw *hw = &adapter->hw;
1780
1781
1782 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1783 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1784 IXGBE_PSRTYPE_L2HDR;
1785
1786 if (adapter->num_rx_queues > 1)
1787 psrtype |= BIT(29);
1788
1789 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1790}
1791
1792#define IXGBEVF_MAX_RX_DESC_POLL 10
1793static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1794 struct ixgbevf_ring *ring)
1795{
1796 struct ixgbe_hw *hw = &adapter->hw;
1797 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1798 u32 rxdctl;
1799 u8 reg_idx = ring->reg_idx;
1800
1801 if (IXGBE_REMOVED(hw->hw_addr))
1802 return;
1803 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1804 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1805
1806
1807 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1808
1809
1810 do {
1811 udelay(10);
1812 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1813 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1814
1815 if (!wait_loop)
1816 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1817 reg_idx);
1818}
1819
1820static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1821 struct ixgbevf_ring *ring)
1822{
1823 struct ixgbe_hw *hw = &adapter->hw;
1824 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1825 u32 rxdctl;
1826 u8 reg_idx = ring->reg_idx;
1827
1828 if (IXGBE_REMOVED(hw->hw_addr))
1829 return;
1830 do {
1831 usleep_range(1000, 2000);
1832 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1833 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1834
1835 if (!wait_loop)
1836 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1837 reg_idx);
1838}
1839
1840
1841
1842
1843
1844
1845
1846static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter)
1847{
1848 u32 *rss_key;
1849
1850 if (!adapter->rss_key) {
1851 rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL);
1852 if (unlikely(!rss_key))
1853 return -ENOMEM;
1854
1855 netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE);
1856 adapter->rss_key = rss_key;
1857 }
1858
1859 return 0;
1860}
1861
1862static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1863{
1864 struct ixgbe_hw *hw = &adapter->hw;
1865 u32 vfmrqc = 0, vfreta = 0;
1866 u16 rss_i = adapter->num_rx_queues;
1867 u8 i, j;
1868
1869
1870 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
1871 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i));
1872
1873 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
1874 if (j == rss_i)
1875 j = 0;
1876
1877 adapter->rss_indir_tbl[i] = j;
1878
1879 vfreta |= j << (i & 0x3) * 8;
1880 if ((i & 3) == 3) {
1881 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
1882 vfreta = 0;
1883 }
1884 }
1885
1886
1887 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1888 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1889 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1890 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1891
1892 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1893
1894 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1895}
1896
1897static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1898 struct ixgbevf_ring *ring)
1899{
1900 struct ixgbe_hw *hw = &adapter->hw;
1901 union ixgbe_adv_rx_desc *rx_desc;
1902 u64 rdba = ring->dma;
1903 u32 rxdctl;
1904 u8 reg_idx = ring->reg_idx;
1905
1906
1907 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1908 ixgbevf_disable_rx_queue(adapter, ring);
1909
1910 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1911 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1912 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1913 ring->count * sizeof(union ixgbe_adv_rx_desc));
1914
1915#ifndef CONFIG_SPARC
1916
1917 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1918 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1919#else
1920 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1921 IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1922 IXGBE_DCA_RXCTRL_DATA_WRO_EN);
1923#endif
1924
1925
1926 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1927 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
1928 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
1929
1930
1931 memset(ring->rx_buffer_info, 0,
1932 sizeof(struct ixgbevf_rx_buffer) * ring->count);
1933
1934
1935 rx_desc = IXGBEVF_RX_DESC(ring, 0);
1936 rx_desc->wb.upper.length = 0;
1937
1938
1939 ring->next_to_clean = 0;
1940 ring->next_to_use = 0;
1941 ring->next_to_alloc = 0;
1942
1943 ixgbevf_configure_srrctl(adapter, ring, reg_idx);
1944
1945
1946 if (adapter->hw.mac.type != ixgbe_mac_82599_vf) {
1947 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
1948 IXGBE_RXDCTL_RLPML_EN);
1949
1950#if (PAGE_SIZE < 8192)
1951
1952 if (ring_uses_build_skb(ring) &&
1953 !ring_uses_large_buffer(ring))
1954 rxdctl |= IXGBEVF_MAX_FRAME_BUILD_SKB |
1955 IXGBE_RXDCTL_RLPML_EN;
1956#endif
1957 }
1958
1959 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1960 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1961
1962 ixgbevf_rx_desc_queue_enable(adapter, ring);
1963 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
1964}
1965
1966static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter,
1967 struct ixgbevf_ring *rx_ring)
1968{
1969 struct net_device *netdev = adapter->netdev;
1970 unsigned int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1971
1972
1973 clear_ring_build_skb_enabled(rx_ring);
1974 clear_ring_uses_large_buffer(rx_ring);
1975
1976 if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX)
1977 return;
1978
1979 set_ring_build_skb_enabled(rx_ring);
1980
1981 if (PAGE_SIZE < 8192) {
1982 if (max_frame <= IXGBEVF_MAX_FRAME_BUILD_SKB)
1983 return;
1984
1985 set_ring_uses_large_buffer(rx_ring);
1986 }
1987}
1988
1989
1990
1991
1992
1993
1994
1995static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1996{
1997 struct ixgbe_hw *hw = &adapter->hw;
1998 struct net_device *netdev = adapter->netdev;
1999 int i, ret;
2000
2001 ixgbevf_setup_psrtype(adapter);
2002 if (hw->mac.type >= ixgbe_mac_X550_vf)
2003 ixgbevf_setup_vfmrqc(adapter);
2004
2005 spin_lock_bh(&adapter->mbx_lock);
2006
2007 ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
2008 spin_unlock_bh(&adapter->mbx_lock);
2009 if (ret)
2010 dev_err(&adapter->pdev->dev,
2011 "Failed to set MTU at %d\n", netdev->mtu);
2012
2013
2014
2015
2016 for (i = 0; i < adapter->num_rx_queues; i++) {
2017 struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
2018
2019 ixgbevf_set_rx_buffer_len(adapter, rx_ring);
2020 ixgbevf_configure_rx_ring(adapter, rx_ring);
2021 }
2022}
2023
2024static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
2025 __be16 proto, u16 vid)
2026{
2027 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2028 struct ixgbe_hw *hw = &adapter->hw;
2029 int err;
2030
2031 spin_lock_bh(&adapter->mbx_lock);
2032
2033
2034 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
2035
2036 spin_unlock_bh(&adapter->mbx_lock);
2037
2038
2039 if (err == IXGBE_ERR_MBX)
2040 return -EIO;
2041
2042 if (err == IXGBE_ERR_INVALID_ARGUMENT)
2043 return -EACCES;
2044
2045 set_bit(vid, adapter->active_vlans);
2046
2047 return err;
2048}
2049
2050static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
2051 __be16 proto, u16 vid)
2052{
2053 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2054 struct ixgbe_hw *hw = &adapter->hw;
2055 int err;
2056
2057 spin_lock_bh(&adapter->mbx_lock);
2058
2059
2060 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
2061
2062 spin_unlock_bh(&adapter->mbx_lock);
2063
2064 clear_bit(vid, adapter->active_vlans);
2065
2066 return err;
2067}
2068
2069static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
2070{
2071 u16 vid;
2072
2073 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2074 ixgbevf_vlan_rx_add_vid(adapter->netdev,
2075 htons(ETH_P_8021Q), vid);
2076}
2077
2078static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
2079{
2080 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2081 struct ixgbe_hw *hw = &adapter->hw;
2082 int count = 0;
2083
2084 if (!netdev_uc_empty(netdev)) {
2085 struct netdev_hw_addr *ha;
2086
2087 netdev_for_each_uc_addr(ha, netdev) {
2088 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
2089 udelay(200);
2090 }
2091 } else {
2092
2093
2094
2095 hw->mac.ops.set_uc_addr(hw, 0, NULL);
2096 }
2097
2098 return count;
2099}
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110static void ixgbevf_set_rx_mode(struct net_device *netdev)
2111{
2112 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2113 struct ixgbe_hw *hw = &adapter->hw;
2114 unsigned int flags = netdev->flags;
2115 int xcast_mode;
2116
2117
2118 if (flags & IFF_PROMISC)
2119 xcast_mode = IXGBEVF_XCAST_MODE_PROMISC;
2120 else if (flags & IFF_ALLMULTI)
2121 xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI;
2122 else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
2123 xcast_mode = IXGBEVF_XCAST_MODE_MULTI;
2124 else
2125 xcast_mode = IXGBEVF_XCAST_MODE_NONE;
2126
2127 spin_lock_bh(&adapter->mbx_lock);
2128
2129 hw->mac.ops.update_xcast_mode(hw, xcast_mode);
2130
2131
2132 hw->mac.ops.update_mc_addr_list(hw, netdev);
2133
2134 ixgbevf_write_uc_addr_list(netdev);
2135
2136 spin_unlock_bh(&adapter->mbx_lock);
2137}
2138
2139static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
2140{
2141 int q_idx;
2142 struct ixgbevf_q_vector *q_vector;
2143 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2144
2145 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2146 q_vector = adapter->q_vector[q_idx];
2147 napi_enable(&q_vector->napi);
2148 }
2149}
2150
2151static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
2152{
2153 int q_idx;
2154 struct ixgbevf_q_vector *q_vector;
2155 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2156
2157 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
2158 q_vector = adapter->q_vector[q_idx];
2159 napi_disable(&q_vector->napi);
2160 }
2161}
2162
2163static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
2164{
2165 struct ixgbe_hw *hw = &adapter->hw;
2166 unsigned int def_q = 0;
2167 unsigned int num_tcs = 0;
2168 unsigned int num_rx_queues = adapter->num_rx_queues;
2169 unsigned int num_tx_queues = adapter->num_tx_queues;
2170 int err;
2171
2172 spin_lock_bh(&adapter->mbx_lock);
2173
2174
2175 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2176
2177 spin_unlock_bh(&adapter->mbx_lock);
2178
2179 if (err)
2180 return err;
2181
2182 if (num_tcs > 1) {
2183
2184 num_tx_queues = 1;
2185
2186
2187 adapter->tx_ring[0]->reg_idx = def_q;
2188
2189
2190 num_rx_queues = num_tcs;
2191 }
2192
2193
2194 if ((adapter->num_rx_queues != num_rx_queues) ||
2195 (adapter->num_tx_queues != num_tx_queues)) {
2196
2197 hw->mbx.timeout = 0;
2198
2199
2200 set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
2201 }
2202
2203 return 0;
2204}
2205
2206static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
2207{
2208 ixgbevf_configure_dcb(adapter);
2209
2210 ixgbevf_set_rx_mode(adapter->netdev);
2211
2212 ixgbevf_restore_vlan(adapter);
2213 ixgbevf_ipsec_restore(adapter);
2214
2215 ixgbevf_configure_tx(adapter);
2216 ixgbevf_configure_rx(adapter);
2217}
2218
2219static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2220{
2221
2222 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2223 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2224 adapter->stats.base_vfgprc;
2225 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2226 adapter->stats.base_vfgptc;
2227 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2228 adapter->stats.base_vfgorc;
2229 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2230 adapter->stats.base_vfgotc;
2231 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2232 adapter->stats.base_vfmprc;
2233 }
2234}
2235
2236static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2237{
2238 struct ixgbe_hw *hw = &adapter->hw;
2239
2240 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2241 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2242 adapter->stats.last_vfgorc |=
2243 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2244 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2245 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2246 adapter->stats.last_vfgotc |=
2247 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2248 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2249
2250 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2251 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2252 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2253 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2254 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2255}
2256
2257static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2258{
2259 struct ixgbe_hw *hw = &adapter->hw;
2260 static const int api[] = {
2261 ixgbe_mbox_api_14,
2262 ixgbe_mbox_api_13,
2263 ixgbe_mbox_api_12,
2264 ixgbe_mbox_api_11,
2265 ixgbe_mbox_api_10,
2266 ixgbe_mbox_api_unknown
2267 };
2268 int err, idx = 0;
2269
2270 spin_lock_bh(&adapter->mbx_lock);
2271
2272 while (api[idx] != ixgbe_mbox_api_unknown) {
2273 err = hw->mac.ops.negotiate_api_version(hw, api[idx]);
2274 if (!err)
2275 break;
2276 idx++;
2277 }
2278
2279 spin_unlock_bh(&adapter->mbx_lock);
2280}
2281
2282static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
2283{
2284 struct net_device *netdev = adapter->netdev;
2285 struct ixgbe_hw *hw = &adapter->hw;
2286
2287 ixgbevf_configure_msix(adapter);
2288
2289 spin_lock_bh(&adapter->mbx_lock);
2290
2291 if (is_valid_ether_addr(hw->mac.addr))
2292 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2293 else
2294 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
2295
2296 spin_unlock_bh(&adapter->mbx_lock);
2297
2298 smp_mb__before_atomic();
2299 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2300 ixgbevf_napi_enable_all(adapter);
2301
2302
2303 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2304 ixgbevf_irq_enable(adapter);
2305
2306
2307 netif_tx_start_all_queues(netdev);
2308
2309 ixgbevf_save_reset_stats(adapter);
2310 ixgbevf_init_last_counter_stats(adapter);
2311
2312 hw->mac.get_link_status = 1;
2313 mod_timer(&adapter->service_timer, jiffies);
2314}
2315
2316void ixgbevf_up(struct ixgbevf_adapter *adapter)
2317{
2318 ixgbevf_configure(adapter);
2319
2320 ixgbevf_up_complete(adapter);
2321}
2322
2323
2324
2325
2326
2327static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
2328{
2329 u16 i = rx_ring->next_to_clean;
2330
2331
2332 if (rx_ring->skb) {
2333 dev_kfree_skb(rx_ring->skb);
2334 rx_ring->skb = NULL;
2335 }
2336
2337
2338 while (i != rx_ring->next_to_alloc) {
2339 struct ixgbevf_rx_buffer *rx_buffer;
2340
2341 rx_buffer = &rx_ring->rx_buffer_info[i];
2342
2343
2344
2345
2346 dma_sync_single_range_for_cpu(rx_ring->dev,
2347 rx_buffer->dma,
2348 rx_buffer->page_offset,
2349 ixgbevf_rx_bufsz(rx_ring),
2350 DMA_FROM_DEVICE);
2351
2352
2353 dma_unmap_page_attrs(rx_ring->dev,
2354 rx_buffer->dma,
2355 ixgbevf_rx_pg_size(rx_ring),
2356 DMA_FROM_DEVICE,
2357 IXGBEVF_RX_DMA_ATTR);
2358
2359 __page_frag_cache_drain(rx_buffer->page,
2360 rx_buffer->pagecnt_bias);
2361
2362 i++;
2363 if (i == rx_ring->count)
2364 i = 0;
2365 }
2366
2367 rx_ring->next_to_alloc = 0;
2368 rx_ring->next_to_clean = 0;
2369 rx_ring->next_to_use = 0;
2370}
2371
2372
2373
2374
2375
2376static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
2377{
2378 u16 i = tx_ring->next_to_clean;
2379 struct ixgbevf_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
2380
2381 while (i != tx_ring->next_to_use) {
2382 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
2383
2384
2385 if (ring_is_xdp(tx_ring))
2386 page_frag_free(tx_buffer->data);
2387 else
2388 dev_kfree_skb_any(tx_buffer->skb);
2389
2390
2391 dma_unmap_single(tx_ring->dev,
2392 dma_unmap_addr(tx_buffer, dma),
2393 dma_unmap_len(tx_buffer, len),
2394 DMA_TO_DEVICE);
2395
2396
2397 eop_desc = tx_buffer->next_to_watch;
2398 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
2399
2400
2401 while (tx_desc != eop_desc) {
2402 tx_buffer++;
2403 tx_desc++;
2404 i++;
2405 if (unlikely(i == tx_ring->count)) {
2406 i = 0;
2407 tx_buffer = tx_ring->tx_buffer_info;
2408 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
2409 }
2410
2411
2412 if (dma_unmap_len(tx_buffer, len))
2413 dma_unmap_page(tx_ring->dev,
2414 dma_unmap_addr(tx_buffer, dma),
2415 dma_unmap_len(tx_buffer, len),
2416 DMA_TO_DEVICE);
2417 }
2418
2419
2420 tx_buffer++;
2421 i++;
2422 if (unlikely(i == tx_ring->count)) {
2423 i = 0;
2424 tx_buffer = tx_ring->tx_buffer_info;
2425 }
2426 }
2427
2428
2429 tx_ring->next_to_use = 0;
2430 tx_ring->next_to_clean = 0;
2431
2432}
2433
2434
2435
2436
2437
2438static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2439{
2440 int i;
2441
2442 for (i = 0; i < adapter->num_rx_queues; i++)
2443 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
2444}
2445
2446
2447
2448
2449
2450static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2451{
2452 int i;
2453
2454 for (i = 0; i < adapter->num_tx_queues; i++)
2455 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
2456 for (i = 0; i < adapter->num_xdp_queues; i++)
2457 ixgbevf_clean_tx_ring(adapter->xdp_ring[i]);
2458}
2459
2460void ixgbevf_down(struct ixgbevf_adapter *adapter)
2461{
2462 struct net_device *netdev = adapter->netdev;
2463 struct ixgbe_hw *hw = &adapter->hw;
2464 int i;
2465
2466
2467 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2468 return;
2469
2470
2471 for (i = 0; i < adapter->num_rx_queues; i++)
2472 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
2473
2474 usleep_range(10000, 20000);
2475
2476 netif_tx_stop_all_queues(netdev);
2477
2478
2479 netif_carrier_off(netdev);
2480 netif_tx_disable(netdev);
2481
2482 ixgbevf_irq_disable(adapter);
2483
2484 ixgbevf_napi_disable_all(adapter);
2485
2486 del_timer_sync(&adapter->service_timer);
2487
2488
2489 for (i = 0; i < adapter->num_tx_queues; i++) {
2490 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2491
2492 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2493 IXGBE_TXDCTL_SWFLSH);
2494 }
2495
2496 for (i = 0; i < adapter->num_xdp_queues; i++) {
2497 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
2498
2499 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2500 IXGBE_TXDCTL_SWFLSH);
2501 }
2502
2503 if (!pci_channel_offline(adapter->pdev))
2504 ixgbevf_reset(adapter);
2505
2506 ixgbevf_clean_all_tx_rings(adapter);
2507 ixgbevf_clean_all_rx_rings(adapter);
2508}
2509
2510void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2511{
2512 WARN_ON(in_interrupt());
2513
2514 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2515 msleep(1);
2516
2517 ixgbevf_down(adapter);
2518 pci_set_master(adapter->pdev);
2519 ixgbevf_up(adapter);
2520
2521 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2522}
2523
2524void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2525{
2526 struct ixgbe_hw *hw = &adapter->hw;
2527 struct net_device *netdev = adapter->netdev;
2528
2529 if (hw->mac.ops.reset_hw(hw)) {
2530 hw_dbg(hw, "PF still resetting\n");
2531 } else {
2532 hw->mac.ops.init_hw(hw);
2533 ixgbevf_negotiate_api(adapter);
2534 }
2535
2536 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
2537 ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
2538 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
2539 }
2540
2541 adapter->last_reset = jiffies;
2542}
2543
2544static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2545 int vectors)
2546{
2547 int vector_threshold;
2548
2549
2550
2551
2552
2553 vector_threshold = MIN_MSIX_COUNT;
2554
2555
2556
2557
2558
2559
2560 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2561 vector_threshold, vectors);
2562
2563 if (vectors < 0) {
2564 dev_err(&adapter->pdev->dev,
2565 "Unable to allocate MSI-X interrupts\n");
2566 kfree(adapter->msix_entries);
2567 adapter->msix_entries = NULL;
2568 return vectors;
2569 }
2570
2571
2572
2573
2574
2575 adapter->num_msix_vectors = vectors;
2576
2577 return 0;
2578}
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2592{
2593 struct ixgbe_hw *hw = &adapter->hw;
2594 unsigned int def_q = 0;
2595 unsigned int num_tcs = 0;
2596 int err;
2597
2598
2599 adapter->num_rx_queues = 1;
2600 adapter->num_tx_queues = 1;
2601 adapter->num_xdp_queues = 0;
2602
2603 spin_lock_bh(&adapter->mbx_lock);
2604
2605
2606 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2607
2608 spin_unlock_bh(&adapter->mbx_lock);
2609
2610 if (err)
2611 return;
2612
2613
2614 if (num_tcs > 1) {
2615 adapter->num_rx_queues = num_tcs;
2616 } else {
2617 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2618
2619 switch (hw->api_version) {
2620 case ixgbe_mbox_api_11:
2621 case ixgbe_mbox_api_12:
2622 case ixgbe_mbox_api_13:
2623 case ixgbe_mbox_api_14:
2624 if (adapter->xdp_prog &&
2625 hw->mac.max_tx_queues == rss)
2626 rss = rss > 3 ? 2 : 1;
2627
2628 adapter->num_rx_queues = rss;
2629 adapter->num_tx_queues = rss;
2630 adapter->num_xdp_queues = adapter->xdp_prog ? rss : 0;
2631 default:
2632 break;
2633 }
2634 }
2635}
2636
2637
2638
2639
2640
2641
2642
2643
2644static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2645{
2646 int vector, v_budget;
2647
2648
2649
2650
2651
2652
2653
2654 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2655 v_budget = min_t(int, v_budget, num_online_cpus());
2656 v_budget += NON_Q_VECTORS;
2657
2658 adapter->msix_entries = kcalloc(v_budget,
2659 sizeof(struct msix_entry), GFP_KERNEL);
2660 if (!adapter->msix_entries)
2661 return -ENOMEM;
2662
2663 for (vector = 0; vector < v_budget; vector++)
2664 adapter->msix_entries[vector].entry = vector;
2665
2666
2667
2668
2669
2670 return ixgbevf_acquire_msix_vectors(adapter, v_budget);
2671}
2672
2673static void ixgbevf_add_ring(struct ixgbevf_ring *ring,
2674 struct ixgbevf_ring_container *head)
2675{
2676 ring->next = head->ring;
2677 head->ring = ring;
2678 head->count++;
2679}
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694static int ixgbevf_alloc_q_vector(struct ixgbevf_adapter *adapter, int v_idx,
2695 int txr_count, int txr_idx,
2696 int xdp_count, int xdp_idx,
2697 int rxr_count, int rxr_idx)
2698{
2699 struct ixgbevf_q_vector *q_vector;
2700 int reg_idx = txr_idx + xdp_idx;
2701 struct ixgbevf_ring *ring;
2702 int ring_count, size;
2703
2704 ring_count = txr_count + xdp_count + rxr_count;
2705 size = sizeof(*q_vector) + (sizeof(*ring) * ring_count);
2706
2707
2708 q_vector = kzalloc(size, GFP_KERNEL);
2709 if (!q_vector)
2710 return -ENOMEM;
2711
2712
2713 netif_napi_add(adapter->netdev, &q_vector->napi, ixgbevf_poll, 64);
2714
2715
2716 adapter->q_vector[v_idx] = q_vector;
2717 q_vector->adapter = adapter;
2718 q_vector->v_idx = v_idx;
2719
2720
2721 ring = q_vector->ring;
2722
2723 while (txr_count) {
2724
2725 ring->dev = &adapter->pdev->dev;
2726 ring->netdev = adapter->netdev;
2727
2728
2729 ring->q_vector = q_vector;
2730
2731
2732 ixgbevf_add_ring(ring, &q_vector->tx);
2733
2734
2735 ring->count = adapter->tx_ring_count;
2736 ring->queue_index = txr_idx;
2737 ring->reg_idx = reg_idx;
2738
2739
2740 adapter->tx_ring[txr_idx] = ring;
2741
2742
2743 txr_count--;
2744 txr_idx++;
2745 reg_idx++;
2746
2747
2748 ring++;
2749 }
2750
2751 while (xdp_count) {
2752
2753 ring->dev = &adapter->pdev->dev;
2754 ring->netdev = adapter->netdev;
2755
2756
2757 ring->q_vector = q_vector;
2758
2759
2760 ixgbevf_add_ring(ring, &q_vector->tx);
2761
2762
2763 ring->count = adapter->tx_ring_count;
2764 ring->queue_index = xdp_idx;
2765 ring->reg_idx = reg_idx;
2766 set_ring_xdp(ring);
2767
2768
2769 adapter->xdp_ring[xdp_idx] = ring;
2770
2771
2772 xdp_count--;
2773 xdp_idx++;
2774 reg_idx++;
2775
2776
2777 ring++;
2778 }
2779
2780 while (rxr_count) {
2781
2782 ring->dev = &adapter->pdev->dev;
2783 ring->netdev = adapter->netdev;
2784
2785
2786 ring->q_vector = q_vector;
2787
2788
2789 ixgbevf_add_ring(ring, &q_vector->rx);
2790
2791
2792 ring->count = adapter->rx_ring_count;
2793 ring->queue_index = rxr_idx;
2794 ring->reg_idx = rxr_idx;
2795
2796
2797 adapter->rx_ring[rxr_idx] = ring;
2798
2799
2800 rxr_count--;
2801 rxr_idx++;
2802
2803
2804 ring++;
2805 }
2806
2807 return 0;
2808}
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819static void ixgbevf_free_q_vector(struct ixgbevf_adapter *adapter, int v_idx)
2820{
2821 struct ixgbevf_q_vector *q_vector = adapter->q_vector[v_idx];
2822 struct ixgbevf_ring *ring;
2823
2824 ixgbevf_for_each_ring(ring, q_vector->tx) {
2825 if (ring_is_xdp(ring))
2826 adapter->xdp_ring[ring->queue_index] = NULL;
2827 else
2828 adapter->tx_ring[ring->queue_index] = NULL;
2829 }
2830
2831 ixgbevf_for_each_ring(ring, q_vector->rx)
2832 adapter->rx_ring[ring->queue_index] = NULL;
2833
2834 adapter->q_vector[v_idx] = NULL;
2835 netif_napi_del(&q_vector->napi);
2836
2837
2838
2839
2840 kfree_rcu(q_vector, rcu);
2841}
2842
2843
2844
2845
2846
2847
2848
2849
2850static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2851{
2852 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2853 int rxr_remaining = adapter->num_rx_queues;
2854 int txr_remaining = adapter->num_tx_queues;
2855 int xdp_remaining = adapter->num_xdp_queues;
2856 int rxr_idx = 0, txr_idx = 0, xdp_idx = 0, v_idx = 0;
2857 int err;
2858
2859 if (q_vectors >= (rxr_remaining + txr_remaining + xdp_remaining)) {
2860 for (; rxr_remaining; v_idx++, q_vectors--) {
2861 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
2862
2863 err = ixgbevf_alloc_q_vector(adapter, v_idx,
2864 0, 0, 0, 0, rqpv, rxr_idx);
2865 if (err)
2866 goto err_out;
2867
2868
2869 rxr_remaining -= rqpv;
2870 rxr_idx += rqpv;
2871 }
2872 }
2873
2874 for (; q_vectors; v_idx++, q_vectors--) {
2875 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
2876 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors);
2877 int xqpv = DIV_ROUND_UP(xdp_remaining, q_vectors);
2878
2879 err = ixgbevf_alloc_q_vector(adapter, v_idx,
2880 tqpv, txr_idx,
2881 xqpv, xdp_idx,
2882 rqpv, rxr_idx);
2883
2884 if (err)
2885 goto err_out;
2886
2887
2888 rxr_remaining -= rqpv;
2889 rxr_idx += rqpv;
2890 txr_remaining -= tqpv;
2891 txr_idx += tqpv;
2892 xdp_remaining -= xqpv;
2893 xdp_idx += xqpv;
2894 }
2895
2896 return 0;
2897
2898err_out:
2899 while (v_idx) {
2900 v_idx--;
2901 ixgbevf_free_q_vector(adapter, v_idx);
2902 }
2903
2904 return -ENOMEM;
2905}
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2916{
2917 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2918
2919 while (q_vectors) {
2920 q_vectors--;
2921 ixgbevf_free_q_vector(adapter, q_vectors);
2922 }
2923}
2924
2925
2926
2927
2928
2929
2930static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2931{
2932 if (!adapter->msix_entries)
2933 return;
2934
2935 pci_disable_msix(adapter->pdev);
2936 kfree(adapter->msix_entries);
2937 adapter->msix_entries = NULL;
2938}
2939
2940
2941
2942
2943
2944
2945static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2946{
2947 int err;
2948
2949
2950 ixgbevf_set_num_queues(adapter);
2951
2952 err = ixgbevf_set_interrupt_capability(adapter);
2953 if (err) {
2954 hw_dbg(&adapter->hw,
2955 "Unable to setup interrupt capabilities\n");
2956 goto err_set_interrupt;
2957 }
2958
2959 err = ixgbevf_alloc_q_vectors(adapter);
2960 if (err) {
2961 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
2962 goto err_alloc_q_vectors;
2963 }
2964
2965 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count %u\n",
2966 (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled",
2967 adapter->num_rx_queues, adapter->num_tx_queues,
2968 adapter->num_xdp_queues);
2969
2970 set_bit(__IXGBEVF_DOWN, &adapter->state);
2971
2972 return 0;
2973err_alloc_q_vectors:
2974 ixgbevf_reset_interrupt_capability(adapter);
2975err_set_interrupt:
2976 return err;
2977}
2978
2979
2980
2981
2982
2983
2984
2985
2986static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2987{
2988 adapter->num_tx_queues = 0;
2989 adapter->num_xdp_queues = 0;
2990 adapter->num_rx_queues = 0;
2991
2992 ixgbevf_free_q_vectors(adapter);
2993 ixgbevf_reset_interrupt_capability(adapter);
2994}
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
3005{
3006 struct ixgbe_hw *hw = &adapter->hw;
3007 struct pci_dev *pdev = adapter->pdev;
3008 struct net_device *netdev = adapter->netdev;
3009 int err;
3010
3011
3012 hw->vendor_id = pdev->vendor;
3013 hw->device_id = pdev->device;
3014 hw->revision_id = pdev->revision;
3015 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3016 hw->subsystem_device_id = pdev->subsystem_device;
3017
3018 hw->mbx.ops.init_params(hw);
3019
3020 if (hw->mac.type >= ixgbe_mac_X550_vf) {
3021 err = ixgbevf_init_rss_key(adapter);
3022 if (err)
3023 goto out;
3024 }
3025
3026
3027 hw->mac.max_tx_queues = 2;
3028 hw->mac.max_rx_queues = 2;
3029
3030
3031 spin_lock_init(&adapter->mbx_lock);
3032
3033 err = hw->mac.ops.reset_hw(hw);
3034 if (err) {
3035 dev_info(&pdev->dev,
3036 "PF still in reset state. Is the PF interface up?\n");
3037 } else {
3038 err = hw->mac.ops.init_hw(hw);
3039 if (err) {
3040 pr_err("init_shared_code failed: %d\n", err);
3041 goto out;
3042 }
3043 ixgbevf_negotiate_api(adapter);
3044 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
3045 if (err)
3046 dev_info(&pdev->dev, "Error reading MAC address\n");
3047 else if (is_zero_ether_addr(adapter->hw.mac.addr))
3048 dev_info(&pdev->dev,
3049 "MAC address not assigned by administrator.\n");
3050 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
3051 }
3052
3053 if (!is_valid_ether_addr(netdev->dev_addr)) {
3054 dev_info(&pdev->dev, "Assigning random MAC address\n");
3055 eth_hw_addr_random(netdev);
3056 ether_addr_copy(hw->mac.addr, netdev->dev_addr);
3057 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
3058 }
3059
3060
3061 adapter->rx_itr_setting = 1;
3062 adapter->tx_itr_setting = 1;
3063
3064
3065 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
3066 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
3067
3068 set_bit(__IXGBEVF_DOWN, &adapter->state);
3069 return 0;
3070
3071out:
3072 return err;
3073}
3074
3075#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
3076 { \
3077 u32 current_counter = IXGBE_READ_REG(hw, reg); \
3078 if (current_counter < last_counter) \
3079 counter += 0x100000000LL; \
3080 last_counter = current_counter; \
3081 counter &= 0xFFFFFFFF00000000LL; \
3082 counter |= current_counter; \
3083 }
3084
3085#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
3086 { \
3087 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
3088 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
3089 u64 current_counter = (current_counter_msb << 32) | \
3090 current_counter_lsb; \
3091 if (current_counter < last_counter) \
3092 counter += 0x1000000000LL; \
3093 last_counter = current_counter; \
3094 counter &= 0xFFFFFFF000000000LL; \
3095 counter |= current_counter; \
3096 }
3097
3098
3099
3100
3101void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
3102{
3103 struct ixgbe_hw *hw = &adapter->hw;
3104 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
3105 u64 alloc_rx_page = 0, hw_csum_rx_error = 0;
3106 int i;
3107
3108 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3109 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3110 return;
3111
3112 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
3113 adapter->stats.vfgprc);
3114 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
3115 adapter->stats.vfgptc);
3116 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
3117 adapter->stats.last_vfgorc,
3118 adapter->stats.vfgorc);
3119 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
3120 adapter->stats.last_vfgotc,
3121 adapter->stats.vfgotc);
3122 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
3123 adapter->stats.vfmprc);
3124
3125 for (i = 0; i < adapter->num_rx_queues; i++) {
3126 struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
3127
3128 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
3129 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
3130 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
3131 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
3132 }
3133
3134 adapter->hw_csum_rx_error = hw_csum_rx_error;
3135 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
3136 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
3137 adapter->alloc_rx_page = alloc_rx_page;
3138}
3139
3140
3141
3142
3143
3144static void ixgbevf_service_timer(struct timer_list *t)
3145{
3146 struct ixgbevf_adapter *adapter = from_timer(adapter, t,
3147 service_timer);
3148
3149
3150 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
3151
3152 ixgbevf_service_event_schedule(adapter);
3153}
3154
3155static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
3156{
3157 if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
3158 return;
3159
3160 rtnl_lock();
3161
3162 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3163 test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
3164 test_bit(__IXGBEVF_RESETTING, &adapter->state)) {
3165 rtnl_unlock();
3166 return;
3167 }
3168
3169 adapter->tx_timeout_count++;
3170
3171 ixgbevf_reinit_locked(adapter);
3172 rtnl_unlock();
3173}
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
3185{
3186 struct ixgbe_hw *hw = &adapter->hw;
3187 u32 eics = 0;
3188 int i;
3189
3190
3191 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3192 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3193 return;
3194
3195
3196 if (netif_carrier_ok(adapter->netdev)) {
3197 for (i = 0; i < adapter->num_tx_queues; i++)
3198 set_check_for_tx_hang(adapter->tx_ring[i]);
3199 for (i = 0; i < adapter->num_xdp_queues; i++)
3200 set_check_for_tx_hang(adapter->xdp_ring[i]);
3201 }
3202
3203
3204 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
3205 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
3206
3207 if (qv->rx.ring || qv->tx.ring)
3208 eics |= BIT(i);
3209 }
3210
3211
3212 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
3213}
3214
3215
3216
3217
3218
3219static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
3220{
3221 struct ixgbe_hw *hw = &adapter->hw;
3222 u32 link_speed = adapter->link_speed;
3223 bool link_up = adapter->link_up;
3224 s32 err;
3225
3226 spin_lock_bh(&adapter->mbx_lock);
3227
3228 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3229
3230 spin_unlock_bh(&adapter->mbx_lock);
3231
3232
3233 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
3234 set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
3235 link_up = false;
3236 }
3237
3238 adapter->link_up = link_up;
3239 adapter->link_speed = link_speed;
3240}
3241
3242
3243
3244
3245
3246
3247static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
3248{
3249 struct net_device *netdev = adapter->netdev;
3250
3251
3252 if (netif_carrier_ok(netdev))
3253 return;
3254
3255 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
3256 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
3257 "10 Gbps" :
3258 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
3259 "1 Gbps" :
3260 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
3261 "100 Mbps" :
3262 "unknown speed");
3263
3264 netif_carrier_on(netdev);
3265}
3266
3267
3268
3269
3270
3271
3272static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
3273{
3274 struct net_device *netdev = adapter->netdev;
3275
3276 adapter->link_speed = 0;
3277
3278
3279 if (!netif_carrier_ok(netdev))
3280 return;
3281
3282 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
3283
3284 netif_carrier_off(netdev);
3285}
3286
3287
3288
3289
3290
3291static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
3292{
3293
3294 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3295 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3296 return;
3297
3298 ixgbevf_watchdog_update_link(adapter);
3299
3300 if (adapter->link_up)
3301 ixgbevf_watchdog_link_is_up(adapter);
3302 else
3303 ixgbevf_watchdog_link_is_down(adapter);
3304
3305 ixgbevf_update_stats(adapter);
3306}
3307
3308
3309
3310
3311
3312static void ixgbevf_service_task(struct work_struct *work)
3313{
3314 struct ixgbevf_adapter *adapter = container_of(work,
3315 struct ixgbevf_adapter,
3316 service_task);
3317 struct ixgbe_hw *hw = &adapter->hw;
3318
3319 if (IXGBE_REMOVED(hw->hw_addr)) {
3320 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
3321 rtnl_lock();
3322 ixgbevf_down(adapter);
3323 rtnl_unlock();
3324 }
3325 return;
3326 }
3327
3328 ixgbevf_queue_reset_subtask(adapter);
3329 ixgbevf_reset_subtask(adapter);
3330 ixgbevf_watchdog_subtask(adapter);
3331 ixgbevf_check_hang_subtask(adapter);
3332
3333 ixgbevf_service_event_complete(adapter);
3334}
3335
3336
3337
3338
3339
3340
3341
3342void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
3343{
3344 ixgbevf_clean_tx_ring(tx_ring);
3345
3346 vfree(tx_ring->tx_buffer_info);
3347 tx_ring->tx_buffer_info = NULL;
3348
3349
3350 if (!tx_ring->desc)
3351 return;
3352
3353 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
3354 tx_ring->dma);
3355
3356 tx_ring->desc = NULL;
3357}
3358
3359
3360
3361
3362
3363
3364
3365static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
3366{
3367 int i;
3368
3369 for (i = 0; i < adapter->num_tx_queues; i++)
3370 if (adapter->tx_ring[i]->desc)
3371 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
3372 for (i = 0; i < adapter->num_xdp_queues; i++)
3373 if (adapter->xdp_ring[i]->desc)
3374 ixgbevf_free_tx_resources(adapter->xdp_ring[i]);
3375}
3376
3377
3378
3379
3380
3381
3382
3383int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
3384{
3385 struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
3386 int size;
3387
3388 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
3389 tx_ring->tx_buffer_info = vmalloc(size);
3390 if (!tx_ring->tx_buffer_info)
3391 goto err;
3392
3393 u64_stats_init(&tx_ring->syncp);
3394
3395
3396 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
3397 tx_ring->size = ALIGN(tx_ring->size, 4096);
3398
3399 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
3400 &tx_ring->dma, GFP_KERNEL);
3401 if (!tx_ring->desc)
3402 goto err;
3403
3404 return 0;
3405
3406err:
3407 vfree(tx_ring->tx_buffer_info);
3408 tx_ring->tx_buffer_info = NULL;
3409 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
3410 return -ENOMEM;
3411}
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3424{
3425 int i, j = 0, err = 0;
3426
3427 for (i = 0; i < adapter->num_tx_queues; i++) {
3428 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
3429 if (!err)
3430 continue;
3431 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
3432 goto err_setup_tx;
3433 }
3434
3435 for (j = 0; j < adapter->num_xdp_queues; j++) {
3436 err = ixgbevf_setup_tx_resources(adapter->xdp_ring[j]);
3437 if (!err)
3438 continue;
3439 hw_dbg(&adapter->hw, "Allocation for XDP Queue %u failed\n", j);
3440 goto err_setup_tx;
3441 }
3442
3443 return 0;
3444err_setup_tx:
3445
3446 while (j--)
3447 ixgbevf_free_tx_resources(adapter->xdp_ring[j]);
3448 while (i--)
3449 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
3450
3451 return err;
3452}
3453
3454
3455
3456
3457
3458
3459
3460
3461int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
3462 struct ixgbevf_ring *rx_ring)
3463{
3464 int size;
3465
3466 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
3467 rx_ring->rx_buffer_info = vmalloc(size);
3468 if (!rx_ring->rx_buffer_info)
3469 goto err;
3470
3471 u64_stats_init(&rx_ring->syncp);
3472
3473
3474 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3475 rx_ring->size = ALIGN(rx_ring->size, 4096);
3476
3477 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
3478 &rx_ring->dma, GFP_KERNEL);
3479
3480 if (!rx_ring->desc)
3481 goto err;
3482
3483
3484 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
3485 rx_ring->queue_index) < 0)
3486 goto err;
3487
3488 rx_ring->xdp_prog = adapter->xdp_prog;
3489
3490 return 0;
3491err:
3492 vfree(rx_ring->rx_buffer_info);
3493 rx_ring->rx_buffer_info = NULL;
3494 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
3495 return -ENOMEM;
3496}
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3509{
3510 int i, err = 0;
3511
3512 for (i = 0; i < adapter->num_rx_queues; i++) {
3513 err = ixgbevf_setup_rx_resources(adapter, adapter->rx_ring[i]);
3514 if (!err)
3515 continue;
3516 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
3517 goto err_setup_rx;
3518 }
3519
3520 return 0;
3521err_setup_rx:
3522
3523 while (i--)
3524 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
3525 return err;
3526}
3527
3528
3529
3530
3531
3532
3533
3534void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
3535{
3536 ixgbevf_clean_rx_ring(rx_ring);
3537
3538 rx_ring->xdp_prog = NULL;
3539 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
3540 vfree(rx_ring->rx_buffer_info);
3541 rx_ring->rx_buffer_info = NULL;
3542
3543 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
3544 rx_ring->dma);
3545
3546 rx_ring->desc = NULL;
3547}
3548
3549
3550
3551
3552
3553
3554
3555static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3556{
3557 int i;
3558
3559 for (i = 0; i < adapter->num_rx_queues; i++)
3560 if (adapter->rx_ring[i]->desc)
3561 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
3562}
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576int ixgbevf_open(struct net_device *netdev)
3577{
3578 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3579 struct ixgbe_hw *hw = &adapter->hw;
3580 int err;
3581
3582
3583
3584
3585
3586
3587
3588 if (!adapter->num_msix_vectors)
3589 return -ENOMEM;
3590
3591 if (hw->adapter_stopped) {
3592 ixgbevf_reset(adapter);
3593
3594
3595
3596 if (hw->adapter_stopped) {
3597 err = IXGBE_ERR_MBX;
3598 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
3599 goto err_setup_reset;
3600 }
3601 }
3602
3603
3604 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3605 return -EBUSY;
3606
3607 netif_carrier_off(netdev);
3608
3609
3610 err = ixgbevf_setup_all_tx_resources(adapter);
3611 if (err)
3612 goto err_setup_tx;
3613
3614
3615 err = ixgbevf_setup_all_rx_resources(adapter);
3616 if (err)
3617 goto err_setup_rx;
3618
3619 ixgbevf_configure(adapter);
3620
3621 err = ixgbevf_request_irq(adapter);
3622 if (err)
3623 goto err_req_irq;
3624
3625
3626 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
3627 if (err)
3628 goto err_set_queues;
3629
3630 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
3631 if (err)
3632 goto err_set_queues;
3633
3634 ixgbevf_up_complete(adapter);
3635
3636 return 0;
3637
3638err_set_queues:
3639 ixgbevf_free_irq(adapter);
3640err_req_irq:
3641 ixgbevf_free_all_rx_resources(adapter);
3642err_setup_rx:
3643 ixgbevf_free_all_tx_resources(adapter);
3644err_setup_tx:
3645 ixgbevf_reset(adapter);
3646err_setup_reset:
3647
3648 return err;
3649}
3650
3651
3652
3653
3654
3655
3656
3657
3658static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter)
3659{
3660 ixgbevf_down(adapter);
3661 ixgbevf_free_irq(adapter);
3662 ixgbevf_free_all_tx_resources(adapter);
3663 ixgbevf_free_all_rx_resources(adapter);
3664}
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677int ixgbevf_close(struct net_device *netdev)
3678{
3679 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3680
3681 if (netif_device_present(netdev))
3682 ixgbevf_close_suspend(adapter);
3683
3684 return 0;
3685}
3686
3687static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3688{
3689 struct net_device *dev = adapter->netdev;
3690
3691 if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
3692 &adapter->state))
3693 return;
3694
3695
3696 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3697 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3698 return;
3699
3700
3701
3702
3703
3704 rtnl_lock();
3705
3706 if (netif_running(dev))
3707 ixgbevf_close(dev);
3708
3709 ixgbevf_clear_interrupt_scheme(adapter);
3710 ixgbevf_init_interrupt_scheme(adapter);
3711
3712 if (netif_running(dev))
3713 ixgbevf_open(dev);
3714
3715 rtnl_unlock();
3716}
3717
3718static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3719 u32 vlan_macip_lens, u32 fceof_saidx,
3720 u32 type_tucmd, u32 mss_l4len_idx)
3721{
3722 struct ixgbe_adv_tx_context_desc *context_desc;
3723 u16 i = tx_ring->next_to_use;
3724
3725 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
3726
3727 i++;
3728 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
3729
3730
3731 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
3732
3733 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3734 context_desc->fceof_saidx = cpu_to_le32(fceof_saidx);
3735 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3736 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3737}
3738
3739static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
3740 struct ixgbevf_tx_buffer *first,
3741 u8 *hdr_len,
3742 struct ixgbevf_ipsec_tx_data *itd)
3743{
3744 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
3745 struct sk_buff *skb = first->skb;
3746 union {
3747 struct iphdr *v4;
3748 struct ipv6hdr *v6;
3749 unsigned char *hdr;
3750 } ip;
3751 union {
3752 struct tcphdr *tcp;
3753 unsigned char *hdr;
3754 } l4;
3755 u32 paylen, l4_offset;
3756 u32 fceof_saidx = 0;
3757 int err;
3758
3759 if (skb->ip_summed != CHECKSUM_PARTIAL)
3760 return 0;
3761
3762 if (!skb_is_gso(skb))
3763 return 0;
3764
3765 err = skb_cow_head(skb, 0);
3766 if (err < 0)
3767 return err;
3768
3769 if (eth_p_mpls(first->protocol))
3770 ip.hdr = skb_inner_network_header(skb);
3771 else
3772 ip.hdr = skb_network_header(skb);
3773 l4.hdr = skb_checksum_start(skb);
3774
3775
3776 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3777
3778
3779 if (ip.v4->version == 4) {
3780 unsigned char *csum_start = skb_checksum_start(skb);
3781 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
3782 int len = csum_start - trans_start;
3783
3784
3785
3786
3787
3788 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
3789 csum_fold(csum_partial(trans_start,
3790 len, 0)) : 0;
3791 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3792
3793 ip.v4->tot_len = 0;
3794 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3795 IXGBE_TX_FLAGS_CSUM |
3796 IXGBE_TX_FLAGS_IPV4;
3797 } else {
3798 ip.v6->payload_len = 0;
3799 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3800 IXGBE_TX_FLAGS_CSUM;
3801 }
3802
3803
3804 l4_offset = l4.hdr - skb->data;
3805
3806
3807 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
3808
3809
3810 paylen = skb->len - l4_offset;
3811 csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
3812
3813
3814 first->gso_segs = skb_shinfo(skb)->gso_segs;
3815 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3816
3817
3818 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
3819 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
3820 mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT);
3821
3822 fceof_saidx |= itd->pfsa;
3823 type_tucmd |= itd->flags | itd->trailer_len;
3824
3825
3826 vlan_macip_lens = l4.hdr - ip.hdr;
3827 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
3828 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
3829
3830 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
3831 mss_l4len_idx);
3832
3833 return 1;
3834}
3835
3836static inline bool ixgbevf_ipv6_csum_is_sctp(struct sk_buff *skb)
3837{
3838 unsigned int offset = 0;
3839
3840 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
3841
3842 return offset == skb_checksum_start_offset(skb);
3843}
3844
3845static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3846 struct ixgbevf_tx_buffer *first,
3847 struct ixgbevf_ipsec_tx_data *itd)
3848{
3849 struct sk_buff *skb = first->skb;
3850 u32 vlan_macip_lens = 0;
3851 u32 fceof_saidx = 0;
3852 u32 type_tucmd = 0;
3853
3854 if (skb->ip_summed != CHECKSUM_PARTIAL)
3855 goto no_csum;
3856
3857 switch (skb->csum_offset) {
3858 case offsetof(struct tcphdr, check):
3859 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3860
3861 case offsetof(struct udphdr, check):
3862 break;
3863 case offsetof(struct sctphdr, checksum):
3864
3865 if (((first->protocol == htons(ETH_P_IP)) &&
3866 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
3867 ((first->protocol == htons(ETH_P_IPV6)) &&
3868 ixgbevf_ipv6_csum_is_sctp(skb))) {
3869 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
3870 break;
3871 }
3872
3873 default:
3874 skb_checksum_help(skb);
3875 goto no_csum;
3876 }
3877
3878 if (first->protocol == htons(ETH_P_IP))
3879 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3880
3881
3882 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
3883 vlan_macip_lens = skb_checksum_start_offset(skb) -
3884 skb_network_offset(skb);
3885no_csum:
3886
3887 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
3888 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
3889
3890 fceof_saidx |= itd->pfsa;
3891 type_tucmd |= itd->flags | itd->trailer_len;
3892
3893 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3894 fceof_saidx, type_tucmd, 0);
3895}
3896
3897static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
3898{
3899
3900 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3901 IXGBE_ADVTXD_DCMD_IFCS |
3902 IXGBE_ADVTXD_DCMD_DEXT);
3903
3904
3905 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3906 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
3907
3908
3909 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3910 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
3911
3912 return cmd_type;
3913}
3914
3915static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3916 u32 tx_flags, unsigned int paylen)
3917{
3918 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
3919
3920
3921 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3922 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
3923
3924
3925 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3926 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
3927
3928
3929 if (tx_flags & IXGBE_TX_FLAGS_IPSEC)
3930 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IPSEC);
3931
3932
3933 if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_IPSEC))
3934 olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT);
3935
3936
3937
3938
3939 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
3940
3941 tx_desc->read.olinfo_status = olinfo_status;
3942}
3943
3944static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3945 struct ixgbevf_tx_buffer *first,
3946 const u8 hdr_len)
3947{
3948 struct sk_buff *skb = first->skb;
3949 struct ixgbevf_tx_buffer *tx_buffer;
3950 union ixgbe_adv_tx_desc *tx_desc;
3951 skb_frag_t *frag;
3952 dma_addr_t dma;
3953 unsigned int data_len, size;
3954 u32 tx_flags = first->tx_flags;
3955 __le32 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
3956 u16 i = tx_ring->next_to_use;
3957
3958 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
3959
3960 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
3961
3962 size = skb_headlen(skb);
3963 data_len = skb->data_len;
3964
3965 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3966
3967 tx_buffer = first;
3968
3969 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
3970 if (dma_mapping_error(tx_ring->dev, dma))
3971 goto dma_error;
3972
3973
3974 dma_unmap_len_set(tx_buffer, len, size);
3975 dma_unmap_addr_set(tx_buffer, dma, dma);
3976
3977 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3978
3979 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3980 tx_desc->read.cmd_type_len =
3981 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
3982
3983 i++;
3984 tx_desc++;
3985 if (i == tx_ring->count) {
3986 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3987 i = 0;
3988 }
3989 tx_desc->read.olinfo_status = 0;
3990
3991 dma += IXGBE_MAX_DATA_PER_TXD;
3992 size -= IXGBE_MAX_DATA_PER_TXD;
3993
3994 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3995 }
3996
3997 if (likely(!data_len))
3998 break;
3999
4000 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
4001
4002 i++;
4003 tx_desc++;
4004 if (i == tx_ring->count) {
4005 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
4006 i = 0;
4007 }
4008 tx_desc->read.olinfo_status = 0;
4009
4010 size = skb_frag_size(frag);
4011 data_len -= size;
4012
4013 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
4014 DMA_TO_DEVICE);
4015
4016 tx_buffer = &tx_ring->tx_buffer_info[i];
4017 }
4018
4019
4020 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
4021 tx_desc->read.cmd_type_len = cmd_type;
4022
4023
4024 first->time_stamp = jiffies;
4025
4026 skb_tx_timestamp(skb);
4027
4028
4029
4030
4031
4032
4033
4034
4035 wmb();
4036
4037
4038 first->next_to_watch = tx_desc;
4039
4040 i++;
4041 if (i == tx_ring->count)
4042 i = 0;
4043
4044 tx_ring->next_to_use = i;
4045
4046
4047 ixgbevf_write_tail(tx_ring, i);
4048
4049 return;
4050dma_error:
4051 dev_err(tx_ring->dev, "TX DMA map failed\n");
4052 tx_buffer = &tx_ring->tx_buffer_info[i];
4053
4054
4055 while (tx_buffer != first) {
4056 if (dma_unmap_len(tx_buffer, len))
4057 dma_unmap_page(tx_ring->dev,
4058 dma_unmap_addr(tx_buffer, dma),
4059 dma_unmap_len(tx_buffer, len),
4060 DMA_TO_DEVICE);
4061 dma_unmap_len_set(tx_buffer, len, 0);
4062
4063 if (i-- == 0)
4064 i += tx_ring->count;
4065 tx_buffer = &tx_ring->tx_buffer_info[i];
4066 }
4067
4068 if (dma_unmap_len(tx_buffer, len))
4069 dma_unmap_single(tx_ring->dev,
4070 dma_unmap_addr(tx_buffer, dma),
4071 dma_unmap_len(tx_buffer, len),
4072 DMA_TO_DEVICE);
4073 dma_unmap_len_set(tx_buffer, len, 0);
4074
4075 dev_kfree_skb_any(tx_buffer->skb);
4076 tx_buffer->skb = NULL;
4077
4078 tx_ring->next_to_use = i;
4079}
4080
4081static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
4082{
4083 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
4084
4085
4086
4087
4088 smp_mb();
4089
4090
4091
4092
4093 if (likely(ixgbevf_desc_unused(tx_ring) < size))
4094 return -EBUSY;
4095
4096
4097 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
4098 ++tx_ring->tx_stats.restart_queue;
4099
4100 return 0;
4101}
4102
4103static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
4104{
4105 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
4106 return 0;
4107 return __ixgbevf_maybe_stop_tx(tx_ring, size);
4108}
4109
4110static int ixgbevf_xmit_frame_ring(struct sk_buff *skb,
4111 struct ixgbevf_ring *tx_ring)
4112{
4113 struct ixgbevf_tx_buffer *first;
4114 int tso;
4115 u32 tx_flags = 0;
4116 u16 count = TXD_USE_COUNT(skb_headlen(skb));
4117 struct ixgbevf_ipsec_tx_data ipsec_tx = { 0 };
4118#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
4119 unsigned short f;
4120#endif
4121 u8 hdr_len = 0;
4122 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
4123
4124 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
4125 dev_kfree_skb_any(skb);
4126 return NETDEV_TX_OK;
4127 }
4128
4129
4130
4131
4132
4133
4134
4135#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
4136 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
4137 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
4138
4139 count += TXD_USE_COUNT(skb_frag_size(frag));
4140 }
4141#else
4142 count += skb_shinfo(skb)->nr_frags;
4143#endif
4144 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
4145 tx_ring->tx_stats.tx_busy++;
4146 return NETDEV_TX_BUSY;
4147 }
4148
4149
4150 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4151 first->skb = skb;
4152 first->bytecount = skb->len;
4153 first->gso_segs = 1;
4154
4155 if (skb_vlan_tag_present(skb)) {
4156 tx_flags |= skb_vlan_tag_get(skb);
4157 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
4158 tx_flags |= IXGBE_TX_FLAGS_VLAN;
4159 }
4160
4161
4162 first->tx_flags = tx_flags;
4163 first->protocol = vlan_get_protocol(skb);
4164
4165#ifdef CONFIG_IXGBEVF_IPSEC
4166 if (xfrm_offload(skb) && !ixgbevf_ipsec_tx(tx_ring, first, &ipsec_tx))
4167 goto out_drop;
4168#endif
4169 tso = ixgbevf_tso(tx_ring, first, &hdr_len, &ipsec_tx);
4170 if (tso < 0)
4171 goto out_drop;
4172 else if (!tso)
4173 ixgbevf_tx_csum(tx_ring, first, &ipsec_tx);
4174
4175 ixgbevf_tx_map(tx_ring, first, hdr_len);
4176
4177 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
4178
4179 return NETDEV_TX_OK;
4180
4181out_drop:
4182 dev_kfree_skb_any(first->skb);
4183 first->skb = NULL;
4184
4185 return NETDEV_TX_OK;
4186}
4187
4188static netdev_tx_t ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
4189{
4190 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4191 struct ixgbevf_ring *tx_ring;
4192
4193 if (skb->len <= 0) {
4194 dev_kfree_skb_any(skb);
4195 return NETDEV_TX_OK;
4196 }
4197
4198
4199
4200
4201 if (skb->len < 17) {
4202 if (skb_padto(skb, 17))
4203 return NETDEV_TX_OK;
4204 skb->len = 17;
4205 }
4206
4207 tx_ring = adapter->tx_ring[skb->queue_mapping];
4208 return ixgbevf_xmit_frame_ring(skb, tx_ring);
4209}
4210
4211
4212
4213
4214
4215
4216
4217
4218static int ixgbevf_set_mac(struct net_device *netdev, void *p)
4219{
4220 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4221 struct ixgbe_hw *hw = &adapter->hw;
4222 struct sockaddr *addr = p;
4223 int err;
4224
4225 if (!is_valid_ether_addr(addr->sa_data))
4226 return -EADDRNOTAVAIL;
4227
4228 spin_lock_bh(&adapter->mbx_lock);
4229
4230 err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
4231
4232 spin_unlock_bh(&adapter->mbx_lock);
4233
4234 if (err)
4235 return -EPERM;
4236
4237 ether_addr_copy(hw->mac.addr, addr->sa_data);
4238 ether_addr_copy(hw->mac.perm_addr, addr->sa_data);
4239 ether_addr_copy(netdev->dev_addr, addr->sa_data);
4240
4241 return 0;
4242}
4243
4244
4245
4246
4247
4248
4249
4250
4251static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
4252{
4253 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4254 struct ixgbe_hw *hw = &adapter->hw;
4255 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4256 int ret;
4257
4258
4259 if (adapter->xdp_prog) {
4260 dev_warn(&adapter->pdev->dev, "MTU cannot be changed while XDP program is loaded\n");
4261 return -EPERM;
4262 }
4263
4264 spin_lock_bh(&adapter->mbx_lock);
4265
4266 ret = hw->mac.ops.set_rlpml(hw, max_frame);
4267 spin_unlock_bh(&adapter->mbx_lock);
4268 if (ret)
4269 return -EINVAL;
4270
4271 hw_dbg(hw, "changing MTU from %d to %d\n",
4272 netdev->mtu, new_mtu);
4273
4274
4275 netdev->mtu = new_mtu;
4276
4277 if (netif_running(netdev))
4278 ixgbevf_reinit_locked(adapter);
4279
4280 return 0;
4281}
4282
4283static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
4284{
4285 struct net_device *netdev = pci_get_drvdata(pdev);
4286 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4287#ifdef CONFIG_PM
4288 int retval = 0;
4289#endif
4290
4291 rtnl_lock();
4292 netif_device_detach(netdev);
4293
4294 if (netif_running(netdev))
4295 ixgbevf_close_suspend(adapter);
4296
4297 ixgbevf_clear_interrupt_scheme(adapter);
4298 rtnl_unlock();
4299
4300#ifdef CONFIG_PM
4301 retval = pci_save_state(pdev);
4302 if (retval)
4303 return retval;
4304
4305#endif
4306 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4307 pci_disable_device(pdev);
4308
4309 return 0;
4310}
4311
4312#ifdef CONFIG_PM
4313static int ixgbevf_resume(struct pci_dev *pdev)
4314{
4315 struct net_device *netdev = pci_get_drvdata(pdev);
4316 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4317 u32 err;
4318
4319 pci_restore_state(pdev);
4320
4321
4322
4323 pci_save_state(pdev);
4324
4325 err = pci_enable_device_mem(pdev);
4326 if (err) {
4327 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
4328 return err;
4329 }
4330
4331 adapter->hw.hw_addr = adapter->io_addr;
4332 smp_mb__before_atomic();
4333 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
4334 pci_set_master(pdev);
4335
4336 ixgbevf_reset(adapter);
4337
4338 rtnl_lock();
4339 err = ixgbevf_init_interrupt_scheme(adapter);
4340 if (!err && netif_running(netdev))
4341 err = ixgbevf_open(netdev);
4342 rtnl_unlock();
4343 if (err)
4344 return err;
4345
4346 netif_device_attach(netdev);
4347
4348 return err;
4349}
4350
4351#endif
4352static void ixgbevf_shutdown(struct pci_dev *pdev)
4353{
4354 ixgbevf_suspend(pdev, PMSG_SUSPEND);
4355}
4356
4357static void ixgbevf_get_tx_ring_stats(struct rtnl_link_stats64 *stats,
4358 const struct ixgbevf_ring *ring)
4359{
4360 u64 bytes, packets;
4361 unsigned int start;
4362
4363 if (ring) {
4364 do {
4365 start = u64_stats_fetch_begin_irq(&ring->syncp);
4366 bytes = ring->stats.bytes;
4367 packets = ring->stats.packets;
4368 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4369 stats->tx_bytes += bytes;
4370 stats->tx_packets += packets;
4371 }
4372}
4373
4374static void ixgbevf_get_stats(struct net_device *netdev,
4375 struct rtnl_link_stats64 *stats)
4376{
4377 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4378 unsigned int start;
4379 u64 bytes, packets;
4380 const struct ixgbevf_ring *ring;
4381 int i;
4382
4383 ixgbevf_update_stats(adapter);
4384
4385 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
4386
4387 rcu_read_lock();
4388 for (i = 0; i < adapter->num_rx_queues; i++) {
4389 ring = adapter->rx_ring[i];
4390 do {
4391 start = u64_stats_fetch_begin_irq(&ring->syncp);
4392 bytes = ring->stats.bytes;
4393 packets = ring->stats.packets;
4394 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4395 stats->rx_bytes += bytes;
4396 stats->rx_packets += packets;
4397 }
4398
4399 for (i = 0; i < adapter->num_tx_queues; i++) {
4400 ring = adapter->tx_ring[i];
4401 ixgbevf_get_tx_ring_stats(stats, ring);
4402 }
4403
4404 for (i = 0; i < adapter->num_xdp_queues; i++) {
4405 ring = adapter->xdp_ring[i];
4406 ixgbevf_get_tx_ring_stats(stats, ring);
4407 }
4408 rcu_read_unlock();
4409}
4410
4411#define IXGBEVF_MAX_MAC_HDR_LEN 127
4412#define IXGBEVF_MAX_NETWORK_HDR_LEN 511
4413
4414static netdev_features_t
4415ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev,
4416 netdev_features_t features)
4417{
4418 unsigned int network_hdr_len, mac_hdr_len;
4419
4420
4421 mac_hdr_len = skb_network_header(skb) - skb->data;
4422 if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN))
4423 return features & ~(NETIF_F_HW_CSUM |
4424 NETIF_F_SCTP_CRC |
4425 NETIF_F_HW_VLAN_CTAG_TX |
4426 NETIF_F_TSO |
4427 NETIF_F_TSO6);
4428
4429 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
4430 if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN))
4431 return features & ~(NETIF_F_HW_CSUM |
4432 NETIF_F_SCTP_CRC |
4433 NETIF_F_TSO |
4434 NETIF_F_TSO6);
4435
4436
4437
4438
4439 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
4440 features &= ~NETIF_F_TSO;
4441
4442 return features;
4443}
4444
4445static int ixgbevf_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
4446{
4447 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
4448 struct ixgbevf_adapter *adapter = netdev_priv(dev);
4449 struct bpf_prog *old_prog;
4450
4451
4452 for (i = 0; i < adapter->num_rx_queues; i++) {
4453 struct ixgbevf_ring *ring = adapter->rx_ring[i];
4454
4455 if (frame_size > ixgbevf_rx_bufsz(ring))
4456 return -EINVAL;
4457 }
4458
4459 old_prog = xchg(&adapter->xdp_prog, prog);
4460
4461
4462 if (!!prog != !!old_prog) {
4463
4464
4465
4466
4467 if (netif_running(dev))
4468 ixgbevf_close(dev);
4469
4470 ixgbevf_clear_interrupt_scheme(adapter);
4471 ixgbevf_init_interrupt_scheme(adapter);
4472
4473 if (netif_running(dev))
4474 ixgbevf_open(dev);
4475 } else {
4476 for (i = 0; i < adapter->num_rx_queues; i++)
4477 xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
4478 }
4479
4480 if (old_prog)
4481 bpf_prog_put(old_prog);
4482
4483 return 0;
4484}
4485
4486static int ixgbevf_xdp(struct net_device *dev, struct netdev_bpf *xdp)
4487{
4488 struct ixgbevf_adapter *adapter = netdev_priv(dev);
4489
4490 switch (xdp->command) {
4491 case XDP_SETUP_PROG:
4492 return ixgbevf_xdp_setup(dev, xdp->prog);
4493 case XDP_QUERY_PROG:
4494 xdp->prog_id = adapter->xdp_prog ?
4495 adapter->xdp_prog->aux->id : 0;
4496 return 0;
4497 default:
4498 return -EINVAL;
4499 }
4500}
4501
4502static const struct net_device_ops ixgbevf_netdev_ops = {
4503 .ndo_open = ixgbevf_open,
4504 .ndo_stop = ixgbevf_close,
4505 .ndo_start_xmit = ixgbevf_xmit_frame,
4506 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4507 .ndo_get_stats64 = ixgbevf_get_stats,
4508 .ndo_validate_addr = eth_validate_addr,
4509 .ndo_set_mac_address = ixgbevf_set_mac,
4510 .ndo_change_mtu = ixgbevf_change_mtu,
4511 .ndo_tx_timeout = ixgbevf_tx_timeout,
4512 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
4513 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
4514 .ndo_features_check = ixgbevf_features_check,
4515 .ndo_bpf = ixgbevf_xdp,
4516};
4517
4518static void ixgbevf_assign_netdev_ops(struct net_device *dev)
4519{
4520 dev->netdev_ops = &ixgbevf_netdev_ops;
4521 ixgbevf_set_ethtool_ops(dev);
4522 dev->watchdog_timeo = 5 * HZ;
4523}
4524
4525
4526
4527
4528
4529
4530
4531
4532
4533
4534
4535
4536static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4537{
4538 struct net_device *netdev;
4539 struct ixgbevf_adapter *adapter = NULL;
4540 struct ixgbe_hw *hw = NULL;
4541 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
4542 int err, pci_using_dac;
4543 bool disable_dev = false;
4544
4545 err = pci_enable_device(pdev);
4546 if (err)
4547 return err;
4548
4549 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
4550 pci_using_dac = 1;
4551 } else {
4552 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
4553 if (err) {
4554 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
4555 goto err_dma;
4556 }
4557 pci_using_dac = 0;
4558 }
4559
4560 err = pci_request_regions(pdev, ixgbevf_driver_name);
4561 if (err) {
4562 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4563 goto err_pci_reg;
4564 }
4565
4566 pci_set_master(pdev);
4567
4568 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
4569 MAX_TX_QUEUES);
4570 if (!netdev) {
4571 err = -ENOMEM;
4572 goto err_alloc_etherdev;
4573 }
4574
4575 SET_NETDEV_DEV(netdev, &pdev->dev);
4576
4577 adapter = netdev_priv(netdev);
4578
4579 adapter->netdev = netdev;
4580 adapter->pdev = pdev;
4581 hw = &adapter->hw;
4582 hw->back = adapter;
4583 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
4584
4585
4586
4587
4588 pci_save_state(pdev);
4589
4590 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4591 pci_resource_len(pdev, 0));
4592 adapter->io_addr = hw->hw_addr;
4593 if (!hw->hw_addr) {
4594 err = -EIO;
4595 goto err_ioremap;
4596 }
4597
4598 ixgbevf_assign_netdev_ops(netdev);
4599
4600
4601 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4602 hw->mac.type = ii->mac;
4603
4604 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
4605 sizeof(struct ixgbe_mbx_operations));
4606
4607
4608 err = ixgbevf_sw_init(adapter);
4609 if (err)
4610 goto err_sw_init;
4611
4612
4613 if (!is_valid_ether_addr(netdev->dev_addr)) {
4614 pr_err("invalid MAC address\n");
4615 err = -EIO;
4616 goto err_sw_init;
4617 }
4618
4619 netdev->hw_features = NETIF_F_SG |
4620 NETIF_F_TSO |
4621 NETIF_F_TSO6 |
4622 NETIF_F_RXCSUM |
4623 NETIF_F_HW_CSUM |
4624 NETIF_F_SCTP_CRC;
4625
4626#define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
4627 NETIF_F_GSO_GRE_CSUM | \
4628 NETIF_F_GSO_IPXIP4 | \
4629 NETIF_F_GSO_IPXIP6 | \
4630 NETIF_F_GSO_UDP_TUNNEL | \
4631 NETIF_F_GSO_UDP_TUNNEL_CSUM)
4632
4633 netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES;
4634 netdev->hw_features |= NETIF_F_GSO_PARTIAL |
4635 IXGBEVF_GSO_PARTIAL_FEATURES;
4636
4637 netdev->features = netdev->hw_features;
4638
4639 if (pci_using_dac)
4640 netdev->features |= NETIF_F_HIGHDMA;
4641
4642 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
4643 netdev->mpls_features |= NETIF_F_SG |
4644 NETIF_F_TSO |
4645 NETIF_F_TSO6 |
4646 NETIF_F_HW_CSUM;
4647 netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES;
4648 netdev->hw_enc_features |= netdev->vlan_features;
4649
4650
4651 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
4652 NETIF_F_HW_VLAN_CTAG_RX |
4653 NETIF_F_HW_VLAN_CTAG_TX;
4654
4655 netdev->priv_flags |= IFF_UNICAST_FLT;
4656
4657
4658 netdev->min_mtu = ETH_MIN_MTU;
4659 switch (adapter->hw.api_version) {
4660 case ixgbe_mbox_api_11:
4661 case ixgbe_mbox_api_12:
4662 case ixgbe_mbox_api_13:
4663 case ixgbe_mbox_api_14:
4664 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4665 (ETH_HLEN + ETH_FCS_LEN);
4666 break;
4667 default:
4668 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
4669 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
4670 (ETH_HLEN + ETH_FCS_LEN);
4671 else
4672 netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN;
4673 break;
4674 }
4675
4676 if (IXGBE_REMOVED(hw->hw_addr)) {
4677 err = -EIO;
4678 goto err_sw_init;
4679 }
4680
4681 timer_setup(&adapter->service_timer, ixgbevf_service_timer, 0);
4682
4683 INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4684 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4685 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
4686
4687 err = ixgbevf_init_interrupt_scheme(adapter);
4688 if (err)
4689 goto err_sw_init;
4690
4691 strcpy(netdev->name, "eth%d");
4692
4693 err = register_netdev(netdev);
4694 if (err)
4695 goto err_register;
4696
4697 pci_set_drvdata(pdev, netdev);
4698 netif_carrier_off(netdev);
4699 ixgbevf_init_ipsec_offload(adapter);
4700
4701 ixgbevf_init_last_counter_stats(adapter);
4702
4703
4704 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4705 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
4706
4707 switch (hw->mac.type) {
4708 case ixgbe_mac_X550_vf:
4709 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4710 break;
4711 case ixgbe_mac_X540_vf:
4712 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4713 break;
4714 case ixgbe_mac_82599_vf:
4715 default:
4716 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4717 break;
4718 }
4719
4720 return 0;
4721
4722err_register:
4723 ixgbevf_clear_interrupt_scheme(adapter);
4724err_sw_init:
4725 ixgbevf_reset_interrupt_capability(adapter);
4726 iounmap(adapter->io_addr);
4727 kfree(adapter->rss_key);
4728err_ioremap:
4729 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
4730 free_netdev(netdev);
4731err_alloc_etherdev:
4732 pci_release_regions(pdev);
4733err_pci_reg:
4734err_dma:
4735 if (!adapter || disable_dev)
4736 pci_disable_device(pdev);
4737 return err;
4738}
4739
4740
4741
4742
4743
4744
4745
4746
4747
4748
4749static void ixgbevf_remove(struct pci_dev *pdev)
4750{
4751 struct net_device *netdev = pci_get_drvdata(pdev);
4752 struct ixgbevf_adapter *adapter;
4753 bool disable_dev;
4754
4755 if (!netdev)
4756 return;
4757
4758 adapter = netdev_priv(netdev);
4759
4760 set_bit(__IXGBEVF_REMOVING, &adapter->state);
4761 cancel_work_sync(&adapter->service_task);
4762
4763 if (netdev->reg_state == NETREG_REGISTERED)
4764 unregister_netdev(netdev);
4765
4766 ixgbevf_stop_ipsec_offload(adapter);
4767 ixgbevf_clear_interrupt_scheme(adapter);
4768 ixgbevf_reset_interrupt_capability(adapter);
4769
4770 iounmap(adapter->io_addr);
4771 pci_release_regions(pdev);
4772
4773 hw_dbg(&adapter->hw, "Remove complete\n");
4774
4775 kfree(adapter->rss_key);
4776 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
4777 free_netdev(netdev);
4778
4779 if (disable_dev)
4780 pci_disable_device(pdev);
4781}
4782
4783
4784
4785
4786
4787
4788
4789
4790
4791static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4792 pci_channel_state_t state)
4793{
4794 struct net_device *netdev = pci_get_drvdata(pdev);
4795 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4796
4797 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
4798 return PCI_ERS_RESULT_DISCONNECT;
4799
4800 rtnl_lock();
4801 netif_device_detach(netdev);
4802
4803 if (netif_running(netdev))
4804 ixgbevf_close_suspend(adapter);
4805
4806 if (state == pci_channel_io_perm_failure) {
4807 rtnl_unlock();
4808 return PCI_ERS_RESULT_DISCONNECT;
4809 }
4810
4811 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4812 pci_disable_device(pdev);
4813 rtnl_unlock();
4814
4815
4816 return PCI_ERS_RESULT_NEED_RESET;
4817}
4818
4819
4820
4821
4822
4823
4824
4825
4826static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4827{
4828 struct net_device *netdev = pci_get_drvdata(pdev);
4829 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4830
4831 if (pci_enable_device_mem(pdev)) {
4832 dev_err(&pdev->dev,
4833 "Cannot re-enable PCI device after reset.\n");
4834 return PCI_ERS_RESULT_DISCONNECT;
4835 }
4836
4837 adapter->hw.hw_addr = adapter->io_addr;
4838 smp_mb__before_atomic();
4839 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
4840 pci_set_master(pdev);
4841
4842 ixgbevf_reset(adapter);
4843
4844 return PCI_ERS_RESULT_RECOVERED;
4845}
4846
4847
4848
4849
4850
4851
4852
4853
4854
4855static void ixgbevf_io_resume(struct pci_dev *pdev)
4856{
4857 struct net_device *netdev = pci_get_drvdata(pdev);
4858
4859 rtnl_lock();
4860 if (netif_running(netdev))
4861 ixgbevf_open(netdev);
4862
4863 netif_device_attach(netdev);
4864 rtnl_unlock();
4865}
4866
4867
4868static const struct pci_error_handlers ixgbevf_err_handler = {
4869 .error_detected = ixgbevf_io_error_detected,
4870 .slot_reset = ixgbevf_io_slot_reset,
4871 .resume = ixgbevf_io_resume,
4872};
4873
4874static struct pci_driver ixgbevf_driver = {
4875 .name = ixgbevf_driver_name,
4876 .id_table = ixgbevf_pci_tbl,
4877 .probe = ixgbevf_probe,
4878 .remove = ixgbevf_remove,
4879#ifdef CONFIG_PM
4880
4881 .suspend = ixgbevf_suspend,
4882 .resume = ixgbevf_resume,
4883#endif
4884 .shutdown = ixgbevf_shutdown,
4885 .err_handler = &ixgbevf_err_handler
4886};
4887
4888
4889
4890
4891
4892
4893
4894static int __init ixgbevf_init_module(void)
4895{
4896 pr_info("%s - version %s\n", ixgbevf_driver_string,
4897 ixgbevf_driver_version);
4898
4899 pr_info("%s\n", ixgbevf_copyright);
4900 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4901 if (!ixgbevf_wq) {
4902 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4903 return -ENOMEM;
4904 }
4905
4906 return pci_register_driver(&ixgbevf_driver);
4907}
4908
4909module_init(ixgbevf_init_module);
4910
4911
4912
4913
4914
4915
4916
4917static void __exit ixgbevf_exit_module(void)
4918{
4919 pci_unregister_driver(&ixgbevf_driver);
4920 if (ixgbevf_wq) {
4921 destroy_workqueue(ixgbevf_wq);
4922 ixgbevf_wq = NULL;
4923 }
4924}
4925
4926#ifdef DEBUG
4927
4928
4929
4930
4931
4932char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4933{
4934 struct ixgbevf_adapter *adapter = hw->back;
4935
4936 return adapter->netdev->name;
4937}
4938
4939#endif
4940module_exit(ixgbevf_exit_module);
4941
4942
4943