linux/drivers/phy/allwinner/phy-sun50i-usb3.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Allwinner sun50i(H6) USB 3.0 phy driver
   4 *
   5 * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
   6 *
   7 * Based on phy-sun9i-usb.c, which is:
   8 *
   9 * Copyright (C) 2014-2015 Chen-Yu Tsai <wens@csie.org>
  10 *
  11 * Based on code from Allwinner BSP, which is:
  12 *
  13 * Copyright (c) 2010-2015 Allwinner Technology Co., Ltd.
  14 */
  15
  16#include <linux/clk.h>
  17#include <linux/err.h>
  18#include <linux/io.h>
  19#include <linux/module.h>
  20#include <linux/phy/phy.h>
  21#include <linux/platform_device.h>
  22#include <linux/reset.h>
  23
  24/* Interface Status and Control Registers */
  25#define SUNXI_ISCR                      0x00
  26#define SUNXI_PIPE_CLOCK_CONTROL        0x14
  27#define SUNXI_PHY_TUNE_LOW              0x18
  28#define SUNXI_PHY_TUNE_HIGH             0x1c
  29#define SUNXI_PHY_EXTERNAL_CONTROL      0x20
  30
  31/* USB2.0 Interface Status and Control Register */
  32#define SUNXI_ISCR_FORCE_VBUS           (3 << 12)
  33
  34/* PIPE Clock Control Register */
  35#define SUNXI_PCC_PIPE_CLK_OPEN         (1 << 6)
  36
  37/* PHY External Control Register */
  38#define SUNXI_PEC_EXTERN_VBUS           (3 << 1)
  39#define SUNXI_PEC_SSC_EN                (1 << 24)
  40#define SUNXI_PEC_REF_SSP_EN            (1 << 26)
  41
  42/* PHY Tune High Register */
  43#define SUNXI_TX_DEEMPH_3P5DB(n)        ((n) << 19)
  44#define SUNXI_TX_DEEMPH_3P5DB_MASK      GENMASK(24, 19)
  45#define SUNXI_TX_DEEMPH_6DB(n)          ((n) << 13)
  46#define SUNXI_TX_DEEMPH_6GB_MASK        GENMASK(18, 13)
  47#define SUNXI_TX_SWING_FULL(n)          ((n) << 6)
  48#define SUNXI_TX_SWING_FULL_MASK        GENMASK(12, 6)
  49#define SUNXI_LOS_BIAS(n)               ((n) << 3)
  50#define SUNXI_LOS_BIAS_MASK             GENMASK(5, 3)
  51#define SUNXI_TXVBOOSTLVL(n)            ((n) << 0)
  52#define SUNXI_TXVBOOSTLVL_MASK          GENMASK(2, 0)
  53
  54struct sun50i_usb3_phy {
  55        struct phy *phy;
  56        void __iomem *regs;
  57        struct reset_control *reset;
  58        struct clk *clk;
  59};
  60
  61static void sun50i_usb3_phy_open(struct sun50i_usb3_phy *phy)
  62{
  63        u32 val;
  64
  65        val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL);
  66        val |= SUNXI_PEC_EXTERN_VBUS;
  67        val |= SUNXI_PEC_SSC_EN | SUNXI_PEC_REF_SSP_EN;
  68        writel(val, phy->regs + SUNXI_PHY_EXTERNAL_CONTROL);
  69
  70        val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL);
  71        val |= SUNXI_PCC_PIPE_CLK_OPEN;
  72        writel(val, phy->regs + SUNXI_PIPE_CLOCK_CONTROL);
  73
  74        val = readl(phy->regs + SUNXI_ISCR);
  75        val |= SUNXI_ISCR_FORCE_VBUS;
  76        writel(val, phy->regs + SUNXI_ISCR);
  77
  78        /*
  79         * All the magic numbers written to the PHY_TUNE_{LOW_HIGH}
  80         * registers are directly taken from the BSP USB3 driver from
  81         * Allwiner.
  82         */
  83        writel(0x0047fc87, phy->regs + SUNXI_PHY_TUNE_LOW);
  84
  85        val = readl(phy->regs + SUNXI_PHY_TUNE_HIGH);
  86        val &= ~(SUNXI_TXVBOOSTLVL_MASK | SUNXI_LOS_BIAS_MASK |
  87                 SUNXI_TX_SWING_FULL_MASK | SUNXI_TX_DEEMPH_6GB_MASK |
  88                 SUNXI_TX_DEEMPH_3P5DB_MASK);
  89        val |= SUNXI_TXVBOOSTLVL(0x7);
  90        val |= SUNXI_LOS_BIAS(0x7);
  91        val |= SUNXI_TX_SWING_FULL(0x55);
  92        val |= SUNXI_TX_DEEMPH_6DB(0x20);
  93        val |= SUNXI_TX_DEEMPH_3P5DB(0x15);
  94        writel(val, phy->regs + SUNXI_PHY_TUNE_HIGH);
  95}
  96
  97static int sun50i_usb3_phy_init(struct phy *_phy)
  98{
  99        struct sun50i_usb3_phy *phy = phy_get_drvdata(_phy);
 100        int ret;
 101
 102        ret = clk_prepare_enable(phy->clk);
 103        if (ret)
 104                return ret;
 105
 106        ret = reset_control_deassert(phy->reset);
 107        if (ret) {
 108                clk_disable_unprepare(phy->clk);
 109                return ret;
 110        }
 111
 112        sun50i_usb3_phy_open(phy);
 113        return 0;
 114}
 115
 116static int sun50i_usb3_phy_exit(struct phy *_phy)
 117{
 118        struct sun50i_usb3_phy *phy = phy_get_drvdata(_phy);
 119
 120        reset_control_assert(phy->reset);
 121        clk_disable_unprepare(phy->clk);
 122
 123        return 0;
 124}
 125
 126static const struct phy_ops sun50i_usb3_phy_ops = {
 127        .init           = sun50i_usb3_phy_init,
 128        .exit           = sun50i_usb3_phy_exit,
 129        .owner          = THIS_MODULE,
 130};
 131
 132static int sun50i_usb3_phy_probe(struct platform_device *pdev)
 133{
 134        struct sun50i_usb3_phy *phy;
 135        struct device *dev = &pdev->dev;
 136        struct phy_provider *phy_provider;
 137        struct resource *res;
 138
 139        phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
 140        if (!phy)
 141                return -ENOMEM;
 142
 143        phy->clk = devm_clk_get(dev, NULL);
 144        if (IS_ERR(phy->clk)) {
 145                if (PTR_ERR(phy->clk) != -EPROBE_DEFER)
 146                        dev_err(dev, "failed to get phy clock\n");
 147                return PTR_ERR(phy->clk);
 148        }
 149
 150        phy->reset = devm_reset_control_get(dev, NULL);
 151        if (IS_ERR(phy->reset)) {
 152                dev_err(dev, "failed to get reset control\n");
 153                return PTR_ERR(phy->reset);
 154        }
 155
 156        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 157        phy->regs = devm_ioremap_resource(dev, res);
 158        if (IS_ERR(phy->regs))
 159                return PTR_ERR(phy->regs);
 160
 161        phy->phy = devm_phy_create(dev, NULL, &sun50i_usb3_phy_ops);
 162        if (IS_ERR(phy->phy)) {
 163                dev_err(dev, "failed to create PHY\n");
 164                return PTR_ERR(phy->phy);
 165        }
 166
 167        phy_set_drvdata(phy->phy, phy);
 168        phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
 169
 170        return PTR_ERR_OR_ZERO(phy_provider);
 171}
 172
 173static const struct of_device_id sun50i_usb3_phy_of_match[] = {
 174        { .compatible = "allwinner,sun50i-h6-usb3-phy" },
 175        { },
 176};
 177MODULE_DEVICE_TABLE(of, sun50i_usb3_phy_of_match);
 178
 179static struct platform_driver sun50i_usb3_phy_driver = {
 180        .probe  = sun50i_usb3_phy_probe,
 181        .driver = {
 182                .of_match_table = sun50i_usb3_phy_of_match,
 183                .name  = "sun50i-usb3-phy",
 184        }
 185};
 186module_platform_driver(sun50i_usb3_phy_driver);
 187
 188MODULE_DESCRIPTION("Allwinner H6 USB 3.0 phy driver");
 189MODULE_AUTHOR("Icenowy Zheng <icenowy@aosc.io>");
 190MODULE_LICENSE("GPL");
 191