LXR linux/drivers/staging/rtl8188eu/hal/rtl8188e_hal

   1// SPDX-License-Identifier: GPL-2.0
   2/******************************************************************************
   3 *
   4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5 *
   6 ******************************************************************************/
   7#define _HAL_INIT_C_
   8
   9#include <linux/firmware.h>
  10#include <linux/vmalloc.h>
  11#include <drv_types.h>
  12#include <rtw_efuse.h>
  13#include <phy.h>
  14#include <rtl8188e_hal.h>
  15
  16#include <rtw_iol.h>
  17
  18void iol_mode_enable(struct adapter *padapter, u8 enable)
  19{
  20        u8 reg_0xf0 = 0;
  21
  22        if (enable) {
  23                /* Enable initial offload */
  24                reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
  25                usb_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN);
  26
  27                if (!padapter->bFWReady) {
  28                        DBG_88E("bFWReady == false call reset 8051...\n");
  29                        _8051Reset88E(padapter);
  30                }
  31
  32        } else {
  33                /* disable initial offload */
  34                reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
  35                usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
  36        }
  37}
  38
  39s32 iol_execute(struct adapter *padapter, u8 control)
  40{
  41        s32 status = _FAIL;
  42        u8 reg_0x88 = 0;
  43        unsigned long start = 0;
  44
  45        control = control&0x0f;
  46        reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
  47        usb_write8(padapter, REG_HMEBOX_E0,  reg_0x88|control);
  48
  49        start = jiffies;
  50        while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control &&
  51               jiffies_to_msecs(jiffies - start) < 1000) {
  52                udelay(5);
  53        }
  54
  55        reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
  56        status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
  57        if (reg_0x88 & control<<4)
  58                status = _FAIL;
  59        return status;
  60}
  61
  62static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
  63{
  64        s32 rst = _SUCCESS;
  65
  66        iol_mode_enable(padapter, 1);
  67        usb_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
  68        rst = iol_execute(padapter, CMD_INIT_LLT);
  69        iol_mode_enable(padapter, 0);
  70        return rst;
  71}
  72
  73s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
  74{
  75        s32     result = _SUCCESS;
  76
  77        DBG_88E("==> %s\n", __func__);
  78        if (rtw_iol_applied(padapter)) {
  79                iol_mode_enable(padapter, 1);
  80                result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
  81                if (result == _SUCCESS)
  82                        result = iol_execute(padapter, CMD_EFUSE_PATCH);
  83
  84                iol_mode_enable(padapter, 0);
  85        }
  86        return result;
  87}
  88
  89#define MAX_REG_BOLCK_SIZE      196
  90
  91void _8051Reset88E(struct adapter *padapter)
  92{
  93        u8 u1bTmp;
  94
  95        u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN+1);
  96        usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT(2)));
  97        usb_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT(2)));
  98        DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n");
  99}
 100
 101void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
 102{
 103        /*  Init Fw LPS related. */
 104        padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
 105
 106        /*  Init H2C counter. by tynli. 2009.12.09. */
 107        padapter->HalData->LastHMEBoxNum = 0;
 108}
 109
 110void rtw_hal_free_data(struct adapter *padapter)
 111{
 112        kfree(padapter->HalData);
 113        padapter->HalData = NULL;
 114}
 115
 116void rtw_hal_read_chip_version(struct adapter *padapter)
 117{
 118        u32                             value32;
 119        struct HAL_VERSION              ChipVersion;
 120        struct hal_data_8188e *pHalData = padapter->HalData;
 121
 122        value32 = usb_read32(padapter, REG_SYS_CFG);
 123        ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
 124        ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
 125        ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /*  IC version (CUT) */
 126
 127        dump_chip_info(ChipVersion);
 128
 129        pHalData->VersionID = ChipVersion;
 130}
 131
 132void rtw_hal_set_odm_var(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
 133{
 134        struct odm_dm_struct *podmpriv = &Adapter->HalData->odmpriv;
 135
 136        switch (eVariable) {
 137        case HAL_ODM_STA_INFO:
 138                {
 139                        struct sta_info *psta = pValue1;
 140
 141                        if (bSet) {
 142                                DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
 143                                ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
 144                                ODM_RAInfo_Init(podmpriv, psta->mac_id);
 145                        } else {
 146                                DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
 147                                ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
 148                       }
 149                }
 150                break;
 151        case HAL_ODM_P2P_STATE:
 152                podmpriv->bWIFI_Direct = bSet;
 153                break;
 154        case HAL_ODM_WIFI_DISPLAY_STATE:
 155                podmpriv->bWIFI_Display = bSet;
 156                break;
 157        default:
 158                break;
 159        }
 160}
 161
 162void rtw_hal_notch_filter(struct adapter *adapter, bool enable)
 163{
 164        if (enable) {
 165                DBG_88E("Enable notch filter\n");
 166                usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) | BIT(1));
 167        } else {
 168                DBG_88E("Disable notch filter\n");
 169                usb_write8(adapter, rOFDM0_RxDSP+1, usb_read8(adapter, rOFDM0_RxDSP+1) & ~BIT(1));
 170        }
 171}
 172
 173/*  */
 174/*  */
 175/*  LLT R/W/Init function */
 176/*  */
 177/*  */
 178static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
 179{
 180        s32     status = _SUCCESS;
 181        s32     count = 0;
 182        u32     value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
 183        u16     LLTReg = REG_LLT_INIT;
 184
 185        usb_write32(padapter, LLTReg, value);
 186
 187        /* polling */
 188        do {
 189                value = usb_read32(padapter, LLTReg);
 190                if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
 191                        break;
 192
 193                if (count > POLLING_LLT_THRESHOLD) {
 194                        RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address));
 195                        status = _FAIL;
 196                        break;
 197                }
 198                udelay(5);
 199        } while (count++);
 200
 201        return status;
 202}
 203
 204s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
 205{
 206        s32     status = _FAIL;
 207        u32     i;
 208        u32     Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/*  176, 22k */
 209
 210        if (rtw_iol_applied(padapter)) {
 211                status = iol_InitLLTTable(padapter, txpktbuf_bndy);
 212        } else {
 213                for (i = 0; i < (txpktbuf_bndy - 1); i++) {
 214                        status = _LLTWrite(padapter, i, i + 1);
 215                        if (status != _SUCCESS)
 216                                return status;
 217                }
 218
 219                /*  end of list */
 220                status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
 221                if (status != _SUCCESS)
 222                        return status;
 223
 224                /*  Make the other pages as ring buffer */
 225                /*  This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
 226                /*  Otherwise used as local loopback buffer. */
 227                for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
 228                        status = _LLTWrite(padapter, i, (i + 1));
 229                        if (status != _SUCCESS)
 230                                return status;
 231                }
 232
 233                /*  Let last entry point to the start entry of ring buffer */
 234                status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
 235                if (status != _SUCCESS)
 236                        return status;
 237        }
 238
 239        return status;
 240}
 241
 242void Hal_InitPGData88E(struct adapter *padapter)
 243{
 244        struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
 245
 246        if (!pEEPROM->bautoload_fail_flag) { /*  autoload OK. */
 247                if (!is_boot_from_eeprom(padapter)) {
 248                        /*  Read EFUSE real map to shadow. */
 249                        EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
 250                }
 251        } else {/* autoload fail */
 252                RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n"));
 253                /* update to default value 0xFF */
 254                if (!is_boot_from_eeprom(padapter))
 255                        EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI);
 256        }
 257}
 258
 259void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo)
 260{
 261        struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
 262        u16                     EEPROMId;
 263
 264        /*  Checl 0x8129 again for making sure autoload status!! */
 265        EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
 266        if (EEPROMId != RTL_EEPROM_ID) {
 267                DBG_88E("EEPROM ID(%#x) is invalid!!\n", EEPROMId);
 268                pEEPROM->bautoload_fail_flag = true;
 269        } else {
 270                pEEPROM->bautoload_fail_flag = false;
 271        }
 272
 273        DBG_88E("EEPROM ID = 0x%04x\n", EEPROMId);
 274}
 275
 276static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
 277{
 278        u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
 279
 280        memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
 281
 282        if (AutoLoadFail) {
 283                for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
 284                        /* 2.4G default value */
 285                        for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
 286                                pwrInfo24G->IndexCCK_Base[rfPath][group] =      EEPROM_DEFAULT_24G_INDEX;
 287                                pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
 288                        }
 289                        for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
 290                                if (TxCount == 0) {
 291                                        pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
 292                                        pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
 293                                } else {
 294                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 295                                        pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 296                                        pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 297                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 298                                }
 299                        }
 300                }
 301                return;
 302        }
 303
 304        for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
 305                /* 2.4G default value */
 306                for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
 307                        pwrInfo24G->IndexCCK_Base[rfPath][group] =      PROMContent[eeAddr++];
 308                        if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
 309                                pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
 310                }
 311                for (group = 0; group < MAX_CHNL_GROUP_24G-1; group++) {
 312                        pwrInfo24G->IndexBW40_Base[rfPath][group] =     PROMContent[eeAddr++];
 313                        if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
 314                                pwrInfo24G->IndexBW40_Base[rfPath][group] =     EEPROM_DEFAULT_24G_INDEX;
 315                }
 316                for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
 317                        if (TxCount == 0) {
 318                                pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
 319                                if (PROMContent[eeAddr] == 0xFF) {
 320                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
 321                                } else {
 322                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4;
 323                                        if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
 324                                                pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
 325                                }
 326
 327                                if (PROMContent[eeAddr] == 0xFF) {
 328                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_24G_OFDM_DIFF;
 329                                } else {
 330                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0x0f);
 331                                        if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
 332                                                pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
 333                                }
 334                                pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
 335                                eeAddr++;
 336                        } else {
 337                                if (PROMContent[eeAddr] == 0xFF) {
 338                                        pwrInfo24G->BW40_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
 339                                } else {
 340                                        pwrInfo24G->BW40_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
 341                                        if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
 342                                                pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
 343                                }
 344
 345                                if (PROMContent[eeAddr] == 0xFF) {
 346                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] =        EEPROM_DEFAULT_DIFF;
 347                                } else {
 348                                        pwrInfo24G->BW20_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0x0f);
 349                                        if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
 350                                                pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
 351                                }
 352                                eeAddr++;
 353
 354                                if (PROMContent[eeAddr] == 0xFF) {
 355                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 356                                } else {
 357                                        pwrInfo24G->OFDM_Diff[rfPath][TxCount] =        (PROMContent[eeAddr]&0xf0)>>4;
 358                                        if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3))            /* 4bit sign number to 8 bit sign number */
 359                                                pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
 360                                }
 361
 362                                if (PROMContent[eeAddr] == 0xFF) {
 363                                        pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
 364                                } else {
 365                                        pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f);
 366                                        if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3))             /* 4bit sign number to 8 bit sign number */
 367                                                pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
 368                                }
 369                                eeAddr++;
 370                        }
 371                }
 372        }
 373}
 374
 375void Hal_GetChnlGroup88E(u8 chnl, u8 *group)
 376{
 377        if (chnl < 3)                   /*  Channel 1-2 */
 378                *group = 0;
 379        else if (chnl < 6)              /*  Channel 3-5 */
 380                *group = 1;
 381        else if (chnl < 9)              /*  Channel 6-8 */
 382                *group = 2;
 383        else if (chnl < 12)             /*  Channel 9-11 */
 384                *group = 3;
 385        else if (chnl < 14)             /*  Channel 12-13 */
 386                *group = 4;
 387        else if (chnl == 14)            /*  Channel 14 */
 388                *group = 5;
 389}
 390
 391void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
 392{
 393        if (AutoLoadFail) {
 394                padapter->pwrctrlpriv.bHWPowerdown = false;
 395                padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
 396        } else {
 397                /* hw power down mode selection , 0:rf-off / 1:power down */
 398
 399                if (padapter->registrypriv.hwpdn_mode == 2)
 400                        padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4));
 401                else
 402                        padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
 403
 404                /*  decide hw if support remote wakeup function */
 405                /*  if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
 406                padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
 407
 408                DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
 409                padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown, padapter->pwrctrlpriv.bSupportRemoteWakeup);
 410
 411                DBG_88E("### PS params =>  power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
 412        }
 413}
 414
 415void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
 416{
 417        struct hal_data_8188e *pHalData = padapter->HalData;
 418        struct txpowerinfo24g pwrInfo24G;
 419        u8 ch, group;
 420        u8 TxCount;
 421
 422        Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
 423
 424        if (!AutoLoadFail)
 425                pHalData->bTXPowerDataReadFromEEPORM = true;
 426
 427        for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
 428                Hal_GetChnlGroup88E(ch, &group);
 429                pHalData->Index24G_CCK_Base[0][ch] = pwrInfo24G.IndexCCK_Base[0][group];
 430                if (ch == 14)
 431                        pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][4];
 432                else
 433                        pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][group];
 434
 435                DBG_88E("======= Path %d, Channel %d =======\n", 0, ch);
 436                DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", 0, ch, pHalData->Index24G_CCK_Base[0][ch]);
 437                DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", 0, ch, pHalData->Index24G_BW40_Base[0][ch]);
 438        }
 439        for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
 440                pHalData->CCK_24G_Diff[0][TxCount] = pwrInfo24G.CCK_Diff[0][TxCount];
 441                pHalData->OFDM_24G_Diff[0][TxCount] = pwrInfo24G.OFDM_Diff[0][TxCount];
 442                pHalData->BW20_24G_Diff[0][TxCount] = pwrInfo24G.BW20_Diff[0][TxCount];
 443                pHalData->BW40_24G_Diff[0][TxCount] = pwrInfo24G.BW40_Diff[0][TxCount];
 444                DBG_88E("======= TxCount %d =======\n", TxCount);
 445                DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", 0, TxCount, pHalData->CCK_24G_Diff[0][TxCount]);
 446                DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", 0, TxCount, pHalData->OFDM_24G_Diff[0][TxCount]);
 447                DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", 0, TxCount, pHalData->BW20_24G_Diff[0][TxCount]);
 448                DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", 0, TxCount, pHalData->BW40_24G_Diff[0][TxCount]);
 449        }
 450
 451        /*  2010/10/19 MH Add Regulator recognize for CU. */
 452        if (!AutoLoadFail) {
 453                pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7);     /* bit0~2 */
 454                if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
 455                        pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */
 456        } else {
 457                pHalData->EEPROMRegulatory = 0;
 458        }
 459        DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory);
 460}
 461
 462void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
 463{
 464        struct hal_data_8188e *pHalData = pAdapter->HalData;
 465
 466        if (!AutoLoadFail) {
 467                pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
 468                if (pHalData->CrystalCap == 0xFF)
 469                        pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
 470        } else {
 471                pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
 472        }
 473        DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap);
 474}
 475
 476void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
 477{
 478        struct hal_data_8188e *pHalData = pAdapter->HalData;
 479
 480        if (!AutoLoadFail)
 481                pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
 482                                        & 0xE0) >> 5;
 483        else
 484                pHalData->BoardType = 0;
 485        DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
 486}
 487
 488void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
 489{
 490        struct hal_data_8188e *pHalData = padapter->HalData;
 491
 492        if (!AutoLoadFail) {
 493                pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
 494                if (pHalData->EEPROMVersion == 0xFF)
 495                        pHalData->EEPROMVersion = EEPROM_Default_Version;
 496        } else {
 497                pHalData->EEPROMVersion = 1;
 498        }
 499        RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
 500                 ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
 501                 pHalData->EEPROMVersion));
 502}
 503
 504void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
 505{
 506        padapter->mlmepriv.ChannelPlan =
 507                 hal_com_get_channel_plan(hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
 508                                          padapter->registrypriv.channel_plan,
 509                                          RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
 510
 511        DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan);
 512}
 513
 514void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
 515{
 516        struct hal_data_8188e   *pHalData = padapter->HalData;
 517
 518        if (!AutoLoadFail) {
 519                pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
 520        } else {
 521                pHalData->EEPROMCustomerID = 0;
 522                pHalData->EEPROMSubCustomerID = 0;
 523        }
 524        DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID);
 525}
 526
 527void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
 528{
 529        struct hal_data_8188e *pHalData = pAdapter->HalData;
 530        struct registry_priv    *registry_par = &pAdapter->registrypriv;
 531
 532        if (!AutoLoadFail) {
 533                /*  Antenna Diversity setting. */
 534                if (registry_par->antdiv_cfg == 2) { /*  2:By EFUSE */
 535                        pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3;
 536                        if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
 537                                pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;
 538                } else {
 539                        pHalData->AntDivCfg = registry_par->antdiv_cfg;  /*  0:OFF , 1:ON, 2:By EFUSE */
 540                }
 541
 542                if (registry_par->antdiv_type == 0) {
 543                        /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
 544                        pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
 545                        if (pHalData->TRxAntDivType == 0xFF)
 546                                pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /*  For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
 547                } else {
 548                        pHalData->TRxAntDivType = registry_par->antdiv_type;
 549                }
 550
 551                if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
 552                        pHalData->AntDivCfg = 1; /*  0xC1[3] is ignored. */
 553        } else {
 554                pHalData->AntDivCfg = 0;
 555        }
 556        DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
 557}
 558
 559void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
 560{
 561        struct hal_data_8188e *pHalData = Adapter->HalData;
 562
 563        /*  ThermalMeter from EEPROM */
 564        if (!AutoloadFail)
 565                pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
 566        else
 567                pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
 568
 569        if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) {
 570                pHalData->bAPKThermalMeterIgnore = true;
 571                pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
 572        }
 573        DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
 574}
 575