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6#include <linux/debugfs.h>
7#include <linux/err.h>
8#include <linux/io.h>
9#include <linux/nvmem-consumer.h>
10#include <linux/of_address.h>
11#include <linux/of_platform.h>
12#include <linux/platform_device.h>
13#include <linux/regmap.h>
14#include "tsens.h"
15
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28
29
30struct tsens_irq_data {
31 u32 up_viol;
32 int up_thresh;
33 u32 up_irq_mask;
34 u32 up_irq_clear;
35 u32 low_viol;
36 int low_thresh;
37 u32 low_irq_mask;
38 u32 low_irq_clear;
39};
40
41char *qfprom_read(struct device *dev, const char *cname)
42{
43 struct nvmem_cell *cell;
44 ssize_t data;
45 char *ret;
46
47 cell = nvmem_cell_get(dev, cname);
48 if (IS_ERR(cell))
49 return ERR_CAST(cell);
50
51 ret = nvmem_cell_read(cell, &data);
52 nvmem_cell_put(cell);
53
54 return ret;
55}
56
57
58
59
60
61
62
63void compute_intercept_slope(struct tsens_priv *priv, u32 *p1,
64 u32 *p2, u32 mode)
65{
66 int i;
67 int num, den;
68
69 for (i = 0; i < priv->num_sensors; i++) {
70 dev_dbg(priv->dev,
71 "%s: sensor%d - data_point1:%#x data_point2:%#x\n",
72 __func__, i, p1[i], p2[i]);
73
74 priv->sensor[i].slope = SLOPE_DEFAULT;
75 if (mode == TWO_PT_CALIB) {
76
77
78
79
80 num = p2[i] - p1[i];
81 num *= SLOPE_FACTOR;
82 den = CAL_DEGC_PT2 - CAL_DEGC_PT1;
83 priv->sensor[i].slope = num / den;
84 }
85
86 priv->sensor[i].offset = (p1[i] * SLOPE_FACTOR) -
87 (CAL_DEGC_PT1 *
88 priv->sensor[i].slope);
89 dev_dbg(priv->dev, "%s: offset:%d\n", __func__, priv->sensor[i].offset);
90 }
91}
92
93static inline u32 degc_to_code(int degc, const struct tsens_sensor *s)
94{
95 u64 code = div_u64(((u64)degc * s->slope + s->offset), SLOPE_FACTOR);
96
97 pr_debug("%s: raw_code: 0x%llx, degc:%d\n", __func__, code, degc);
98 return clamp_val(code, THRESHOLD_MIN_ADC_CODE, THRESHOLD_MAX_ADC_CODE);
99}
100
101static inline int code_to_degc(u32 adc_code, const struct tsens_sensor *s)
102{
103 int degc, num, den;
104
105 num = (adc_code * SLOPE_FACTOR) - s->offset;
106 den = s->slope;
107
108 if (num > 0)
109 degc = num + (den / 2);
110 else if (num < 0)
111 degc = num - (den / 2);
112 else
113 degc = num;
114
115 degc /= den;
116
117 return degc;
118}
119
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129
130
131static int tsens_hw_to_mC(struct tsens_sensor *s, int field)
132{
133 struct tsens_priv *priv = s->priv;
134 u32 resolution;
135 u32 temp = 0;
136 int ret;
137
138 resolution = priv->fields[LAST_TEMP_0].msb -
139 priv->fields[LAST_TEMP_0].lsb;
140
141 ret = regmap_field_read(priv->rf[field], &temp);
142 if (ret)
143 return ret;
144
145
146 if (priv->feat->adc)
147 return code_to_degc(temp, s) * 1000;
148
149
150 return sign_extend32(temp, resolution) * 100;
151}
152
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162
163static int tsens_mC_to_hw(struct tsens_sensor *s, int temp)
164{
165 struct tsens_priv *priv = s->priv;
166
167
168 if (priv->feat->adc)
169 return degc_to_code(temp / 1000, s);
170
171
172 return temp / 100;
173}
174
175static inline enum tsens_ver tsens_version(struct tsens_priv *priv)
176{
177 return priv->feat->ver_major;
178}
179
180static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id,
181 enum tsens_irq_type irq_type, bool enable)
182{
183 u32 index = 0;
184
185 switch (irq_type) {
186 case UPPER:
187 index = UP_INT_CLEAR_0 + hw_id;
188 break;
189 case LOWER:
190 index = LOW_INT_CLEAR_0 + hw_id;
191 break;
192 }
193 regmap_field_write(priv->rf[index], enable ? 0 : 1);
194}
195
196static void tsens_set_interrupt_v2(struct tsens_priv *priv, u32 hw_id,
197 enum tsens_irq_type irq_type, bool enable)
198{
199 u32 index_mask = 0, index_clear = 0;
200
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205
206
207
208 switch (irq_type) {
209 case UPPER:
210 index_mask = UP_INT_MASK_0 + hw_id;
211 index_clear = UP_INT_CLEAR_0 + hw_id;
212 break;
213 case LOWER:
214 index_mask = LOW_INT_MASK_0 + hw_id;
215 index_clear = LOW_INT_CLEAR_0 + hw_id;
216 break;
217 }
218
219 if (enable) {
220 regmap_field_write(priv->rf[index_mask], 0);
221 } else {
222 regmap_field_write(priv->rf[index_mask], 1);
223 regmap_field_write(priv->rf[index_clear], 1);
224 regmap_field_write(priv->rf[index_clear], 0);
225 }
226}
227
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237
238
239static void tsens_set_interrupt(struct tsens_priv *priv, u32 hw_id,
240 enum tsens_irq_type irq_type, bool enable)
241{
242 dev_dbg(priv->dev, "[%u] %s: %s -> %s\n", hw_id, __func__,
243 irq_type ? ((irq_type == 1) ? "UP" : "CRITICAL") : "LOW",
244 enable ? "en" : "dis");
245 if (tsens_version(priv) > VER_1_X)
246 tsens_set_interrupt_v2(priv, hw_id, irq_type, enable);
247 else
248 tsens_set_interrupt_v1(priv, hw_id, irq_type, enable);
249}
250
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256
257
258
259
260static int tsens_threshold_violated(struct tsens_priv *priv, u32 hw_id,
261 struct tsens_irq_data *d)
262{
263 int ret;
264
265 ret = regmap_field_read(priv->rf[UPPER_STATUS_0 + hw_id], &d->up_viol);
266 if (ret)
267 return ret;
268 ret = regmap_field_read(priv->rf[LOWER_STATUS_0 + hw_id], &d->low_viol);
269 if (ret)
270 return ret;
271 if (d->up_viol || d->low_viol)
272 return 1;
273
274 return 0;
275}
276
277static int tsens_read_irq_state(struct tsens_priv *priv, u32 hw_id,
278 struct tsens_sensor *s, struct tsens_irq_data *d)
279{
280 int ret;
281
282 ret = regmap_field_read(priv->rf[UP_INT_CLEAR_0 + hw_id], &d->up_irq_clear);
283 if (ret)
284 return ret;
285 ret = regmap_field_read(priv->rf[LOW_INT_CLEAR_0 + hw_id], &d->low_irq_clear);
286 if (ret)
287 return ret;
288 if (tsens_version(priv) > VER_1_X) {
289 ret = regmap_field_read(priv->rf[UP_INT_MASK_0 + hw_id], &d->up_irq_mask);
290 if (ret)
291 return ret;
292 ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask);
293 if (ret)
294 return ret;
295 } else {
296
297 d->up_irq_mask = 0;
298 d->low_irq_mask = 0;
299 }
300
301 d->up_thresh = tsens_hw_to_mC(s, UP_THRESH_0 + hw_id);
302 d->low_thresh = tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id);
303
304 dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u) | clr(%u|%u) | mask(%u|%u)\n",
305 hw_id, __func__, (d->up_viol || d->low_viol) ? "(V)" : "",
306 d->low_viol, d->up_viol, d->low_irq_clear, d->up_irq_clear,
307 d->low_irq_mask, d->up_irq_mask);
308 dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d)\n", hw_id, __func__,
309 (d->up_viol || d->low_viol) ? "(violation)" : "",
310 d->low_thresh, d->up_thresh);
311
312 return 0;
313}
314
315static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)
316{
317 if (ver > VER_1_X)
318 return mask & (1 << hw_id);
319
320
321 return 0;
322}
323
324
325
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336
337
338
339irqreturn_t tsens_irq_thread(int irq, void *data)
340{
341 struct tsens_priv *priv = data;
342 struct tsens_irq_data d;
343 bool enable = true, disable = false;
344 unsigned long flags;
345 int temp, ret, i;
346
347 for (i = 0; i < priv->num_sensors; i++) {
348 bool trigger = false;
349 struct tsens_sensor *s = &priv->sensor[i];
350 u32 hw_id = s->hw_id;
351
352 if (IS_ERR(priv->sensor[i].tzd))
353 continue;
354 if (!tsens_threshold_violated(priv, hw_id, &d))
355 continue;
356 ret = get_temp_tsens_valid(s, &temp);
357 if (ret) {
358 dev_err(priv->dev, "[%u] %s: error reading sensor\n", hw_id, __func__);
359 continue;
360 }
361
362 spin_lock_irqsave(&priv->ul_lock, flags);
363
364 tsens_read_irq_state(priv, hw_id, s, &d);
365
366 if (d.up_viol &&
367 !masked_irq(hw_id, d.up_irq_mask, tsens_version(priv))) {
368 tsens_set_interrupt(priv, hw_id, UPPER, disable);
369 if (d.up_thresh > temp) {
370 dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",
371 priv->sensor[i].hw_id, __func__);
372 tsens_set_interrupt(priv, hw_id, UPPER, enable);
373 } else {
374 trigger = true;
375
376 }
377 } else if (d.low_viol &&
378 !masked_irq(hw_id, d.low_irq_mask, tsens_version(priv))) {
379 tsens_set_interrupt(priv, hw_id, LOWER, disable);
380 if (d.low_thresh < temp) {
381 dev_dbg(priv->dev, "[%u] %s: re-arm low\n",
382 priv->sensor[i].hw_id, __func__);
383 tsens_set_interrupt(priv, hw_id, LOWER, enable);
384 } else {
385 trigger = true;
386
387 }
388 }
389
390 spin_unlock_irqrestore(&priv->ul_lock, flags);
391
392 if (trigger) {
393 dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",
394 hw_id, __func__, temp);
395 thermal_zone_device_update(priv->sensor[i].tzd,
396 THERMAL_EVENT_UNSPECIFIED);
397 } else {
398 dev_dbg(priv->dev, "[%u] %s: no violation: %d\n",
399 hw_id, __func__, temp);
400 }
401 }
402
403 return IRQ_HANDLED;
404}
405
406int tsens_set_trips(void *_sensor, int low, int high)
407{
408 struct tsens_sensor *s = _sensor;
409 struct tsens_priv *priv = s->priv;
410 struct device *dev = priv->dev;
411 struct tsens_irq_data d;
412 unsigned long flags;
413 int high_val, low_val, cl_high, cl_low;
414 u32 hw_id = s->hw_id;
415
416 dev_dbg(dev, "[%u] %s: proposed thresholds: (%d:%d)\n",
417 hw_id, __func__, low, high);
418
419 cl_high = clamp_val(high, -40000, 120000);
420 cl_low = clamp_val(low, -40000, 120000);
421
422 high_val = tsens_mC_to_hw(s, cl_high);
423 low_val = tsens_mC_to_hw(s, cl_low);
424
425 spin_lock_irqsave(&priv->ul_lock, flags);
426
427 tsens_read_irq_state(priv, hw_id, s, &d);
428
429
430 regmap_field_write(priv->rf[LOW_THRESH_0 + hw_id], low_val);
431 regmap_field_write(priv->rf[UP_THRESH_0 + hw_id], high_val);
432 tsens_set_interrupt(priv, hw_id, LOWER, true);
433 tsens_set_interrupt(priv, hw_id, UPPER, true);
434
435 spin_unlock_irqrestore(&priv->ul_lock, flags);
436
437 dev_dbg(dev, "[%u] %s: (%d:%d)->(%d:%d)\n",
438 s->hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high);
439
440 return 0;
441}
442
443int tsens_enable_irq(struct tsens_priv *priv)
444{
445 int ret;
446 int val = tsens_version(priv) > VER_1_X ? 7 : 1;
447
448 ret = regmap_field_write(priv->rf[INT_EN], val);
449 if (ret < 0)
450 dev_err(priv->dev, "%s: failed to enable interrupts\n", __func__);
451
452 return ret;
453}
454
455void tsens_disable_irq(struct tsens_priv *priv)
456{
457 regmap_field_write(priv->rf[INT_EN], 0);
458}
459
460int get_temp_tsens_valid(struct tsens_sensor *s, int *temp)
461{
462 struct tsens_priv *priv = s->priv;
463 int hw_id = s->hw_id;
464 u32 temp_idx = LAST_TEMP_0 + hw_id;
465 u32 valid_idx = VALID_0 + hw_id;
466 u32 valid;
467 int ret;
468
469 ret = regmap_field_read(priv->rf[valid_idx], &valid);
470 if (ret)
471 return ret;
472 while (!valid) {
473
474
475
476
477 ndelay(400);
478 ret = regmap_field_read(priv->rf[valid_idx], &valid);
479 if (ret)
480 return ret;
481 }
482
483
484 *temp = tsens_hw_to_mC(s, temp_idx);
485
486 return 0;
487}
488
489int get_temp_common(struct tsens_sensor *s, int *temp)
490{
491 struct tsens_priv *priv = s->priv;
492 int hw_id = s->hw_id;
493 int last_temp = 0, ret;
494
495 ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp);
496 if (ret)
497 return ret;
498
499 *temp = code_to_degc(last_temp, s) * 1000;
500
501 return 0;
502}
503
504#ifdef CONFIG_DEBUG_FS
505static int dbg_sensors_show(struct seq_file *s, void *data)
506{
507 struct platform_device *pdev = s->private;
508 struct tsens_priv *priv = platform_get_drvdata(pdev);
509 int i;
510
511 seq_printf(s, "max: %2d\nnum: %2d\n\n",
512 priv->feat->max_sensors, priv->num_sensors);
513
514 seq_puts(s, " id slope offset\n--------------------------\n");
515 for (i = 0; i < priv->num_sensors; i++) {
516 seq_printf(s, "%8d %8d %8d\n", priv->sensor[i].hw_id,
517 priv->sensor[i].slope, priv->sensor[i].offset);
518 }
519
520 return 0;
521}
522
523static int dbg_version_show(struct seq_file *s, void *data)
524{
525 struct platform_device *pdev = s->private;
526 struct tsens_priv *priv = platform_get_drvdata(pdev);
527 u32 maj_ver, min_ver, step_ver;
528 int ret;
529
530 if (tsens_version(priv) > VER_0_1) {
531 ret = regmap_field_read(priv->rf[VER_MAJOR], &maj_ver);
532 if (ret)
533 return ret;
534 ret = regmap_field_read(priv->rf[VER_MINOR], &min_ver);
535 if (ret)
536 return ret;
537 ret = regmap_field_read(priv->rf[VER_STEP], &step_ver);
538 if (ret)
539 return ret;
540 seq_printf(s, "%d.%d.%d\n", maj_ver, min_ver, step_ver);
541 } else {
542 seq_puts(s, "0.1.0\n");
543 }
544
545 return 0;
546}
547
548DEFINE_SHOW_ATTRIBUTE(dbg_version);
549DEFINE_SHOW_ATTRIBUTE(dbg_sensors);
550
551static void tsens_debug_init(struct platform_device *pdev)
552{
553 struct tsens_priv *priv = platform_get_drvdata(pdev);
554 struct dentry *root, *file;
555
556 root = debugfs_lookup("tsens", NULL);
557 if (!root)
558 priv->debug_root = debugfs_create_dir("tsens", NULL);
559 else
560 priv->debug_root = root;
561
562 file = debugfs_lookup("version", priv->debug_root);
563 if (!file)
564 debugfs_create_file("version", 0444, priv->debug_root,
565 pdev, &dbg_version_fops);
566
567
568 priv->debug = debugfs_create_dir(dev_name(&pdev->dev), priv->debug_root);
569 debugfs_create_file("sensors", 0444, priv->debug, pdev, &dbg_sensors_fops);
570}
571#else
572static inline void tsens_debug_init(struct platform_device *pdev) {}
573#endif
574
575static const struct regmap_config tsens_config = {
576 .name = "tm",
577 .reg_bits = 32,
578 .val_bits = 32,
579 .reg_stride = 4,
580};
581
582static const struct regmap_config tsens_srot_config = {
583 .name = "srot",
584 .reg_bits = 32,
585 .val_bits = 32,
586 .reg_stride = 4,
587};
588
589int __init init_common(struct tsens_priv *priv)
590{
591 void __iomem *tm_base, *srot_base;
592 struct device *dev = priv->dev;
593 struct resource *res;
594 u32 enabled;
595 int ret, i, j;
596 struct platform_device *op = of_find_device_by_node(priv->dev->of_node);
597
598 if (!op)
599 return -EINVAL;
600
601 if (op->num_resources > 1) {
602
603 priv->tm_offset = 0;
604 res = platform_get_resource(op, IORESOURCE_MEM, 1);
605 srot_base = devm_ioremap_resource(&op->dev, res);
606 if (IS_ERR(srot_base)) {
607 ret = PTR_ERR(srot_base);
608 goto err_put_device;
609 }
610
611 priv->srot_map = devm_regmap_init_mmio(dev, srot_base,
612 &tsens_srot_config);
613 if (IS_ERR(priv->srot_map)) {
614 ret = PTR_ERR(priv->srot_map);
615 goto err_put_device;
616 }
617 } else {
618
619 priv->tm_offset = 0x1000;
620 }
621
622 res = platform_get_resource(op, IORESOURCE_MEM, 0);
623 tm_base = devm_ioremap_resource(&op->dev, res);
624 if (IS_ERR(tm_base)) {
625 ret = PTR_ERR(tm_base);
626 goto err_put_device;
627 }
628
629 priv->tm_map = devm_regmap_init_mmio(dev, tm_base, &tsens_config);
630 if (IS_ERR(priv->tm_map)) {
631 ret = PTR_ERR(priv->tm_map);
632 goto err_put_device;
633 }
634
635 if (tsens_version(priv) > VER_0_1) {
636 for (i = VER_MAJOR; i <= VER_STEP; i++) {
637 priv->rf[i] = devm_regmap_field_alloc(dev, priv->srot_map,
638 priv->fields[i]);
639 if (IS_ERR(priv->rf[i]))
640 return PTR_ERR(priv->rf[i]);
641 }
642 }
643
644 priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
645 priv->fields[TSENS_EN]);
646 if (IS_ERR(priv->rf[TSENS_EN])) {
647 ret = PTR_ERR(priv->rf[TSENS_EN]);
648 goto err_put_device;
649 }
650 ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
651 if (ret)
652 goto err_put_device;
653 if (!enabled) {
654 dev_err(dev, "%s: device not enabled\n", __func__);
655 ret = -ENODEV;
656 goto err_put_device;
657 }
658
659 priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
660 priv->fields[SENSOR_EN]);
661 if (IS_ERR(priv->rf[SENSOR_EN])) {
662 ret = PTR_ERR(priv->rf[SENSOR_EN]);
663 goto err_put_device;
664 }
665 priv->rf[INT_EN] = devm_regmap_field_alloc(dev, priv->tm_map,
666 priv->fields[INT_EN]);
667 if (IS_ERR(priv->rf[INT_EN])) {
668 ret = PTR_ERR(priv->rf[INT_EN]);
669 goto err_put_device;
670 }
671
672
673 for (j = LAST_TEMP_0; j <= UP_THRESH_15; j += 16) {
674 for (i = 0; i < priv->feat->max_sensors; i++) {
675 int idx = j + i;
676
677 priv->rf[idx] = devm_regmap_field_alloc(dev, priv->tm_map,
678 priv->fields[idx]);
679 if (IS_ERR(priv->rf[idx])) {
680 ret = PTR_ERR(priv->rf[idx]);
681 goto err_put_device;
682 }
683 }
684 }
685
686 spin_lock_init(&priv->ul_lock);
687 tsens_enable_irq(priv);
688 tsens_debug_init(op);
689
690 return 0;
691
692err_put_device:
693 put_device(&op->dev);
694 return ret;
695}
696