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13#ifndef __CROS_EC_COMMANDS_H
14#define __CROS_EC_COMMANDS_H
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18
19#define BUILD_ASSERT(_cond)
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26
27
28#define EC_PROTO_VERSION 0x00000002
29
30
31#define EC_VER_MASK(version) BIT(version)
32
33
34#define EC_LPC_ADDR_ACPI_DATA 0x62
35#define EC_LPC_ADDR_ACPI_CMD 0x66
36
37
38#define EC_LPC_ADDR_HOST_DATA 0x200
39#define EC_LPC_ADDR_HOST_CMD 0x204
40
41
42
43#define EC_LPC_ADDR_HOST_ARGS 0x800
44#define EC_LPC_ADDR_HOST_PARAM 0x804
45
46
47
48#define EC_LPC_ADDR_HOST_PACKET 0x800
49#define EC_LPC_HOST_PACKET_SIZE 0x100
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54
55#define EC_HOST_CMD_REGION0 0x800
56#define EC_HOST_CMD_REGION1 0x880
57#define EC_HOST_CMD_REGION_SIZE 0x80
58
59
60#define EC_LPC_CMDR_DATA BIT(0)
61#define EC_LPC_CMDR_PENDING BIT(1)
62#define EC_LPC_CMDR_BUSY BIT(2)
63#define EC_LPC_CMDR_CMD BIT(3)
64#define EC_LPC_CMDR_ACPI_BRST BIT(4)
65#define EC_LPC_CMDR_SCI BIT(5)
66#define EC_LPC_CMDR_SMI BIT(6)
67
68#define EC_LPC_ADDR_MEMMAP 0x900
69#define EC_MEMMAP_SIZE 255
70#define EC_MEMMAP_TEXT_MAX 8
71
72
73#define EC_MEMMAP_TEMP_SENSOR 0x00
74#define EC_MEMMAP_FAN 0x10
75#define EC_MEMMAP_TEMP_SENSOR_B 0x18
76#define EC_MEMMAP_ID 0x20
77#define EC_MEMMAP_ID_VERSION 0x22
78#define EC_MEMMAP_THERMAL_VERSION 0x23
79#define EC_MEMMAP_BATTERY_VERSION 0x24
80#define EC_MEMMAP_SWITCHES_VERSION 0x25
81#define EC_MEMMAP_EVENTS_VERSION 0x26
82#define EC_MEMMAP_HOST_CMD_FLAGS 0x27
83
84#define EC_MEMMAP_SWITCHES 0x30
85
86#define EC_MEMMAP_HOST_EVENTS 0x34
87
88#define EC_MEMMAP_BATT_VOLT 0x40
89#define EC_MEMMAP_BATT_RATE 0x44
90#define EC_MEMMAP_BATT_CAP 0x48
91#define EC_MEMMAP_BATT_FLAG 0x4c
92#define EC_MEMMAP_BATT_COUNT 0x4d
93#define EC_MEMMAP_BATT_INDEX 0x4e
94
95#define EC_MEMMAP_BATT_DCAP 0x50
96#define EC_MEMMAP_BATT_DVLT 0x54
97#define EC_MEMMAP_BATT_LFCC 0x58
98#define EC_MEMMAP_BATT_CCNT 0x5c
99
100#define EC_MEMMAP_BATT_MFGR 0x60
101#define EC_MEMMAP_BATT_MODEL 0x68
102#define EC_MEMMAP_BATT_SERIAL 0x70
103#define EC_MEMMAP_BATT_TYPE 0x78
104#define EC_MEMMAP_ALS 0x80
105
106#define EC_MEMMAP_ACC_STATUS 0x90
107
108#define EC_MEMMAP_ACC_DATA 0x92
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111
112#define EC_MEMMAP_GYRO_DATA 0xa0
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120#define EC_MEMMAP_NO_ACPI 0xe0
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123#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
124#define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4)
125#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7)
126
127
128#define EC_TEMP_SENSOR_ENTRIES 16
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133
134#define EC_TEMP_SENSOR_B_ENTRIES 8
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136
137#define EC_TEMP_SENSOR_NOT_PRESENT 0xff
138#define EC_TEMP_SENSOR_ERROR 0xfe
139#define EC_TEMP_SENSOR_NOT_POWERED 0xfd
140#define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
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145#define EC_TEMP_SENSOR_OFFSET 200
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150#define EC_ALS_ENTRIES 2
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157#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
158
159#define EC_FAN_SPEED_ENTRIES 4
160#define EC_FAN_SPEED_NOT_PRESENT 0xffff
161#define EC_FAN_SPEED_STALLED 0xfffe
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163
164#define EC_BATT_FLAG_AC_PRESENT 0x01
165#define EC_BATT_FLAG_BATT_PRESENT 0x02
166#define EC_BATT_FLAG_DISCHARGING 0x04
167#define EC_BATT_FLAG_CHARGING 0x08
168#define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
169
170#define EC_BATT_FLAG_INVALID_DATA 0x20
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172
173#define EC_SWITCH_LID_OPEN 0x01
174#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
175#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
176
177#define EC_SWITCH_IGNORE1 0x08
178
179#define EC_SWITCH_DEDICATED_RECOVERY 0x10
180
181#define EC_SWITCH_IGNORE0 0x20
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184
185#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
186
187#define EC_HOST_CMD_FLAG_VERSION_3 0x02
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189
190#define EC_WIRELESS_SWITCH_ALL ~0x00
191#define EC_WIRELESS_SWITCH_WLAN 0x01
192#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02
193#define EC_WIRELESS_SWITCH_WWAN 0x04
194#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08
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216#define EC_CMD_ACPI_READ 0x0080
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231#define EC_CMD_ACPI_WRITE 0x0081
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240#define EC_CMD_ACPI_BURST_ENABLE 0x0082
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248#define EC_CMD_ACPI_BURST_DISABLE 0x0083
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257#define EC_CMD_ACPI_QUERY_EVENT 0x0084
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262#define EC_ACPI_MEM_VERSION 0x00
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267#define EC_ACPI_MEM_TEST 0x01
268
269#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
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272#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
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274#define EC_ACPI_MEM_FAN_DUTY 0x04
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291#define EC_ACPI_MEM_TEMP_ID 0x05
292#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
293#define EC_ACPI_MEM_TEMP_COMMIT 0x07
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300#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
301#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)
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318#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
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321#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
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323#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
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335#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
336#define EC_ACPI_MEM_TBMD_SHIFT 0
337#define EC_ACPI_MEM_TBMD_MASK 0x1
338#define EC_ACPI_MEM_DDPN_SHIFT 1
339#define EC_ACPI_MEM_DDPN_MASK 0x7
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353#define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
354#define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
355#define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
356#define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
357#define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
358#define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
359#define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
360#define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
361
362#define EC_ACPI_MEM_BATTERY_INDEX 0x12
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371#define EC_ACPI_MEM_USB_PORT_POWER 0x13
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377#define EC_ACPI_MEM_MAPPED_BEGIN 0x20
378#define EC_ACPI_MEM_MAPPED_SIZE 0xe0
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380
381#define EC_ACPI_MEM_VERSION_CURRENT 2
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423#define __ec_align1 __packed
424#define __ec_align2 __packed
425#define __ec_align4 __packed
426#define __ec_align_size1 __packed
427#define __ec_align_offset1 __packed
428#define __ec_align_offset2 __packed
429#define __ec_todo_packed __packed
430#define __ec_todo_unpacked
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434
435#define EC_LPC_STATUS_TO_HOST 0x01
436
437#define EC_LPC_STATUS_FROM_HOST 0x02
438
439#define EC_LPC_STATUS_PROCESSING 0x04
440
441#define EC_LPC_STATUS_LAST_CMD 0x08
442
443#define EC_LPC_STATUS_BURST_MODE 0x10
444
445#define EC_LPC_STATUS_SCI_PENDING 0x20
446
447#define EC_LPC_STATUS_SMI_PENDING 0x40
448
449#define EC_LPC_STATUS_RESERVED 0x80
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455#define EC_LPC_STATUS_BUSY_MASK \
456 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
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461
462enum ec_status {
463 EC_RES_SUCCESS = 0,
464 EC_RES_INVALID_COMMAND = 1,
465 EC_RES_ERROR = 2,
466 EC_RES_INVALID_PARAM = 3,
467 EC_RES_ACCESS_DENIED = 4,
468 EC_RES_INVALID_RESPONSE = 5,
469 EC_RES_INVALID_VERSION = 6,
470 EC_RES_INVALID_CHECKSUM = 7,
471 EC_RES_IN_PROGRESS = 8,
472 EC_RES_UNAVAILABLE = 9,
473 EC_RES_TIMEOUT = 10,
474 EC_RES_OVERFLOW = 11,
475 EC_RES_INVALID_HEADER = 12,
476 EC_RES_REQUEST_TRUNCATED = 13,
477 EC_RES_RESPONSE_TOO_BIG = 14,
478 EC_RES_BUS_ERROR = 15,
479 EC_RES_BUSY = 16,
480 EC_RES_INVALID_HEADER_VERSION = 17,
481 EC_RES_INVALID_HEADER_CRC = 18,
482 EC_RES_INVALID_DATA_CRC = 19,
483 EC_RES_DUP_UNAVAILABLE = 20,
484};
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493enum host_event_code {
494 EC_HOST_EVENT_LID_CLOSED = 1,
495 EC_HOST_EVENT_LID_OPEN = 2,
496 EC_HOST_EVENT_POWER_BUTTON = 3,
497 EC_HOST_EVENT_AC_CONNECTED = 4,
498 EC_HOST_EVENT_AC_DISCONNECTED = 5,
499 EC_HOST_EVENT_BATTERY_LOW = 6,
500 EC_HOST_EVENT_BATTERY_CRITICAL = 7,
501 EC_HOST_EVENT_BATTERY = 8,
502 EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
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504 EC_HOST_EVENT_DEVICE = 10,
505 EC_HOST_EVENT_THERMAL = 11,
506 EC_HOST_EVENT_USB_CHARGER = 12,
507 EC_HOST_EVENT_KEY_PRESSED = 13,
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513 EC_HOST_EVENT_INTERFACE_READY = 14,
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515 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
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518 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
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520 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
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523 EC_HOST_EVENT_THROTTLE_START = 18,
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525 EC_HOST_EVENT_THROTTLE_STOP = 19,
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528 EC_HOST_EVENT_HANG_DETECT = 20,
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530 EC_HOST_EVENT_HANG_REBOOT = 21,
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533 EC_HOST_EVENT_PD_MCU = 22,
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536 EC_HOST_EVENT_BATTERY_STATUS = 23,
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539 EC_HOST_EVENT_PANIC = 24,
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542 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25,
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545 EC_HOST_EVENT_RTC = 26,
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548 EC_HOST_EVENT_MKBP = 27,
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551 EC_HOST_EVENT_USB_MUX = 28,
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554 EC_HOST_EVENT_MODE_CHANGE = 29,
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557 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
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560 EC_HOST_EVENT_WOV = 31,
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569 EC_HOST_EVENT_INVALID = 32
570};
571
572#define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1)
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582struct ec_lpc_host_args {
583 uint8_t flags;
584 uint8_t command_version;
585 uint8_t data_size;
586 uint8_t checksum;
587} __ec_align4;
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599#define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
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607#define EC_HOST_ARGS_FLAG_TO_HOST 0x02
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649#define EC_SPI_FRAME_START 0xec
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654#define EC_SPI_PAST_END 0xed
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661#define EC_SPI_RX_READY 0xf8
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667#define EC_SPI_RECEIVING 0xf9
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670#define EC_SPI_PROCESSING 0xfa
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676#define EC_SPI_RX_BAD_DATA 0xfb
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683#define EC_SPI_NOT_READY 0xfc
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690#define EC_SPI_OLD_READY 0xfd
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710#define EC_PROTO2_REQUEST_HEADER_BYTES 3
711#define EC_PROTO2_REQUEST_TRAILER_BYTES 1
712#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
713 EC_PROTO2_REQUEST_TRAILER_BYTES)
714
715#define EC_PROTO2_RESPONSE_HEADER_BYTES 2
716#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
717#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \
718 EC_PROTO2_RESPONSE_TRAILER_BYTES)
719
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721#define EC_PROTO2_MAX_PARAM_SIZE 0xfc
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724#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \
725 EC_PROTO2_MAX_PARAM_SIZE)
726#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \
727 EC_PROTO2_MAX_PARAM_SIZE)
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735#define EC_COMMAND_PROTOCOL_3 0xda
736
737#define EC_HOST_REQUEST_VERSION 3
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751struct ec_host_request {
752 uint8_t struct_version;
753 uint8_t checksum;
754 uint16_t command;
755 uint8_t command_version;
756 uint8_t reserved;
757 uint16_t data_len;
758} __ec_align4;
759
760#define EC_HOST_RESPONSE_VERSION 3
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771struct ec_host_response {
772 uint8_t struct_version;
773 uint8_t checksum;
774 uint16_t result;
775 uint16_t data_len;
776 uint16_t reserved;
777} __ec_align4;
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840struct ec_host_request4 {
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847 uint8_t fields0;
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854 uint8_t fields1;
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857 uint16_t command;
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860 uint16_t data_len;
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863 uint8_t reserved;
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866 uint8_t header_crc;
867} __ec_align4;
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870struct ec_host_response4 {
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877 uint8_t fields0;
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883 uint8_t fields1;
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886 uint16_t result;
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889 uint16_t data_len;
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892 uint8_t reserved;
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895 uint8_t header_crc;
896} __ec_align4;
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899#define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f
900#define EC_PACKET4_0_IS_RESPONSE_MASK 0x10
901#define EC_PACKET4_0_SEQ_NUM_SHIFT 5
902#define EC_PACKET4_0_SEQ_NUM_MASK 0x60
903#define EC_PACKET4_0_SEQ_DUP_MASK 0x80
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906#define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f
907#define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80
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931#define EC_CMD_PROTO_VERSION 0x0000
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937struct ec_response_proto_version {
938 uint32_t version;
939} __ec_align4;
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945#define EC_CMD_HELLO 0x0001
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951struct ec_params_hello {
952 uint32_t in_data;
953} __ec_align4;
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959struct ec_response_hello {
960 uint32_t out_data;
961} __ec_align4;
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964#define EC_CMD_GET_VERSION 0x0002
965
966enum ec_current_image {
967 EC_IMAGE_UNKNOWN = 0,
968 EC_IMAGE_RO,
969 EC_IMAGE_RW
970};
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979struct ec_response_get_version {
980 char version_string_ro[32];
981 char version_string_rw[32];
982 char reserved[32];
983 uint32_t current_image;
984} __ec_align4;
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987#define EC_CMD_READ_TEST 0x0003
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994struct ec_params_read_test {
995 uint32_t offset;
996 uint32_t size;
997} __ec_align4;
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1003struct ec_response_read_test {
1004 uint32_t data[32];
1005} __ec_align4;
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1012#define EC_CMD_GET_BUILD_INFO 0x0004
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1015#define EC_CMD_GET_CHIP_INFO 0x0005
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1023struct ec_response_get_chip_info {
1024 char vendor[32];
1025 char name[32];
1026 char revision[32];
1027} __ec_align4;
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1030#define EC_CMD_GET_BOARD_VERSION 0x0006
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1036struct ec_response_board_version {
1037 uint16_t board_version;
1038} __ec_align2;
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1048#define EC_CMD_READ_MEMMAP 0x0007
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1055struct ec_params_read_memmap {
1056 uint8_t offset;
1057 uint8_t size;
1058} __ec_align1;
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1061#define EC_CMD_GET_CMD_VERSIONS 0x0008
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1067struct ec_params_get_cmd_versions {
1068 uint8_t cmd;
1069} __ec_align1;
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1076struct ec_params_get_cmd_versions_v1 {
1077 uint16_t cmd;
1078} __ec_align2;
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1085struct ec_response_get_cmd_versions {
1086 uint32_t version_mask;
1087} __ec_align4;
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1096#define EC_CMD_GET_COMMS_STATUS 0x0009
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1099enum ec_comms_status {
1100 EC_COMMS_STATUS_PROCESSING = BIT(0),
1101};
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1108struct ec_response_get_comms_status {
1109 uint32_t flags;
1110} __ec_align4;
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1113#define EC_CMD_TEST_PROTOCOL 0x000A
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1116struct ec_params_test_protocol {
1117 uint32_t ec_result;
1118 uint32_t ret_len;
1119 uint8_t buf[32];
1120} __ec_align4;
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1123struct ec_response_test_protocol {
1124 uint8_t buf[32];
1125} __ec_align4;
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1128#define EC_CMD_GET_PROTOCOL_INFO 0x000B
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1132#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
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1142struct ec_response_get_protocol_info {
1143
1144 uint32_t protocol_versions;
1145 uint16_t max_request_packet_size;
1146 uint16_t max_response_packet_size;
1147 uint32_t flags;
1148} __ec_align4;
1149
1150
1151
1152
1153
1154
1155#define EC_GSV_SET 0x80000000
1156
1157
1158
1159
1160
1161#define EC_GSV_PARAM_MASK 0x00ffffff
1162
1163struct ec_params_get_set_value {
1164 uint32_t flags;
1165 uint32_t value;
1166} __ec_align4;
1167
1168struct ec_response_get_set_value {
1169 uint32_t flags;
1170 uint32_t value;
1171} __ec_align4;
1172
1173
1174#define EC_CMD_GSV_PAUSE_IN_S5 0x000C
1175
1176
1177
1178#define EC_CMD_GET_FEATURES 0x000D
1179
1180
1181enum ec_feature_code {
1182
1183
1184
1185
1186 EC_FEATURE_LIMITED = 0,
1187
1188
1189
1190
1191 EC_FEATURE_FLASH = 1,
1192
1193
1194
1195 EC_FEATURE_PWM_FAN = 2,
1196
1197
1198
1199 EC_FEATURE_PWM_KEYB = 3,
1200
1201
1202
1203 EC_FEATURE_LIGHTBAR = 4,
1204
1205 EC_FEATURE_LED = 5,
1206
1207
1208
1209
1210 EC_FEATURE_MOTION_SENSE = 6,
1211
1212 EC_FEATURE_KEYB = 7,
1213
1214 EC_FEATURE_PSTORE = 8,
1215
1216 EC_FEATURE_PORT80 = 9,
1217
1218
1219
1220
1221 EC_FEATURE_THERMAL = 10,
1222
1223 EC_FEATURE_BKLIGHT_SWITCH = 11,
1224
1225 EC_FEATURE_WIFI_SWITCH = 12,
1226
1227 EC_FEATURE_HOST_EVENTS = 13,
1228
1229 EC_FEATURE_GPIO = 14,
1230
1231 EC_FEATURE_I2C = 15,
1232
1233 EC_FEATURE_CHARGER = 16,
1234
1235 EC_FEATURE_BATTERY = 17,
1236
1237
1238
1239
1240 EC_FEATURE_SMART_BATTERY = 18,
1241
1242 EC_FEATURE_HANG_DETECT = 19,
1243
1244 EC_FEATURE_PMU = 20,
1245
1246 EC_FEATURE_SUB_MCU = 21,
1247
1248 EC_FEATURE_USB_PD = 22,
1249
1250 EC_FEATURE_USB_MUX = 23,
1251
1252 EC_FEATURE_MOTION_SENSE_FIFO = 24,
1253
1254 EC_FEATURE_VSTORE = 25,
1255
1256 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26,
1257
1258 EC_FEATURE_RTC = 27,
1259
1260 EC_FEATURE_FINGERPRINT = 28,
1261
1262 EC_FEATURE_TOUCHPAD = 29,
1263
1264 EC_FEATURE_RWSIG = 30,
1265
1266 EC_FEATURE_DEVICE_EVENT = 31,
1267
1268 EC_FEATURE_UNIFIED_WAKE_MASKS = 32,
1269
1270 EC_FEATURE_HOST_EVENT64 = 33,
1271
1272 EC_FEATURE_EXEC_IN_RAM = 34,
1273
1274 EC_FEATURE_CEC = 35,
1275
1276 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36,
1277
1278
1279
1280
1281
1282 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
1283
1284 EC_FEATURE_SCP = 39,
1285
1286 EC_FEATURE_ISH = 40,
1287};
1288
1289#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
1290#define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32)
1291
1292struct ec_response_get_features {
1293 uint32_t flags[2];
1294} __ec_align4;
1295
1296
1297
1298#define EC_CMD_GET_SKU_ID 0x000E
1299
1300
1301#define EC_CMD_SET_SKU_ID 0x000F
1302
1303struct ec_sku_id_info {
1304 uint32_t sku_id;
1305} __ec_align4;
1306
1307
1308
1309
1310
1311#define EC_CMD_FLASH_INFO 0x0010
1312#define EC_VER_FLASH_INFO 2
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326struct ec_response_flash_info {
1327 uint32_t flash_size;
1328 uint32_t write_block_size;
1329 uint32_t erase_block_size;
1330 uint32_t protect_block_size;
1331} __ec_align4;
1332
1333
1334
1335
1336
1337#define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
1338
1339
1340
1341
1342
1343
1344
1345
1346#define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377struct ec_response_flash_info_1 {
1378
1379 uint32_t flash_size;
1380 uint32_t write_block_size;
1381 uint32_t erase_block_size;
1382 uint32_t protect_block_size;
1383
1384
1385 uint32_t write_ideal_size;
1386 uint32_t flags;
1387} __ec_align4;
1388
1389struct ec_params_flash_info_2 {
1390
1391 uint16_t num_banks_desc;
1392
1393 uint8_t reserved[2];
1394} __ec_align4;
1395
1396struct ec_flash_bank {
1397
1398 uint16_t count;
1399
1400 uint8_t size_exp;
1401
1402 uint8_t write_size_exp;
1403
1404 uint8_t erase_size_exp;
1405
1406 uint8_t protect_size_exp;
1407
1408 uint8_t reserved[2];
1409};
1410
1411struct ec_response_flash_info_2 {
1412
1413 uint32_t flash_size;
1414
1415 uint32_t flags;
1416
1417 uint32_t write_ideal_size;
1418
1419 uint16_t num_banks_total;
1420
1421 uint16_t num_banks_desc;
1422 struct ec_flash_bank banks[0];
1423} __ec_align4;
1424
1425
1426
1427
1428
1429
1430#define EC_CMD_FLASH_READ 0x0011
1431
1432
1433
1434
1435
1436
1437struct ec_params_flash_read {
1438 uint32_t offset;
1439 uint32_t size;
1440} __ec_align4;
1441
1442
1443#define EC_CMD_FLASH_WRITE 0x0012
1444#define EC_VER_FLASH_WRITE 1
1445
1446
1447#define EC_FLASH_WRITE_VER0_SIZE 64
1448
1449
1450
1451
1452
1453
1454struct ec_params_flash_write {
1455 uint32_t offset;
1456 uint32_t size;
1457
1458} __ec_align4;
1459
1460
1461#define EC_CMD_FLASH_ERASE 0x0013
1462
1463
1464
1465
1466
1467
1468struct ec_params_flash_erase {
1469 uint32_t offset;
1470 uint32_t size;
1471} __ec_align4;
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490enum ec_flash_erase_cmd {
1491 FLASH_ERASE_SECTOR,
1492 FLASH_ERASE_SECTOR_ASYNC,
1493 FLASH_ERASE_GET_RESULT,
1494};
1495
1496
1497
1498
1499
1500
1501
1502
1503struct ec_params_flash_erase_v1 {
1504 uint8_t cmd;
1505 uint8_t reserved;
1506 uint16_t flag;
1507 struct ec_params_flash_erase params;
1508} __ec_align4;
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520#define EC_CMD_FLASH_PROTECT 0x0015
1521#define EC_VER_FLASH_PROTECT 1
1522
1523
1524
1525#define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0)
1526
1527
1528
1529
1530#define EC_FLASH_PROTECT_RO_NOW BIT(1)
1531
1532#define EC_FLASH_PROTECT_ALL_NOW BIT(2)
1533
1534#define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3)
1535
1536#define EC_FLASH_PROTECT_ERROR_STUCK BIT(4)
1537
1538
1539
1540
1541
1542#define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5)
1543
1544#define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6)
1545
1546#define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7)
1547
1548#define EC_FLASH_PROTECT_RW_NOW BIT(8)
1549
1550#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9)
1551
1552#define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10)
1553
1554
1555
1556
1557
1558
1559
1560struct ec_params_flash_protect {
1561 uint32_t mask;
1562 uint32_t flags;
1563} __ec_align4;
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574struct ec_response_flash_protect {
1575 uint32_t flags;
1576 uint32_t valid_flags;
1577 uint32_t writable_flags;
1578} __ec_align4;
1579
1580
1581
1582
1583
1584
1585
1586#define EC_CMD_FLASH_REGION_INFO 0x0016
1587#define EC_VER_FLASH_REGION_INFO 1
1588
1589enum ec_flash_region {
1590
1591 EC_FLASH_REGION_RO = 0,
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601 EC_FLASH_REGION_ACTIVE,
1602
1603
1604
1605
1606 EC_FLASH_REGION_WP_RO,
1607
1608 EC_FLASH_REGION_UPDATE,
1609
1610 EC_FLASH_REGION_COUNT,
1611};
1612
1613
1614
1615
1616#define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE
1617
1618
1619
1620
1621
1622
1623struct ec_params_flash_region_info {
1624 uint32_t region;
1625} __ec_align4;
1626
1627struct ec_response_flash_region_info {
1628 uint32_t offset;
1629 uint32_t size;
1630} __ec_align4;
1631
1632
1633#define EC_CMD_VBNV_CONTEXT 0x0017
1634#define EC_VER_VBNV_CONTEXT 1
1635#define EC_VBNV_BLOCK_SIZE 16
1636
1637enum ec_vbnvcontext_op {
1638 EC_VBNV_CONTEXT_OP_READ,
1639 EC_VBNV_CONTEXT_OP_WRITE,
1640};
1641
1642struct ec_params_vbnvcontext {
1643 uint32_t op;
1644 uint8_t block[EC_VBNV_BLOCK_SIZE];
1645} __ec_align4;
1646
1647struct ec_response_vbnvcontext {
1648 uint8_t block[EC_VBNV_BLOCK_SIZE];
1649} __ec_align4;
1650
1651
1652
1653#define EC_CMD_FLASH_SPI_INFO 0x0018
1654
1655struct ec_response_flash_spi_info {
1656
1657 uint8_t jedec[3];
1658
1659
1660 uint8_t reserved0;
1661
1662
1663 uint8_t mfr_dev_id[2];
1664
1665
1666 uint8_t sr1, sr2;
1667} __ec_align1;
1668
1669
1670
1671#define EC_CMD_FLASH_SELECT 0x0019
1672
1673
1674
1675
1676
1677struct ec_params_flash_select {
1678 uint8_t select;
1679} __ec_align4;
1680
1681
1682
1683
1684
1685
1686#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
1687
1688struct ec_response_pwm_get_fan_rpm {
1689 uint32_t rpm;
1690} __ec_align4;
1691
1692
1693#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1694
1695
1696struct ec_params_pwm_set_fan_target_rpm_v0 {
1697 uint32_t rpm;
1698} __ec_align4;
1699
1700
1701struct ec_params_pwm_set_fan_target_rpm_v1 {
1702 uint32_t rpm;
1703 uint8_t fan_idx;
1704} __ec_align_size1;
1705
1706
1707
1708#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
1709
1710struct ec_response_pwm_get_keyboard_backlight {
1711 uint8_t percent;
1712 uint8_t enabled;
1713} __ec_align1;
1714
1715
1716
1717#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
1718
1719struct ec_params_pwm_set_keyboard_backlight {
1720 uint8_t percent;
1721} __ec_align1;
1722
1723
1724#define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1725
1726
1727struct ec_params_pwm_set_fan_duty_v0 {
1728 uint32_t percent;
1729} __ec_align4;
1730
1731
1732struct ec_params_pwm_set_fan_duty_v1 {
1733 uint32_t percent;
1734 uint8_t fan_idx;
1735} __ec_align_size1;
1736
1737#define EC_CMD_PWM_SET_DUTY 0x0025
1738
1739#define EC_PWM_MAX_DUTY 0xffff
1740
1741enum ec_pwm_type {
1742
1743 EC_PWM_TYPE_GENERIC = 0,
1744
1745 EC_PWM_TYPE_KB_LIGHT,
1746
1747 EC_PWM_TYPE_DISPLAY_LIGHT,
1748 EC_PWM_TYPE_COUNT,
1749};
1750
1751struct ec_params_pwm_set_duty {
1752 uint16_t duty;
1753 uint8_t pwm_type;
1754 uint8_t index;
1755} __ec_align4;
1756
1757#define EC_CMD_PWM_GET_DUTY 0x0026
1758
1759struct ec_params_pwm_get_duty {
1760 uint8_t pwm_type;
1761 uint8_t index;
1762} __ec_align1;
1763
1764struct ec_response_pwm_get_duty {
1765 uint16_t duty;
1766} __ec_align2;
1767
1768
1769
1770
1771
1772
1773
1774
1775#define EC_CMD_LIGHTBAR_CMD 0x0028
1776
1777struct rgb_s {
1778 uint8_t r, g, b;
1779} __ec_todo_unpacked;
1780
1781#define LB_BATTERY_LEVELS 4
1782
1783
1784
1785
1786
1787struct lightbar_params_v0 {
1788
1789 int32_t google_ramp_up;
1790 int32_t google_ramp_down;
1791 int32_t s3s0_ramp_up;
1792 int32_t s0_tick_delay[2];
1793 int32_t s0a_tick_delay[2];
1794 int32_t s0s3_ramp_down;
1795 int32_t s3_sleep_for;
1796 int32_t s3_ramp_up;
1797 int32_t s3_ramp_down;
1798
1799
1800 uint8_t new_s0;
1801 uint8_t osc_min[2];
1802 uint8_t osc_max[2];
1803 uint8_t w_ofs[2];
1804
1805
1806 uint8_t bright_bl_off_fixed[2];
1807 uint8_t bright_bl_on_min[2];
1808 uint8_t bright_bl_on_max[2];
1809
1810
1811 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1812
1813
1814 uint8_t s0_idx[2][LB_BATTERY_LEVELS];
1815 uint8_t s3_idx[2][LB_BATTERY_LEVELS];
1816
1817
1818 struct rgb_s color[8];
1819} __ec_todo_packed;
1820
1821struct lightbar_params_v1 {
1822
1823 int32_t google_ramp_up;
1824 int32_t google_ramp_down;
1825 int32_t s3s0_ramp_up;
1826 int32_t s0_tick_delay[2];
1827 int32_t s0a_tick_delay[2];
1828 int32_t s0s3_ramp_down;
1829 int32_t s3_sleep_for;
1830 int32_t s3_ramp_up;
1831 int32_t s3_ramp_down;
1832 int32_t s5_ramp_up;
1833 int32_t s5_ramp_down;
1834 int32_t tap_tick_delay;
1835 int32_t tap_gate_delay;
1836 int32_t tap_display_time;
1837
1838
1839 uint8_t tap_pct_red;
1840 uint8_t tap_pct_green;
1841 uint8_t tap_seg_min_on;
1842 uint8_t tap_seg_max_on;
1843 uint8_t tap_seg_osc;
1844 uint8_t tap_idx[3];
1845
1846
1847 uint8_t osc_min[2];
1848 uint8_t osc_max[2];
1849 uint8_t w_ofs[2];
1850
1851
1852 uint8_t bright_bl_off_fixed[2];
1853 uint8_t bright_bl_on_min[2];
1854 uint8_t bright_bl_on_max[2];
1855
1856
1857 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1858
1859
1860 uint8_t s0_idx[2][LB_BATTERY_LEVELS];
1861 uint8_t s3_idx[2][LB_BATTERY_LEVELS];
1862
1863
1864 uint8_t s5_idx;
1865
1866
1867 struct rgb_s color[8];
1868} __ec_todo_packed;
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879struct lightbar_params_v2_timing {
1880
1881 int32_t google_ramp_up;
1882 int32_t google_ramp_down;
1883 int32_t s3s0_ramp_up;
1884 int32_t s0_tick_delay[2];
1885 int32_t s0a_tick_delay[2];
1886 int32_t s0s3_ramp_down;
1887 int32_t s3_sleep_for;
1888 int32_t s3_ramp_up;
1889 int32_t s3_ramp_down;
1890 int32_t s5_ramp_up;
1891 int32_t s5_ramp_down;
1892 int32_t tap_tick_delay;
1893 int32_t tap_gate_delay;
1894 int32_t tap_display_time;
1895} __ec_todo_packed;
1896
1897struct lightbar_params_v2_tap {
1898
1899 uint8_t tap_pct_red;
1900 uint8_t tap_pct_green;
1901 uint8_t tap_seg_min_on;
1902 uint8_t tap_seg_max_on;
1903 uint8_t tap_seg_osc;
1904 uint8_t tap_idx[3];
1905} __ec_todo_packed;
1906
1907struct lightbar_params_v2_oscillation {
1908
1909 uint8_t osc_min[2];
1910 uint8_t osc_max[2];
1911 uint8_t w_ofs[2];
1912} __ec_todo_packed;
1913
1914struct lightbar_params_v2_brightness {
1915
1916 uint8_t bright_bl_off_fixed[2];
1917 uint8_t bright_bl_on_min[2];
1918 uint8_t bright_bl_on_max[2];
1919} __ec_todo_packed;
1920
1921struct lightbar_params_v2_thresholds {
1922
1923 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1924} __ec_todo_packed;
1925
1926struct lightbar_params_v2_colors {
1927
1928 uint8_t s0_idx[2][LB_BATTERY_LEVELS];
1929 uint8_t s3_idx[2][LB_BATTERY_LEVELS];
1930
1931
1932 uint8_t s5_idx;
1933
1934
1935 struct rgb_s color[8];
1936} __ec_todo_packed;
1937
1938
1939#define EC_LB_PROG_LEN 192
1940struct lightbar_program {
1941 uint8_t size;
1942 uint8_t data[EC_LB_PROG_LEN];
1943} __ec_todo_unpacked;
1944
1945struct ec_params_lightbar {
1946 uint8_t cmd;
1947 union {
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960 struct __ec_todo_unpacked {
1961 uint8_t num;
1962 } set_brightness, seq, demo;
1963
1964 struct __ec_todo_unpacked {
1965 uint8_t ctrl, reg, value;
1966 } reg;
1967
1968 struct __ec_todo_unpacked {
1969 uint8_t led, red, green, blue;
1970 } set_rgb;
1971
1972 struct __ec_todo_unpacked {
1973 uint8_t led;
1974 } get_rgb;
1975
1976 struct __ec_todo_unpacked {
1977 uint8_t enable;
1978 } manual_suspend_ctrl;
1979
1980 struct lightbar_params_v0 set_params_v0;
1981 struct lightbar_params_v1 set_params_v1;
1982
1983 struct lightbar_params_v2_timing set_v2par_timing;
1984 struct lightbar_params_v2_tap set_v2par_tap;
1985 struct lightbar_params_v2_oscillation set_v2par_osc;
1986 struct lightbar_params_v2_brightness set_v2par_bright;
1987 struct lightbar_params_v2_thresholds set_v2par_thlds;
1988 struct lightbar_params_v2_colors set_v2par_colors;
1989
1990 struct lightbar_program set_program;
1991 };
1992} __ec_todo_packed;
1993
1994struct ec_response_lightbar {
1995 union {
1996 struct __ec_todo_unpacked {
1997 struct __ec_todo_unpacked {
1998 uint8_t reg;
1999 uint8_t ic0;
2000 uint8_t ic1;
2001 } vals[23];
2002 } dump;
2003
2004 struct __ec_todo_unpacked {
2005 uint8_t num;
2006 } get_seq, get_brightness, get_demo;
2007
2008 struct lightbar_params_v0 get_params_v0;
2009 struct lightbar_params_v1 get_params_v1;
2010
2011
2012 struct lightbar_params_v2_timing get_params_v2_timing;
2013 struct lightbar_params_v2_tap get_params_v2_tap;
2014 struct lightbar_params_v2_oscillation get_params_v2_osc;
2015 struct lightbar_params_v2_brightness get_params_v2_bright;
2016 struct lightbar_params_v2_thresholds get_params_v2_thlds;
2017 struct lightbar_params_v2_colors get_params_v2_colors;
2018
2019 struct __ec_todo_unpacked {
2020 uint32_t num;
2021 uint32_t flags;
2022 } version;
2023
2024 struct __ec_todo_unpacked {
2025 uint8_t red, green, blue;
2026 } get_rgb;
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037 };
2038} __ec_todo_packed;
2039
2040
2041enum lightbar_command {
2042 LIGHTBAR_CMD_DUMP = 0,
2043 LIGHTBAR_CMD_OFF = 1,
2044 LIGHTBAR_CMD_ON = 2,
2045 LIGHTBAR_CMD_INIT = 3,
2046 LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
2047 LIGHTBAR_CMD_SEQ = 5,
2048 LIGHTBAR_CMD_REG = 6,
2049 LIGHTBAR_CMD_SET_RGB = 7,
2050 LIGHTBAR_CMD_GET_SEQ = 8,
2051 LIGHTBAR_CMD_DEMO = 9,
2052 LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
2053 LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
2054 LIGHTBAR_CMD_VERSION = 12,
2055 LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
2056 LIGHTBAR_CMD_GET_RGB = 14,
2057 LIGHTBAR_CMD_GET_DEMO = 15,
2058 LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
2059 LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
2060 LIGHTBAR_CMD_SET_PROGRAM = 18,
2061 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
2062 LIGHTBAR_CMD_SUSPEND = 20,
2063 LIGHTBAR_CMD_RESUME = 21,
2064 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22,
2065 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23,
2066 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24,
2067 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25,
2068 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26,
2069 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27,
2070 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28,
2071 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29,
2072 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30,
2073 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,
2074 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,
2075 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,
2076 LIGHTBAR_NUM_CMDS
2077};
2078
2079
2080
2081
2082#define EC_CMD_LED_CONTROL 0x0029
2083
2084enum ec_led_id {
2085
2086 EC_LED_ID_BATTERY_LED = 0,
2087
2088
2089
2090
2091 EC_LED_ID_POWER_LED,
2092
2093 EC_LED_ID_ADAPTER_LED,
2094
2095 EC_LED_ID_LEFT_LED,
2096
2097 EC_LED_ID_RIGHT_LED,
2098
2099 EC_LED_ID_RECOVERY_HW_REINIT_LED,
2100
2101 EC_LED_ID_SYSRQ_DEBUG_LED,
2102
2103 EC_LED_ID_COUNT
2104};
2105
2106
2107#define EC_LED_FLAGS_QUERY BIT(0)
2108#define EC_LED_FLAGS_AUTO BIT(1)
2109
2110enum ec_led_colors {
2111 EC_LED_COLOR_RED = 0,
2112 EC_LED_COLOR_GREEN,
2113 EC_LED_COLOR_BLUE,
2114 EC_LED_COLOR_YELLOW,
2115 EC_LED_COLOR_WHITE,
2116 EC_LED_COLOR_AMBER,
2117
2118 EC_LED_COLOR_COUNT
2119};
2120
2121struct ec_params_led_control {
2122 uint8_t led_id;
2123 uint8_t flags;
2124
2125 uint8_t brightness[EC_LED_COLOR_COUNT];
2126} __ec_align1;
2127
2128struct ec_response_led_control {
2129
2130
2131
2132
2133
2134
2135
2136 uint8_t brightness_range[EC_LED_COLOR_COUNT];
2137} __ec_align1;
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148#define EC_CMD_VBOOT_HASH 0x002A
2149
2150struct ec_params_vboot_hash {
2151 uint8_t cmd;
2152 uint8_t hash_type;
2153 uint8_t nonce_size;
2154 uint8_t reserved0;
2155 uint32_t offset;
2156 uint32_t size;
2157 uint8_t nonce_data[64];
2158} __ec_align4;
2159
2160struct ec_response_vboot_hash {
2161 uint8_t status;
2162 uint8_t hash_type;
2163 uint8_t digest_size;
2164 uint8_t reserved0;
2165 uint32_t offset;
2166 uint32_t size;
2167 uint8_t hash_digest[64];
2168} __ec_align4;
2169
2170enum ec_vboot_hash_cmd {
2171 EC_VBOOT_HASH_GET = 0,
2172 EC_VBOOT_HASH_ABORT = 1,
2173 EC_VBOOT_HASH_START = 2,
2174 EC_VBOOT_HASH_RECALC = 3,
2175};
2176
2177enum ec_vboot_hash_type {
2178 EC_VBOOT_HASH_TYPE_SHA256 = 0,
2179};
2180
2181enum ec_vboot_hash_status {
2182 EC_VBOOT_HASH_STATUS_NONE = 0,
2183 EC_VBOOT_HASH_STATUS_DONE = 1,
2184 EC_VBOOT_HASH_STATUS_BUSY = 2,
2185};
2186
2187
2188
2189
2190
2191
2192#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
2193#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd
2194#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc
2195
2196
2197
2198
2199
2200#define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE
2201
2202
2203
2204
2205
2206
2207#define EC_CMD_MOTION_SENSE_CMD 0x002B
2208
2209
2210enum motionsense_command {
2211
2212
2213
2214
2215 MOTIONSENSE_CMD_DUMP = 0,
2216
2217
2218
2219
2220
2221
2222 MOTIONSENSE_CMD_INFO = 1,
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234 MOTIONSENSE_CMD_EC_RATE = 2,
2235
2236
2237
2238
2239
2240 MOTIONSENSE_CMD_SENSOR_ODR = 3,
2241
2242
2243
2244
2245
2246 MOTIONSENSE_CMD_SENSOR_RANGE = 4,
2247
2248
2249
2250
2251
2252
2253
2254
2255 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
2256
2257
2258
2259
2260 MOTIONSENSE_CMD_DATA = 6,
2261
2262
2263
2264
2265 MOTIONSENSE_CMD_FIFO_INFO = 7,
2266
2267
2268
2269
2270
2271 MOTIONSENSE_CMD_FIFO_FLUSH = 8,
2272
2273
2274
2275
2276 MOTIONSENSE_CMD_FIFO_READ = 9,
2277
2278
2279
2280
2281
2282 MOTIONSENSE_CMD_PERFORM_CALIB = 10,
2283
2284
2285
2286
2287
2288
2289
2290 MOTIONSENSE_CMD_SENSOR_OFFSET = 11,
2291
2292
2293
2294
2295
2296 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12,
2297
2298
2299
2300
2301
2302 MOTIONSENSE_CMD_SET_ACTIVITY = 13,
2303
2304
2305
2306
2307 MOTIONSENSE_CMD_LID_ANGLE = 14,
2308
2309
2310
2311
2312
2313
2314 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15,
2315
2316
2317
2318
2319
2320 MOTIONSENSE_CMD_SPOOF = 16,
2321
2322
2323 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17,
2324
2325
2326
2327
2328
2329 MOTIONSENSE_CMD_SENSOR_SCALE = 18,
2330
2331
2332 MOTIONSENSE_NUM_CMDS
2333};
2334
2335
2336enum motionsensor_type {
2337 MOTIONSENSE_TYPE_ACCEL = 0,
2338 MOTIONSENSE_TYPE_GYRO = 1,
2339 MOTIONSENSE_TYPE_MAG = 2,
2340 MOTIONSENSE_TYPE_PROX = 3,
2341 MOTIONSENSE_TYPE_LIGHT = 4,
2342 MOTIONSENSE_TYPE_ACTIVITY = 5,
2343 MOTIONSENSE_TYPE_BARO = 6,
2344 MOTIONSENSE_TYPE_SYNC = 7,
2345 MOTIONSENSE_TYPE_MAX,
2346};
2347
2348
2349enum motionsensor_location {
2350 MOTIONSENSE_LOC_BASE = 0,
2351 MOTIONSENSE_LOC_LID = 1,
2352 MOTIONSENSE_LOC_CAMERA = 2,
2353 MOTIONSENSE_LOC_MAX,
2354};
2355
2356
2357enum motionsensor_chip {
2358 MOTIONSENSE_CHIP_KXCJ9 = 0,
2359 MOTIONSENSE_CHIP_LSM6DS0 = 1,
2360 MOTIONSENSE_CHIP_BMI160 = 2,
2361 MOTIONSENSE_CHIP_SI1141 = 3,
2362 MOTIONSENSE_CHIP_SI1142 = 4,
2363 MOTIONSENSE_CHIP_SI1143 = 5,
2364 MOTIONSENSE_CHIP_KX022 = 6,
2365 MOTIONSENSE_CHIP_L3GD20H = 7,
2366 MOTIONSENSE_CHIP_BMA255 = 8,
2367 MOTIONSENSE_CHIP_BMP280 = 9,
2368 MOTIONSENSE_CHIP_OPT3001 = 10,
2369 MOTIONSENSE_CHIP_BH1730 = 11,
2370 MOTIONSENSE_CHIP_GPIO = 12,
2371 MOTIONSENSE_CHIP_LIS2DH = 13,
2372 MOTIONSENSE_CHIP_LSM6DSM = 14,
2373 MOTIONSENSE_CHIP_LIS2DE = 15,
2374 MOTIONSENSE_CHIP_LIS2MDL = 16,
2375 MOTIONSENSE_CHIP_LSM6DS3 = 17,
2376 MOTIONSENSE_CHIP_LSM6DSO = 18,
2377 MOTIONSENSE_CHIP_LNG2DM = 19,
2378 MOTIONSENSE_CHIP_MAX,
2379};
2380
2381
2382enum motionsensor_orientation {
2383 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0,
2384 MOTIONSENSE_ORIENTATION_PORTRAIT = 1,
2385 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2,
2386 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3,
2387 MOTIONSENSE_ORIENTATION_UNKNOWN = 4,
2388};
2389
2390struct ec_response_motion_sensor_data {
2391
2392 uint8_t flags;
2393
2394 uint8_t sensor_num;
2395
2396 union {
2397 int16_t data[3];
2398 struct __ec_todo_packed {
2399 uint16_t reserved;
2400 uint32_t timestamp;
2401 };
2402 struct __ec_todo_unpacked {
2403 uint8_t activity;
2404 uint8_t state;
2405 int16_t add_info[2];
2406 };
2407 };
2408} __ec_todo_packed;
2409
2410
2411struct ec_response_motion_sense_fifo_info {
2412
2413 uint16_t size;
2414
2415 uint16_t count;
2416
2417
2418
2419 uint32_t timestamp;
2420
2421 uint16_t total_lost;
2422
2423 uint16_t lost[0];
2424} __ec_todo_packed;
2425
2426struct ec_response_motion_sense_fifo_data {
2427 uint32_t number_data;
2428 struct ec_response_motion_sensor_data data[0];
2429} __ec_todo_packed;
2430
2431
2432enum motionsensor_activity {
2433 MOTIONSENSE_ACTIVITY_RESERVED = 0,
2434 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1,
2435 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,
2436 MOTIONSENSE_ACTIVITY_ORIENTATION = 3,
2437};
2438
2439struct ec_motion_sense_activity {
2440 uint8_t sensor_num;
2441 uint8_t activity;
2442 uint8_t enable;
2443 uint8_t reserved;
2444 uint16_t parameters[3];
2445} __ec_todo_unpacked;
2446
2447
2448#define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)
2449
2450
2451#define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)
2452
2453
2454
2455
2456
2457#define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)
2458#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1)
2459#define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2)
2460#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3)
2461#define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4)
2462
2463
2464
2465
2466
2467
2468#define EC_MOTION_SENSE_NO_VALUE -1
2469
2470#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2471
2472
2473
2474#define MOTION_SENSE_SET_OFFSET BIT(0)
2475
2476
2477#define MOTION_SENSE_DEFAULT_SCALE BIT(15)
2478
2479#define LID_ANGLE_UNRELIABLE 500
2480
2481enum motionsense_spoof_mode {
2482
2483 MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2484
2485
2486 MOTIONSENSE_SPOOF_MODE_CUSTOM,
2487
2488
2489 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT,
2490
2491
2492 MOTIONSENSE_SPOOF_MODE_QUERY,
2493};
2494
2495struct ec_params_motion_sense {
2496 uint8_t cmd;
2497 union {
2498
2499 struct __ec_todo_unpacked {
2500
2501
2502
2503
2504
2505 uint8_t max_sensor_count;
2506 } dump;
2507
2508
2509
2510
2511 struct __ec_todo_unpacked {
2512
2513
2514
2515 int16_t data;
2516 } kb_wake_angle;
2517
2518
2519
2520
2521
2522 struct __ec_todo_unpacked {
2523 uint8_t sensor_num;
2524 } info, info_3, data, fifo_flush, perform_calib,
2525 list_activities;
2526
2527
2528
2529
2530
2531 struct __ec_todo_unpacked {
2532 uint8_t sensor_num;
2533
2534
2535 uint8_t roundup;
2536
2537 uint16_t reserved;
2538
2539
2540 int32_t data;
2541 } ec_rate, sensor_odr, sensor_range;
2542
2543
2544 struct __ec_todo_packed {
2545 uint8_t sensor_num;
2546
2547
2548
2549
2550
2551
2552 uint16_t flags;
2553
2554
2555
2556
2557
2558
2559
2560 int16_t temp;
2561
2562
2563
2564
2565
2566
2567
2568
2569 int16_t offset[3];
2570 } sensor_offset;
2571
2572
2573 struct __ec_todo_packed {
2574 uint8_t sensor_num;
2575
2576
2577
2578
2579
2580
2581 uint16_t flags;
2582
2583
2584
2585
2586
2587
2588
2589 int16_t temp;
2590
2591
2592
2593
2594
2595
2596
2597
2598 uint16_t scale[3];
2599 } sensor_scale;
2600
2601
2602
2603
2604
2605
2606 struct __ec_todo_unpacked {
2607
2608
2609
2610
2611 uint32_t max_data_vector;
2612 } fifo_read;
2613
2614 struct ec_motion_sense_activity set_activity;
2615
2616
2617
2618
2619
2620 struct __ec_todo_unpacked {
2621
2622
2623
2624
2625 int8_t enable;
2626 } fifo_int_enable;
2627
2628
2629 struct __ec_todo_packed {
2630 uint8_t sensor_id;
2631
2632
2633 uint8_t spoof_enable;
2634
2635
2636 uint8_t reserved;
2637
2638
2639 int16_t components[3];
2640 } spoof;
2641
2642
2643 struct __ec_todo_unpacked {
2644
2645
2646
2647
2648 int16_t lid_angle;
2649
2650
2651
2652
2653
2654
2655
2656
2657 int16_t hys_degree;
2658 } tablet_mode_threshold;
2659 };
2660} __ec_todo_packed;
2661
2662struct ec_response_motion_sense {
2663 union {
2664
2665 struct __ec_todo_unpacked {
2666
2667 uint8_t module_flags;
2668
2669
2670 uint8_t sensor_count;
2671
2672
2673
2674
2675
2676 struct ec_response_motion_sensor_data sensor[0];
2677 } dump;
2678
2679
2680 struct __ec_todo_unpacked {
2681
2682 uint8_t type;
2683
2684
2685 uint8_t location;
2686
2687
2688 uint8_t chip;
2689 } info;
2690
2691
2692 struct __ec_todo_unpacked {
2693
2694 uint8_t type;
2695
2696
2697 uint8_t location;
2698
2699
2700 uint8_t chip;
2701
2702
2703 uint32_t min_frequency;
2704
2705
2706 uint32_t max_frequency;
2707
2708
2709 uint32_t fifo_max_event_count;
2710 } info_3;
2711
2712
2713 struct ec_response_motion_sensor_data data;
2714
2715
2716
2717
2718
2719
2720
2721
2722 struct __ec_todo_unpacked {
2723
2724 int32_t ret;
2725 } ec_rate, sensor_odr, sensor_range, kb_wake_angle,
2726 fifo_int_enable, spoof;
2727
2728
2729
2730
2731
2732 struct __ec_todo_unpacked {
2733 int16_t temp;
2734 int16_t offset[3];
2735 } sensor_offset, perform_calib;
2736
2737
2738 struct __ec_todo_unpacked {
2739 int16_t temp;
2740 uint16_t scale[3];
2741 } sensor_scale;
2742
2743 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;
2744
2745 struct ec_response_motion_sense_fifo_data fifo_read;
2746
2747 struct __ec_todo_packed {
2748 uint16_t reserved;
2749 uint32_t enabled;
2750 uint32_t disabled;
2751 } list_activities;
2752
2753
2754
2755
2756 struct __ec_todo_unpacked {
2757
2758
2759
2760
2761 uint16_t value;
2762 } lid_angle;
2763
2764
2765 struct __ec_todo_unpacked {
2766
2767
2768
2769
2770 uint16_t lid_angle;
2771
2772
2773 uint16_t hys_degree;
2774 } tablet_mode_threshold;
2775
2776 };
2777} __ec_todo_packed;
2778
2779
2780
2781
2782
2783#define EC_CMD_FORCE_LID_OPEN 0x002C
2784
2785struct ec_params_force_lid_open {
2786 uint8_t enabled;
2787} __ec_align1;
2788
2789
2790
2791#define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2792
2793enum ec_config_power_button_flags {
2794
2795 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0),
2796};
2797
2798struct ec_params_config_power_button {
2799
2800 uint8_t flags;
2801} __ec_align1;
2802
2803
2804
2805
2806
2807#define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2808
2809struct ec_params_usb_charge_set_mode {
2810 uint8_t usb_port_id;
2811 uint8_t mode:7;
2812 uint8_t inhibit_charge:1;
2813} __ec_align1;
2814
2815
2816
2817
2818
2819#define EC_PSTORE_SIZE_MAX 64
2820
2821
2822#define EC_CMD_PSTORE_INFO 0x0040
2823
2824struct ec_response_pstore_info {
2825
2826 uint32_t pstore_size;
2827
2828 uint32_t access_size;
2829} __ec_align4;
2830
2831
2832
2833
2834
2835
2836#define EC_CMD_PSTORE_READ 0x0041
2837
2838struct ec_params_pstore_read {
2839 uint32_t offset;
2840 uint32_t size;
2841} __ec_align4;
2842
2843
2844#define EC_CMD_PSTORE_WRITE 0x0042
2845
2846struct ec_params_pstore_write {
2847 uint32_t offset;
2848 uint32_t size;
2849 uint8_t data[EC_PSTORE_SIZE_MAX];
2850} __ec_align4;
2851
2852
2853
2854
2855
2856struct ec_params_rtc {
2857 uint32_t time;
2858} __ec_align4;
2859
2860struct ec_response_rtc {
2861 uint32_t time;
2862} __ec_align4;
2863
2864
2865#define EC_CMD_RTC_GET_VALUE 0x0044
2866#define EC_CMD_RTC_GET_ALARM 0x0045
2867
2868
2869#define EC_CMD_RTC_SET_VALUE 0x0046
2870#define EC_CMD_RTC_SET_ALARM 0x0047
2871
2872
2873#define EC_RTC_ALARM_CLEAR 0
2874
2875
2876
2877
2878
2879#define EC_PORT80_SIZE_MAX 32
2880
2881
2882#define EC_CMD_PORT80_LAST_BOOT 0x0048
2883#define EC_CMD_PORT80_READ 0x0048
2884
2885enum ec_port80_subcmd {
2886 EC_PORT80_GET_INFO = 0,
2887 EC_PORT80_READ_BUFFER,
2888};
2889
2890struct ec_params_port80_read {
2891 uint16_t subcmd;
2892 union {
2893 struct __ec_todo_unpacked {
2894 uint32_t offset;
2895 uint32_t num_entries;
2896 } read_buffer;
2897 };
2898} __ec_todo_packed;
2899
2900struct ec_response_port80_read {
2901 union {
2902 struct __ec_todo_unpacked {
2903 uint32_t writes;
2904 uint32_t history_size;
2905 uint32_t last_boot;
2906 } get_info;
2907 struct __ec_todo_unpacked {
2908 uint16_t codes[EC_PORT80_SIZE_MAX];
2909 } data;
2910 };
2911} __ec_todo_packed;
2912
2913struct ec_response_port80_last_boot {
2914 uint16_t code;
2915} __ec_align2;
2916
2917
2918
2919
2920
2921#define EC_VSTORE_SLOT_SIZE 64
2922
2923
2924#define EC_VSTORE_SLOT_MAX 32
2925
2926
2927#define EC_CMD_VSTORE_INFO 0x0049
2928struct ec_response_vstore_info {
2929
2930 uint32_t slot_locked;
2931
2932 uint8_t slot_count;
2933} __ec_align_size1;
2934
2935
2936
2937
2938
2939
2940#define EC_CMD_VSTORE_READ 0x004A
2941
2942struct ec_params_vstore_read {
2943 uint8_t slot;
2944} __ec_align1;
2945
2946struct ec_response_vstore_read {
2947 uint8_t data[EC_VSTORE_SLOT_SIZE];
2948} __ec_align1;
2949
2950
2951
2952
2953#define EC_CMD_VSTORE_WRITE 0x004B
2954
2955struct ec_params_vstore_write {
2956 uint8_t slot;
2957 uint8_t data[EC_VSTORE_SLOT_SIZE];
2958} __ec_align1;
2959
2960
2961
2962
2963
2964
2965
2966
2967#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
2968#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
2969
2970
2971
2972
2973
2974
2975struct ec_params_thermal_set_threshold {
2976 uint8_t sensor_type;
2977 uint8_t threshold_id;
2978 uint16_t value;
2979} __ec_align2;
2980
2981
2982struct ec_params_thermal_get_threshold {
2983 uint8_t sensor_type;
2984 uint8_t threshold_id;
2985} __ec_align1;
2986
2987struct ec_response_thermal_get_threshold {
2988 uint16_t value;
2989} __ec_align2;
2990
2991
2992
2993enum ec_temp_thresholds {
2994 EC_TEMP_THRESH_WARN = 0,
2995 EC_TEMP_THRESH_HIGH,
2996 EC_TEMP_THRESH_HALT,
2997
2998 EC_TEMP_THRESH_COUNT
2999};
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023struct ec_thermal_config {
3024 uint32_t temp_host[EC_TEMP_THRESH_COUNT];
3025 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT];
3026 uint32_t temp_fan_off;
3027 uint32_t temp_fan_max;
3028} __ec_align4;
3029
3030
3031struct ec_params_thermal_get_threshold_v1 {
3032 uint32_t sensor_num;
3033} __ec_align4;
3034
3035
3036
3037
3038
3039
3040struct ec_params_thermal_set_threshold_v1 {
3041 uint32_t sensor_num;
3042 struct ec_thermal_config cfg;
3043} __ec_align4;
3044
3045
3046
3047
3048
3049#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
3050
3051
3052struct ec_params_auto_fan_ctrl_v1 {
3053 uint8_t fan_idx;
3054} __ec_align1;
3055
3056
3057#define EC_CMD_TMP006_GET_CALIBRATION 0x0053
3058#define EC_CMD_TMP006_SET_CALIBRATION 0x0054
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070struct ec_params_tmp006_get_calibration {
3071 uint8_t index;
3072} __ec_align1;
3073
3074
3075struct ec_response_tmp006_get_calibration_v0 {
3076 float s0;
3077 float b0;
3078 float b1;
3079 float b2;
3080} __ec_align4;
3081
3082struct ec_params_tmp006_set_calibration_v0 {
3083 uint8_t index;
3084 uint8_t reserved[3];
3085 float s0;
3086 float b0;
3087 float b1;
3088 float b2;
3089} __ec_align4;
3090
3091
3092struct ec_response_tmp006_get_calibration_v1 {
3093 uint8_t algorithm;
3094 uint8_t num_params;
3095 uint8_t reserved[2];
3096 float val[0];
3097} __ec_align4;
3098
3099struct ec_params_tmp006_set_calibration_v1 {
3100 uint8_t index;
3101 uint8_t algorithm;
3102 uint8_t num_params;
3103 uint8_t reserved;
3104 float val[0];
3105} __ec_align4;
3106
3107
3108
3109#define EC_CMD_TMP006_GET_RAW 0x0055
3110
3111struct ec_params_tmp006_get_raw {
3112 uint8_t index;
3113} __ec_align1;
3114
3115struct ec_response_tmp006_get_raw {
3116 int32_t t;
3117 int32_t v;
3118} __ec_align4;
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133#define EC_CMD_MKBP_STATE 0x0060
3134
3135
3136
3137
3138#define EC_CMD_MKBP_INFO 0x0061
3139
3140struct ec_response_mkbp_info {
3141 uint32_t rows;
3142 uint32_t cols;
3143
3144 uint8_t reserved;
3145} __ec_align_size1;
3146
3147struct ec_params_mkbp_info {
3148 uint8_t info_type;
3149 uint8_t event_type;
3150} __ec_align1;
3151
3152enum ec_mkbp_info_type {
3153
3154
3155
3156
3157
3158 EC_MKBP_INFO_KBD = 0,
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169 EC_MKBP_INFO_SUPPORTED = 1,
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188 EC_MKBP_INFO_CURRENT = 2,
3189};
3190
3191
3192#define EC_CMD_MKBP_SIMULATE_KEY 0x0062
3193
3194struct ec_params_mkbp_simulate_key {
3195 uint8_t col;
3196 uint8_t row;
3197 uint8_t pressed;
3198} __ec_align1;
3199
3200#define EC_CMD_GET_KEYBOARD_ID 0x0063
3201
3202struct ec_response_keyboard_id {
3203 uint32_t keyboard_id;
3204} __ec_align4;
3205
3206enum keyboard_id {
3207 KEYBOARD_ID_UNSUPPORTED = 0,
3208 KEYBOARD_ID_UNREADABLE = 0xffffffff,
3209};
3210
3211
3212#define EC_CMD_MKBP_SET_CONFIG 0x0064
3213#define EC_CMD_MKBP_GET_CONFIG 0x0065
3214
3215
3216enum mkbp_config_flags {
3217 EC_MKBP_FLAGS_ENABLE = 1,
3218};
3219
3220enum mkbp_config_valid {
3221 EC_MKBP_VALID_SCAN_PERIOD = BIT(0),
3222 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1),
3223 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3),
3224 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4),
3225 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5),
3226 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6),
3227 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7),
3228};
3229
3230
3231
3232
3233
3234
3235
3236struct ec_mkbp_config {
3237 uint32_t valid_mask;
3238 uint8_t flags;
3239 uint8_t valid_flags;
3240 uint16_t scan_period_us;
3241
3242 uint32_t poll_timeout_us;
3243
3244
3245
3246
3247
3248 uint16_t min_post_scan_delay_us;
3249
3250 uint16_t output_settle_us;
3251 uint16_t debounce_down_us;
3252 uint16_t debounce_up_us;
3253
3254 uint8_t fifo_max_depth;
3255} __ec_align_size1;
3256
3257struct ec_params_mkbp_set_config {
3258 struct ec_mkbp_config config;
3259} __ec_align_size1;
3260
3261struct ec_response_mkbp_get_config {
3262 struct ec_mkbp_config config;
3263} __ec_align_size1;
3264
3265
3266#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
3267
3268enum ec_keyscan_seq_cmd {
3269 EC_KEYSCAN_SEQ_STATUS = 0,
3270 EC_KEYSCAN_SEQ_CLEAR = 1,
3271 EC_KEYSCAN_SEQ_ADD = 2,
3272 EC_KEYSCAN_SEQ_START = 3,
3273 EC_KEYSCAN_SEQ_COLLECT = 4,
3274};
3275
3276enum ec_collect_flags {
3277
3278
3279
3280
3281 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0),
3282};
3283
3284struct ec_collect_item {
3285 uint8_t flags;
3286} __ec_align1;
3287
3288struct ec_params_keyscan_seq_ctrl {
3289 uint8_t cmd;
3290 union {
3291 struct __ec_align1 {
3292 uint8_t active;
3293 uint8_t num_items;
3294
3295 uint8_t cur_item;
3296 } status;
3297 struct __ec_todo_unpacked {
3298
3299
3300
3301
3302 uint32_t time_us;
3303 uint8_t scan[0];
3304 } add;
3305 struct __ec_align1 {
3306 uint8_t start_item;
3307 uint8_t num_items;
3308 } collect;
3309 };
3310} __ec_todo_packed;
3311
3312struct ec_result_keyscan_seq_ctrl {
3313 union {
3314 struct __ec_todo_unpacked {
3315 uint8_t num_items;
3316
3317 struct ec_collect_item item[0];
3318 } collect;
3319 };
3320} __ec_todo_packed;
3321
3322
3323
3324
3325
3326
3327#define EC_CMD_GET_NEXT_EVENT 0x0067
3328
3329#define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7
3330
3331
3332
3333
3334
3335#define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT)
3336
3337
3338#define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1)
3339
3340enum ec_mkbp_event {
3341
3342 EC_MKBP_EVENT_KEY_MATRIX = 0,
3343
3344
3345 EC_MKBP_EVENT_HOST_EVENT = 1,
3346
3347
3348 EC_MKBP_EVENT_SENSOR_FIFO = 2,
3349
3350
3351 EC_MKBP_EVENT_BUTTON = 3,
3352
3353
3354 EC_MKBP_EVENT_SWITCH = 4,
3355
3356
3357 EC_MKBP_EVENT_FINGERPRINT = 5,
3358
3359
3360
3361
3362
3363 EC_MKBP_EVENT_SYSRQ = 6,
3364
3365
3366
3367
3368
3369 EC_MKBP_EVENT_HOST_EVENT64 = 7,
3370
3371
3372 EC_MKBP_EVENT_CEC_EVENT = 8,
3373
3374
3375 EC_MKBP_EVENT_CEC_MESSAGE = 9,
3376
3377
3378 EC_MKBP_EVENT_COUNT,
3379};
3380BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK);
3381
3382union __ec_align_offset1 ec_response_get_next_data {
3383 uint8_t key_matrix[13];
3384
3385
3386 uint32_t host_event;
3387 uint64_t host_event64;
3388
3389 struct __ec_todo_unpacked {
3390
3391 uint8_t reserved[3];
3392 struct ec_response_motion_sense_fifo_info info;
3393 } sensor_fifo;
3394
3395 uint32_t buttons;
3396
3397 uint32_t switches;
3398
3399 uint32_t fp_events;
3400
3401 uint32_t sysrq;
3402
3403
3404 uint32_t cec_events;
3405};
3406
3407union __ec_align_offset1 ec_response_get_next_data_v1 {
3408 uint8_t key_matrix[16];
3409
3410
3411 uint32_t host_event;
3412 uint64_t host_event64;
3413
3414 struct __ec_todo_unpacked {
3415
3416 uint8_t reserved[3];
3417 struct ec_response_motion_sense_fifo_info info;
3418 } sensor_fifo;
3419
3420 uint32_t buttons;
3421
3422 uint32_t switches;
3423
3424 uint32_t fp_events;
3425
3426 uint32_t sysrq;
3427
3428
3429 uint32_t cec_events;
3430
3431 uint8_t cec_message[16];
3432};
3433BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16);
3434
3435struct ec_response_get_next_event {
3436 uint8_t event_type;
3437
3438 union ec_response_get_next_data data;
3439} __ec_align1;
3440
3441struct ec_response_get_next_event_v1 {
3442 uint8_t event_type;
3443
3444 union ec_response_get_next_data_v1 data;
3445} __ec_align1;
3446
3447
3448
3449#define EC_MKBP_POWER_BUTTON 0
3450#define EC_MKBP_VOL_UP 1
3451#define EC_MKBP_VOL_DOWN 2
3452#define EC_MKBP_RECOVERY 3
3453
3454
3455#define EC_MKBP_LID_OPEN 0
3456#define EC_MKBP_TABLET_MODE 1
3457#define EC_MKBP_BASE_ATTACHED 2
3458
3459
3460#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
3461
3462struct ec_response_keyboard_factory_test {
3463 uint16_t shorted;
3464} __ec_align2;
3465
3466
3467#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
3468#define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F)
3469#define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4
3470#define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \
3471 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET)
3472#define EC_MKBP_FP_MATCH_IDX_OFFSET 12
3473#define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000
3474#define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \
3475 >> EC_MKBP_FP_MATCH_IDX_OFFSET)
3476#define EC_MKBP_FP_ENROLL BIT(27)
3477#define EC_MKBP_FP_MATCH BIT(28)
3478#define EC_MKBP_FP_FINGER_DOWN BIT(29)
3479#define EC_MKBP_FP_FINGER_UP BIT(30)
3480#define EC_MKBP_FP_IMAGE_READY BIT(31)
3481
3482#define EC_MKBP_FP_ERR_ENROLL_OK 0
3483#define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1
3484#define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2
3485#define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3
3486#define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5
3487
3488#define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1
3489
3490#define EC_MKBP_FP_ERR_MATCH_NO 0
3491#define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6
3492#define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7
3493#define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2
3494#define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4
3495#define EC_MKBP_FP_ERR_MATCH_YES 1
3496#define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3
3497#define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5
3498
3499
3500
3501
3502
3503
3504#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3505
3506struct ec_params_temp_sensor_get_info {
3507 uint8_t id;
3508} __ec_align1;
3509
3510struct ec_response_temp_sensor_get_info {
3511 char sensor_name[32];
3512 uint8_t sensor_type;
3513} __ec_align1;
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532struct ec_params_host_event_mask {
3533 uint32_t mask;
3534} __ec_align4;
3535
3536struct ec_response_host_event_mask {
3537 uint32_t mask;
3538} __ec_align4;
3539
3540
3541#define EC_CMD_HOST_EVENT_GET_B 0x0087
3542#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088
3543#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089
3544#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3545
3546
3547#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A
3548#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B
3549#define EC_CMD_HOST_EVENT_CLEAR 0x008C
3550#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3551#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
3552
3553
3554
3555
3556
3557
3558struct ec_params_host_event {
3559
3560
3561 uint8_t action;
3562
3563
3564
3565
3566
3567 uint8_t mask_type;
3568
3569
3570 uint16_t reserved;
3571
3572
3573 uint64_t value;
3574} __ec_align4;
3575
3576
3577
3578
3579
3580
3581struct ec_response_host_event {
3582
3583
3584 uint64_t value;
3585} __ec_align4;
3586
3587enum ec_host_event_action {
3588
3589
3590
3591
3592 EC_HOST_EVENT_GET,
3593
3594
3595 EC_HOST_EVENT_SET,
3596
3597
3598 EC_HOST_EVENT_CLEAR,
3599};
3600
3601enum ec_host_event_mask_type {
3602
3603
3604 EC_HOST_EVENT_MAIN,
3605
3606
3607 EC_HOST_EVENT_B,
3608
3609
3610 EC_HOST_EVENT_SCI_MASK,
3611
3612
3613 EC_HOST_EVENT_SMI_MASK,
3614
3615
3616 EC_HOST_EVENT_ALWAYS_REPORT_MASK,
3617
3618
3619 EC_HOST_EVENT_ACTIVE_WAKE_MASK,
3620
3621
3622 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX,
3623
3624
3625 EC_HOST_EVENT_LAZY_WAKE_MASK_S3,
3626
3627
3628 EC_HOST_EVENT_LAZY_WAKE_MASK_S5,
3629};
3630
3631#define EC_CMD_HOST_EVENT 0x00A4
3632
3633
3634
3635
3636
3637#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3638
3639struct ec_params_switch_enable_backlight {
3640 uint8_t enabled;
3641} __ec_align1;
3642
3643
3644#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3645#define EC_VER_SWITCH_ENABLE_WIRELESS 1
3646
3647
3648struct ec_params_switch_enable_wireless_v0 {
3649 uint8_t enabled;
3650} __ec_align1;
3651
3652
3653struct ec_params_switch_enable_wireless_v1 {
3654
3655 uint8_t now_flags;
3656
3657
3658 uint8_t now_mask;
3659
3660
3661
3662
3663
3664
3665 uint8_t suspend_flags;
3666
3667
3668 uint8_t suspend_mask;
3669} __ec_align1;
3670
3671
3672struct ec_response_switch_enable_wireless_v1 {
3673
3674 uint8_t now_flags;
3675
3676
3677 uint8_t suspend_flags;
3678} __ec_align1;
3679
3680
3681
3682
3683
3684#define EC_CMD_GPIO_SET 0x0092
3685
3686struct ec_params_gpio_set {
3687 char name[32];
3688 uint8_t val;
3689} __ec_align1;
3690
3691
3692#define EC_CMD_GPIO_GET 0x0093
3693
3694
3695struct ec_params_gpio_get {
3696 char name[32];
3697} __ec_align1;
3698
3699struct ec_response_gpio_get {
3700 uint8_t val;
3701} __ec_align1;
3702
3703
3704struct ec_params_gpio_get_v1 {
3705 uint8_t subcmd;
3706 union {
3707 struct __ec_align1 {
3708 char name[32];
3709 } get_value_by_name;
3710 struct __ec_align1 {
3711 uint8_t index;
3712 } get_info;
3713 };
3714} __ec_align1;
3715
3716struct ec_response_gpio_get_v1 {
3717 union {
3718 struct __ec_align1 {
3719 uint8_t val;
3720 } get_value_by_name, get_count;
3721 struct __ec_todo_unpacked {
3722 uint8_t val;
3723 char name[32];
3724 uint32_t flags;
3725 } get_info;
3726 };
3727} __ec_todo_packed;
3728
3729enum gpio_get_subcmd {
3730 EC_GPIO_GET_BY_NAME = 0,
3731 EC_GPIO_GET_COUNT = 1,
3732 EC_GPIO_GET_INFO = 2,
3733};
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746#define EC_CMD_I2C_READ 0x0094
3747
3748struct ec_params_i2c_read {
3749 uint16_t addr;
3750 uint8_t read_size;
3751 uint8_t port;
3752 uint8_t offset;
3753} __ec_align_size1;
3754
3755struct ec_response_i2c_read {
3756 uint16_t data;
3757} __ec_align2;
3758
3759
3760#define EC_CMD_I2C_WRITE 0x0095
3761
3762struct ec_params_i2c_write {
3763 uint16_t data;
3764 uint16_t addr;
3765 uint8_t write_size;
3766 uint8_t port;
3767 uint8_t offset;
3768} __ec_align_size1;
3769
3770
3771
3772
3773
3774
3775
3776#define EC_CMD_CHARGE_CONTROL 0x0096
3777#define EC_VER_CHARGE_CONTROL 1
3778
3779enum ec_charge_control_mode {
3780 CHARGE_CONTROL_NORMAL = 0,
3781 CHARGE_CONTROL_IDLE,
3782 CHARGE_CONTROL_DISCHARGE,
3783};
3784
3785struct ec_params_charge_control {
3786 uint32_t mode;
3787} __ec_align4;
3788
3789
3790
3791
3792#define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806#define EC_CMD_CONSOLE_READ 0x0098
3807
3808enum ec_console_read_subcmd {
3809 CONSOLE_READ_NEXT = 0,
3810 CONSOLE_READ_RECENT
3811};
3812
3813struct ec_params_console_read_v1 {
3814 uint8_t subcmd;
3815} __ec_align1;
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826#define EC_CMD_BATTERY_CUT_OFF 0x0099
3827
3828#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0)
3829
3830struct ec_params_battery_cutoff {
3831 uint8_t flags;
3832} __ec_align1;
3833
3834
3835
3836
3837
3838
3839
3840#define EC_CMD_USB_MUX 0x009A
3841
3842struct ec_params_usb_mux {
3843 uint8_t mux;
3844} __ec_align1;
3845
3846
3847
3848
3849enum ec_ldo_state {
3850 EC_LDO_STATE_OFF = 0,
3851 EC_LDO_STATE_ON = 1,
3852};
3853
3854
3855
3856
3857#define EC_CMD_LDO_SET 0x009B
3858
3859struct ec_params_ldo_set {
3860 uint8_t index;
3861 uint8_t state;
3862} __ec_align1;
3863
3864
3865
3866
3867#define EC_CMD_LDO_GET 0x009C
3868
3869struct ec_params_ldo_get {
3870 uint8_t index;
3871} __ec_align1;
3872
3873struct ec_response_ldo_get {
3874 uint8_t state;
3875} __ec_align1;
3876
3877
3878
3879
3880
3881
3882
3883#define EC_CMD_POWER_INFO 0x009D
3884
3885struct ec_response_power_info {
3886 uint32_t usb_dev_type;
3887 uint16_t voltage_ac;
3888 uint16_t voltage_system;
3889 uint16_t current_system;
3890 uint16_t usb_current_limit;
3891} __ec_align4;
3892
3893
3894
3895
3896#define EC_CMD_I2C_PASSTHRU 0x009E
3897
3898
3899#define EC_I2C_FLAG_READ BIT(15)
3900
3901
3902#define EC_I2C_ADDR_MASK 0x3ff
3903
3904#define EC_I2C_STATUS_NAK BIT(0)
3905#define EC_I2C_STATUS_TIMEOUT BIT(1)
3906
3907
3908#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
3909
3910struct ec_params_i2c_passthru_msg {
3911 uint16_t addr_flags;
3912 uint16_t len;
3913} __ec_align2;
3914
3915struct ec_params_i2c_passthru {
3916 uint8_t port;
3917 uint8_t num_msgs;
3918 struct ec_params_i2c_passthru_msg msg[];
3919
3920} __ec_align2;
3921
3922struct ec_response_i2c_passthru {
3923 uint8_t i2c_status;
3924 uint8_t num_msgs;
3925 uint8_t data[];
3926} __ec_align1;
3927
3928
3929
3930
3931#define EC_CMD_HANG_DETECT 0x009F
3932
3933
3934
3935#define EC_HANG_START_ON_POWER_PRESS BIT(0)
3936
3937
3938#define EC_HANG_START_ON_LID_CLOSE BIT(1)
3939
3940
3941#define EC_HANG_START_ON_LID_OPEN BIT(2)
3942
3943
3944#define EC_HANG_START_ON_RESUME BIT(3)
3945
3946
3947
3948
3949#define EC_HANG_STOP_ON_POWER_RELEASE BIT(8)
3950
3951
3952#define EC_HANG_STOP_ON_HOST_COMMAND BIT(9)
3953
3954
3955#define EC_HANG_STOP_ON_SUSPEND BIT(10)
3956
3957
3958
3959
3960
3961
3962
3963#define EC_HANG_START_NOW BIT(30)
3964
3965
3966
3967
3968
3969
3970#define EC_HANG_STOP_NOW BIT(31)
3971
3972struct ec_params_hang_detect {
3973
3974 uint32_t flags;
3975
3976
3977 uint16_t host_event_timeout_msec;
3978
3979
3980 uint16_t warm_reboot_timeout_msec;
3981} __ec_align4;
3982
3983
3984
3985
3986
3987
3988
3989
3990#define EC_CMD_CHARGE_STATE 0x00A0
3991
3992
3993enum charge_state_command {
3994 CHARGE_STATE_CMD_GET_STATE,
3995 CHARGE_STATE_CMD_GET_PARAM,
3996 CHARGE_STATE_CMD_SET_PARAM,
3997 CHARGE_STATE_NUM_CMDS
3998};
3999
4000
4001
4002
4003
4004enum charge_state_params {
4005 CS_PARAM_CHG_VOLTAGE,
4006 CS_PARAM_CHG_CURRENT,
4007 CS_PARAM_CHG_INPUT_CURRENT,
4008 CS_PARAM_CHG_STATUS,
4009 CS_PARAM_CHG_OPTION,
4010 CS_PARAM_LIMIT_POWER,
4011
4012
4013
4014
4015
4016 CS_NUM_BASE_PARAMS,
4017
4018
4019 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
4020 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
4021
4022
4023 CS_PARAM_DEBUG_MIN = 0x20000,
4024 CS_PARAM_DEBUG_CTL_MODE = 0x20000,
4025 CS_PARAM_DEBUG_MANUAL_MODE,
4026 CS_PARAM_DEBUG_SEEMS_DEAD,
4027 CS_PARAM_DEBUG_SEEMS_DISCONNECTED,
4028 CS_PARAM_DEBUG_BATT_REMOVED,
4029 CS_PARAM_DEBUG_MANUAL_CURRENT,
4030 CS_PARAM_DEBUG_MANUAL_VOLTAGE,
4031 CS_PARAM_DEBUG_MAX = 0x2ffff,
4032
4033
4034};
4035
4036struct ec_params_charge_state {
4037 uint8_t cmd;
4038 union {
4039
4040
4041 struct __ec_todo_unpacked {
4042 uint32_t param;
4043 } get_param;
4044
4045 struct __ec_todo_unpacked {
4046 uint32_t param;
4047 uint32_t value;
4048 } set_param;
4049 };
4050} __ec_todo_packed;
4051
4052struct ec_response_charge_state {
4053 union {
4054 struct __ec_align4 {
4055 int ac;
4056 int chg_voltage;
4057 int chg_current;
4058 int chg_input_current;
4059 int batt_state_of_charge;
4060 } get_state;
4061
4062 struct __ec_align4 {
4063 uint32_t value;
4064 } get_param;
4065
4066
4067 };
4068} __ec_align4;
4069
4070
4071
4072
4073
4074#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
4075
4076struct ec_params_current_limit {
4077 uint32_t limit;
4078} __ec_align4;
4079
4080
4081
4082
4083#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
4084
4085
4086struct ec_params_external_power_limit_v1 {
4087 uint16_t current_lim;
4088 uint16_t voltage_lim;
4089} __ec_align2;
4090
4091#define EC_POWER_LIMIT_NONE 0xffff
4092
4093
4094
4095
4096#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
4097
4098struct ec_params_dedicated_charger_limit {
4099 uint16_t current_lim;
4100 uint16_t voltage_lim;
4101} __ec_align2;
4102
4103
4104
4105
4106
4107#define EC_CMD_HIBERNATION_DELAY 0x00A8
4108
4109struct ec_params_hibernation_delay {
4110
4111
4112
4113
4114 uint32_t seconds;
4115} __ec_align4;
4116
4117struct ec_response_hibernation_delay {
4118
4119
4120
4121
4122 uint32_t time_g3;
4123
4124
4125
4126
4127
4128 uint32_t time_remaining;
4129
4130
4131
4132
4133
4134 uint32_t hibernate_delay;
4135} __ec_align4;
4136
4137
4138#define EC_CMD_HOST_SLEEP_EVENT 0x00A9
4139
4140enum host_sleep_event {
4141 HOST_SLEEP_EVENT_S3_SUSPEND = 1,
4142 HOST_SLEEP_EVENT_S3_RESUME = 2,
4143 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3,
4144 HOST_SLEEP_EVENT_S0IX_RESUME = 4,
4145
4146 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5,
4147};
4148
4149struct ec_params_host_sleep_event {
4150 uint8_t sleep_event;
4151} __ec_align1;
4152
4153
4154
4155
4156
4157#define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0
4158
4159
4160#define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF
4161
4162struct ec_params_host_sleep_event_v1 {
4163
4164 uint8_t sleep_event;
4165
4166
4167 uint8_t reserved;
4168 union {
4169
4170 struct {
4171
4172
4173
4174
4175
4176
4177 uint16_t sleep_timeout_ms;
4178 } suspend_params;
4179
4180
4181 };
4182} __ec_align2;
4183
4184
4185#define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000
4186
4187
4188
4189
4190
4191
4192#define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF
4193
4194struct ec_response_host_sleep_event_v1 {
4195 union {
4196
4197 struct {
4198
4199
4200
4201
4202
4203 uint32_t sleep_transitions;
4204 } resume_response;
4205
4206
4207 };
4208} __ec_align4;
4209
4210
4211
4212#define EC_CMD_DEVICE_EVENT 0x00AA
4213
4214enum ec_device_event {
4215 EC_DEVICE_EVENT_TRACKPAD,
4216 EC_DEVICE_EVENT_DSP,
4217 EC_DEVICE_EVENT_WIFI,
4218};
4219
4220enum ec_device_event_param {
4221
4222 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS,
4223
4224 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS,
4225
4226 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,
4227};
4228
4229#define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32)
4230
4231struct ec_params_device_event {
4232 uint32_t event_mask;
4233 uint8_t param;
4234} __ec_align_size1;
4235
4236struct ec_response_device_event {
4237 uint32_t event_mask;
4238} __ec_align4;
4239
4240
4241
4242
4243
4244#define EC_CMD_SB_READ_WORD 0x00B0
4245#define EC_CMD_SB_WRITE_WORD 0x00B1
4246
4247
4248
4249
4250#define EC_CMD_SB_READ_BLOCK 0x00B2
4251#define EC_CMD_SB_WRITE_BLOCK 0x00B3
4252
4253struct ec_params_sb_rd {
4254 uint8_t reg;
4255} __ec_align1;
4256
4257struct ec_response_sb_rd_word {
4258 uint16_t value;
4259} __ec_align2;
4260
4261struct ec_params_sb_wr_word {
4262 uint8_t reg;
4263 uint16_t value;
4264} __ec_align1;
4265
4266struct ec_response_sb_rd_block {
4267 uint8_t data[32];
4268} __ec_align1;
4269
4270struct ec_params_sb_wr_block {
4271 uint8_t reg;
4272 uint16_t data[32];
4273} __ec_align1;
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283
4284#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
4285
4286enum ec_battery_vendor_param_mode {
4287 BATTERY_VENDOR_PARAM_MODE_GET = 0,
4288 BATTERY_VENDOR_PARAM_MODE_SET,
4289};
4290
4291struct ec_params_battery_vendor_param {
4292 uint32_t param;
4293 uint32_t value;
4294 uint8_t mode;
4295} __ec_align_size1;
4296
4297struct ec_response_battery_vendor_param {
4298 uint32_t value;
4299} __ec_align4;
4300
4301
4302
4303
4304
4305#define EC_CMD_SB_FW_UPDATE 0x00B5
4306
4307enum ec_sb_fw_update_subcmd {
4308 EC_SB_FW_UPDATE_PREPARE = 0x0,
4309 EC_SB_FW_UPDATE_INFO = 0x1,
4310 EC_SB_FW_UPDATE_BEGIN = 0x2,
4311 EC_SB_FW_UPDATE_WRITE = 0x3,
4312 EC_SB_FW_UPDATE_END = 0x4,
4313 EC_SB_FW_UPDATE_STATUS = 0x5,
4314 EC_SB_FW_UPDATE_PROTECT = 0x6,
4315 EC_SB_FW_UPDATE_MAX = 0x7,
4316};
4317
4318#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
4319#define SB_FW_UPDATE_CMD_STATUS_SIZE 2
4320#define SB_FW_UPDATE_CMD_INFO_SIZE 8
4321
4322struct ec_sb_fw_update_header {
4323 uint16_t subcmd;
4324 uint16_t fw_id;
4325} __ec_align4;
4326
4327struct ec_params_sb_fw_update {
4328 struct ec_sb_fw_update_header hdr;
4329 union {
4330
4331
4332
4333
4334
4335
4336
4337
4338
4339 struct __ec_align4 {
4340 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
4341 } write;
4342 };
4343} __ec_align4;
4344
4345struct ec_response_sb_fw_update {
4346 union {
4347
4348 struct __ec_align1 {
4349 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
4350 } info;
4351
4352
4353 struct __ec_align1 {
4354 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
4355 } status;
4356 };
4357} __ec_align1;
4358
4359
4360
4361
4362
4363
4364#define EC_CMD_ENTERING_MODE 0x00B6
4365
4366struct ec_params_entering_mode {
4367 int vboot_mode;
4368} __ec_align4;
4369
4370#define VBOOT_MODE_NORMAL 0
4371#define VBOOT_MODE_DEVELOPER 1
4372#define VBOOT_MODE_RECOVERY 2
4373
4374
4375
4376
4377
4378
4379#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
4380
4381enum ec_i2c_passthru_protect_subcmd {
4382 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
4383 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
4384};
4385
4386struct ec_params_i2c_passthru_protect {
4387 uint8_t subcmd;
4388 uint8_t port;
4389} __ec_align1;
4390
4391struct ec_response_i2c_passthru_protect {
4392 uint8_t status;
4393} __ec_align1;
4394
4395
4396
4397
4398
4399
4400
4401
4402
4403#define MAX_CEC_MSG_LEN 16
4404
4405
4406#define EC_CMD_CEC_WRITE_MSG 0x00B8
4407
4408
4409
4410
4411
4412struct ec_params_cec_write {
4413 uint8_t msg[MAX_CEC_MSG_LEN];
4414} __ec_align1;
4415
4416
4417#define EC_CMD_CEC_SET 0x00BA
4418
4419
4420
4421
4422
4423
4424
4425
4426
4427struct ec_params_cec_set {
4428 uint8_t cmd;
4429 uint8_t val;
4430} __ec_align1;
4431
4432
4433#define EC_CMD_CEC_GET 0x00BB
4434
4435
4436
4437
4438
4439struct ec_params_cec_get {
4440 uint8_t cmd;
4441} __ec_align1;
4442
4443
4444
4445
4446
4447
4448
4449
4450struct ec_response_cec_get {
4451 uint8_t val;
4452} __ec_align1;
4453
4454
4455enum cec_command {
4456
4457 CEC_CMD_ENABLE,
4458
4459 CEC_CMD_LOGICAL_ADDRESS,
4460};
4461
4462
4463enum mkbp_cec_event {
4464
4465 EC_MKBP_CEC_SEND_OK = BIT(0),
4466
4467 EC_MKBP_CEC_SEND_FAILED = BIT(1),
4468};
4469
4470
4471
4472
4473#define EC_CMD_EC_CODEC 0x00BC
4474
4475enum ec_codec_subcmd {
4476 EC_CODEC_GET_CAPABILITIES = 0x0,
4477 EC_CODEC_GET_SHM_ADDR = 0x1,
4478 EC_CODEC_SET_SHM_ADDR = 0x2,
4479 EC_CODEC_SUBCMD_COUNT,
4480};
4481
4482enum ec_codec_cap {
4483 EC_CODEC_CAP_WOV_AUDIO_SHM = 0,
4484 EC_CODEC_CAP_WOV_LANG_SHM = 1,
4485 EC_CODEC_CAP_LAST = 32,
4486};
4487
4488enum ec_codec_shm_id {
4489 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0,
4490 EC_CODEC_SHM_ID_WOV_LANG = 0x1,
4491 EC_CODEC_SHM_ID_LAST,
4492};
4493
4494enum ec_codec_shm_type {
4495 EC_CODEC_SHM_TYPE_EC_RAM = 0x0,
4496 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,
4497};
4498
4499struct __ec_align1 ec_param_ec_codec_get_shm_addr {
4500 uint8_t shm_id;
4501 uint8_t reserved[3];
4502};
4503
4504struct __ec_align4 ec_param_ec_codec_set_shm_addr {
4505 uint64_t phys_addr;
4506 uint32_t len;
4507 uint8_t shm_id;
4508 uint8_t reserved[3];
4509};
4510
4511struct __ec_align4 ec_param_ec_codec {
4512 uint8_t cmd;
4513 uint8_t reserved[3];
4514
4515 union {
4516 struct ec_param_ec_codec_get_shm_addr
4517 get_shm_addr_param;
4518 struct ec_param_ec_codec_set_shm_addr
4519 set_shm_addr_param;
4520 };
4521};
4522
4523struct __ec_align4 ec_response_ec_codec_get_capabilities {
4524 uint32_t capabilities;
4525};
4526
4527struct __ec_align4 ec_response_ec_codec_get_shm_addr {
4528 uint64_t phys_addr;
4529 uint32_t len;
4530 uint8_t type;
4531 uint8_t reserved[3];
4532};
4533
4534
4535
4536
4537#define EC_CMD_EC_CODEC_DMIC 0x00BD
4538
4539enum ec_codec_dmic_subcmd {
4540 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0,
4541 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1,
4542 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2,
4543 EC_CODEC_DMIC_SUBCMD_COUNT,
4544};
4545
4546enum ec_codec_dmic_channel {
4547 EC_CODEC_DMIC_CHANNEL_0 = 0x0,
4548 EC_CODEC_DMIC_CHANNEL_1 = 0x1,
4549 EC_CODEC_DMIC_CHANNEL_2 = 0x2,
4550 EC_CODEC_DMIC_CHANNEL_3 = 0x3,
4551 EC_CODEC_DMIC_CHANNEL_4 = 0x4,
4552 EC_CODEC_DMIC_CHANNEL_5 = 0x5,
4553 EC_CODEC_DMIC_CHANNEL_6 = 0x6,
4554 EC_CODEC_DMIC_CHANNEL_7 = 0x7,
4555 EC_CODEC_DMIC_CHANNEL_COUNT,
4556};
4557
4558struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx {
4559 uint8_t channel;
4560 uint8_t gain;
4561 uint8_t reserved[2];
4562};
4563
4564struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx {
4565 uint8_t channel;
4566 uint8_t reserved[3];
4567};
4568
4569struct __ec_align4 ec_param_ec_codec_dmic {
4570 uint8_t cmd;
4571 uint8_t reserved[3];
4572
4573 union {
4574 struct ec_param_ec_codec_dmic_set_gain_idx
4575 set_gain_idx_param;
4576 struct ec_param_ec_codec_dmic_get_gain_idx
4577 get_gain_idx_param;
4578 };
4579};
4580
4581struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain {
4582 uint8_t max_gain;
4583};
4584
4585struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx {
4586 uint8_t gain;
4587};
4588
4589
4590
4591
4592
4593#define EC_CMD_EC_CODEC_I2S_RX 0x00BE
4594
4595enum ec_codec_i2s_rx_subcmd {
4596 EC_CODEC_I2S_RX_ENABLE = 0x0,
4597 EC_CODEC_I2S_RX_DISABLE = 0x1,
4598 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,
4599 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3,
4600 EC_CODEC_I2S_RX_SET_BCLK = 0x4,
4601 EC_CODEC_I2S_RX_SUBCMD_COUNT,
4602};
4603
4604enum ec_codec_i2s_rx_sample_depth {
4605 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,
4606 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,
4607 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT,
4608};
4609
4610enum ec_codec_i2s_rx_daifmt {
4611 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,
4612 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,
4613 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,
4614 EC_CODEC_I2S_RX_DAIFMT_COUNT,
4615};
4616
4617struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth {
4618 uint8_t depth;
4619 uint8_t reserved[3];
4620};
4621
4622struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain {
4623 uint8_t left;
4624 uint8_t right;
4625 uint8_t reserved[2];
4626};
4627
4628struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt {
4629 uint8_t daifmt;
4630 uint8_t reserved[3];
4631};
4632
4633struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk {
4634 uint32_t bclk;
4635};
4636
4637struct __ec_align4 ec_param_ec_codec_i2s_rx {
4638 uint8_t cmd;
4639 uint8_t reserved[3];
4640
4641 union {
4642 struct ec_param_ec_codec_i2s_rx_set_sample_depth
4643 set_sample_depth_param;
4644 struct ec_param_ec_codec_i2s_rx_set_daifmt
4645 set_daifmt_param;
4646 struct ec_param_ec_codec_i2s_rx_set_bclk
4647 set_bclk_param;
4648 };
4649};
4650
4651
4652
4653
4654#define EC_CMD_EC_CODEC_WOV 0x00BF
4655
4656enum ec_codec_wov_subcmd {
4657 EC_CODEC_WOV_SET_LANG = 0x0,
4658 EC_CODEC_WOV_SET_LANG_SHM = 0x1,
4659 EC_CODEC_WOV_GET_LANG = 0x2,
4660 EC_CODEC_WOV_ENABLE = 0x3,
4661 EC_CODEC_WOV_DISABLE = 0x4,
4662 EC_CODEC_WOV_READ_AUDIO = 0x5,
4663 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6,
4664 EC_CODEC_WOV_SUBCMD_COUNT,
4665};
4666
4667
4668
4669
4670
4671
4672
4673
4674struct __ec_align4 ec_param_ec_codec_wov_set_lang {
4675 uint8_t hash[32];
4676 uint32_t total_len;
4677 uint32_t offset;
4678 uint8_t buf[128];
4679 uint32_t len;
4680};
4681
4682struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm {
4683 uint8_t hash[32];
4684 uint32_t total_len;
4685};
4686
4687struct __ec_align4 ec_param_ec_codec_wov {
4688 uint8_t cmd;
4689 uint8_t reserved[3];
4690
4691 union {
4692 struct ec_param_ec_codec_wov_set_lang
4693 set_lang_param;
4694 struct ec_param_ec_codec_wov_set_lang_shm
4695 set_lang_shm_param;
4696 };
4697};
4698
4699struct __ec_align4 ec_response_ec_codec_wov_get_lang {
4700 uint8_t hash[32];
4701};
4702
4703struct __ec_align4 ec_response_ec_codec_wov_read_audio {
4704 uint8_t buf[128];
4705 uint32_t len;
4706};
4707
4708struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm {
4709 uint32_t offset;
4710 uint32_t len;
4711};
4712
4713
4714
4715
4716
4717
4718
4719
4720#define EC_CMD_REBOOT_EC 0x00D2
4721
4722
4723enum ec_reboot_cmd {
4724 EC_REBOOT_CANCEL = 0,
4725 EC_REBOOT_JUMP_RO = 1,
4726 EC_REBOOT_JUMP_RW = 2,
4727
4728 EC_REBOOT_COLD = 4,
4729 EC_REBOOT_DISABLE_JUMP = 5,
4730 EC_REBOOT_HIBERNATE = 6,
4731 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7,
4732};
4733
4734
4735#define EC_REBOOT_FLAG_RESERVED0 BIT(0)
4736#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1)
4737#define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2)
4738
4739struct ec_params_reboot_ec {
4740 uint8_t cmd;
4741 uint8_t flags;
4742} __ec_align1;
4743
4744
4745
4746
4747
4748
4749
4750#define EC_CMD_GET_PANIC_INFO 0x00D3
4751
4752
4753
4754
4755
4756
4757
4758
4759
4760
4761
4762
4763
4764
4765
4766
4767
4768
4769#define EC_CMD_REBOOT 0x00D1
4770
4771
4772
4773
4774
4775
4776
4777
4778#define EC_CMD_RESEND_RESPONSE 0x00DB
4779
4780
4781
4782
4783
4784
4785
4786
4787
4788
4789
4790#define EC_CMD_VERSION0 0x00DC
4791
4792
4793
4794
4795
4796
4797
4798
4799
4800#define EC_CMD_PD_EXCHANGE_STATUS 0x0100
4801#define EC_VER_PD_EXCHANGE_STATUS 2
4802
4803enum pd_charge_state {
4804 PD_CHARGE_NO_CHANGE = 0,
4805 PD_CHARGE_NONE,
4806 PD_CHARGE_5V,
4807 PD_CHARGE_MAX
4808};
4809
4810
4811#define EC_STATUS_HIBERNATING BIT(0)
4812
4813struct ec_params_pd_status {
4814 uint8_t status;
4815 int8_t batt_soc;
4816 uint8_t charge_state;
4817} __ec_align1;
4818
4819
4820#define PD_STATUS_HOST_EVENT BIT(0)
4821#define PD_STATUS_IN_RW BIT(1)
4822#define PD_STATUS_JUMPED_TO_IMAGE BIT(2)
4823#define PD_STATUS_TCPC_ALERT_0 BIT(3)
4824#define PD_STATUS_TCPC_ALERT_1 BIT(4)
4825#define PD_STATUS_TCPC_ALERT_2 BIT(5)
4826#define PD_STATUS_TCPC_ALERT_3 BIT(6)
4827#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \
4828 PD_STATUS_TCPC_ALERT_1 | \
4829 PD_STATUS_HOST_EVENT)
4830struct ec_response_pd_status {
4831 uint32_t curr_lim_ma;
4832 uint16_t status;
4833 int8_t active_charge_port;
4834} __ec_align_size1;
4835
4836
4837#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
4838
4839
4840#define PD_EVENT_UPDATE_DEVICE BIT(0)
4841#define PD_EVENT_POWER_CHANGE BIT(1)
4842#define PD_EVENT_IDENTITY_RECEIVED BIT(2)
4843#define PD_EVENT_DATA_SWAP BIT(3)
4844struct ec_response_host_event_status {
4845 uint32_t status;
4846} __ec_align4;
4847
4848
4849#define EC_CMD_USB_PD_CONTROL 0x0101
4850
4851enum usb_pd_control_role {
4852 USB_PD_CTRL_ROLE_NO_CHANGE = 0,
4853 USB_PD_CTRL_ROLE_TOGGLE_ON = 1,
4854 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
4855 USB_PD_CTRL_ROLE_FORCE_SINK = 3,
4856 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
4857 USB_PD_CTRL_ROLE_FREEZE = 5,
4858 USB_PD_CTRL_ROLE_COUNT
4859};
4860
4861enum usb_pd_control_mux {
4862 USB_PD_CTRL_MUX_NO_CHANGE = 0,
4863 USB_PD_CTRL_MUX_NONE = 1,
4864 USB_PD_CTRL_MUX_USB = 2,
4865 USB_PD_CTRL_MUX_DP = 3,
4866 USB_PD_CTRL_MUX_DOCK = 4,
4867 USB_PD_CTRL_MUX_AUTO = 5,
4868 USB_PD_CTRL_MUX_COUNT
4869};
4870
4871enum usb_pd_control_swap {
4872 USB_PD_CTRL_SWAP_NONE = 0,
4873 USB_PD_CTRL_SWAP_DATA = 1,
4874 USB_PD_CTRL_SWAP_POWER = 2,
4875 USB_PD_CTRL_SWAP_VCONN = 3,
4876 USB_PD_CTRL_SWAP_COUNT
4877};
4878
4879struct ec_params_usb_pd_control {
4880 uint8_t port;
4881 uint8_t role;
4882 uint8_t mux;
4883 uint8_t swap;
4884} __ec_align1;
4885
4886#define PD_CTRL_RESP_ENABLED_COMMS BIT(0)
4887#define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1)
4888#define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2)
4889
4890#define PD_CTRL_RESP_ROLE_POWER BIT(0)
4891#define PD_CTRL_RESP_ROLE_DATA BIT(1)
4892#define PD_CTRL_RESP_ROLE_VCONN BIT(2)
4893#define PD_CTRL_RESP_ROLE_DR_POWER BIT(3)
4894#define PD_CTRL_RESP_ROLE_DR_DATA BIT(4)
4895#define PD_CTRL_RESP_ROLE_USB_COMM BIT(5)
4896#define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6)
4897
4898struct ec_response_usb_pd_control {
4899 uint8_t enabled;
4900 uint8_t role;
4901 uint8_t polarity;
4902 uint8_t state;
4903} __ec_align1;
4904
4905struct ec_response_usb_pd_control_v1 {
4906 uint8_t enabled;
4907 uint8_t role;
4908 uint8_t polarity;
4909 char state[32];
4910} __ec_align1;
4911
4912
4913#define USBC_PD_CC_NONE 0
4914#define USBC_PD_CC_NO_UFP 1
4915#define USBC_PD_CC_AUDIO_ACC 2
4916#define USBC_PD_CC_DEBUG_ACC 3
4917#define USBC_PD_CC_UFP_ATTACHED 4
4918#define USBC_PD_CC_DFP_ATTACHED 5
4919
4920struct ec_response_usb_pd_control_v2 {
4921 uint8_t enabled;
4922 uint8_t role;
4923 uint8_t polarity;
4924 char state[32];
4925 uint8_t cc_state;
4926 uint8_t dp_mode;
4927
4928 uint8_t reserved_cable_type;
4929} __ec_align1;
4930
4931#define EC_CMD_USB_PD_PORTS 0x0102
4932
4933
4934#define EC_USB_PD_MAX_PORTS 8
4935
4936struct ec_response_usb_pd_ports {
4937 uint8_t num_ports;
4938} __ec_align1;
4939
4940#define EC_CMD_USB_PD_POWER_INFO 0x0103
4941
4942#define PD_POWER_CHARGING_PORT 0xff
4943struct ec_params_usb_pd_power_info {
4944 uint8_t port;
4945} __ec_align1;
4946
4947enum usb_chg_type {
4948 USB_CHG_TYPE_NONE,
4949 USB_CHG_TYPE_PD,
4950 USB_CHG_TYPE_C,
4951 USB_CHG_TYPE_PROPRIETARY,
4952 USB_CHG_TYPE_BC12_DCP,
4953 USB_CHG_TYPE_BC12_CDP,
4954 USB_CHG_TYPE_BC12_SDP,
4955 USB_CHG_TYPE_OTHER,
4956 USB_CHG_TYPE_VBUS,
4957 USB_CHG_TYPE_UNKNOWN,
4958 USB_CHG_TYPE_DEDICATED,
4959};
4960enum usb_power_roles {
4961 USB_PD_PORT_POWER_DISCONNECTED,
4962 USB_PD_PORT_POWER_SOURCE,
4963 USB_PD_PORT_POWER_SINK,
4964 USB_PD_PORT_POWER_SINK_NOT_CHARGING,
4965};
4966
4967struct usb_chg_measures {
4968 uint16_t voltage_max;
4969 uint16_t voltage_now;
4970 uint16_t current_max;
4971 uint16_t current_lim;
4972} __ec_align2;
4973
4974struct ec_response_usb_pd_power_info {
4975 uint8_t role;
4976 uint8_t type;
4977 uint8_t dualrole;
4978 uint8_t reserved1;
4979 struct usb_chg_measures meas;
4980 uint32_t max_power;
4981} __ec_align4;
4982
4983
4984
4985
4986
4987
4988
4989#define EC_CMD_CHARGE_PORT_COUNT 0x0105
4990struct ec_response_charge_port_count {
4991 uint8_t port_count;
4992} __ec_align1;
4993
4994
4995#define EC_CMD_USB_PD_FW_UPDATE 0x0110
4996
4997enum usb_pd_fw_update_cmds {
4998 USB_PD_FW_REBOOT,
4999 USB_PD_FW_FLASH_ERASE,
5000 USB_PD_FW_FLASH_WRITE,
5001 USB_PD_FW_ERASE_SIG,
5002};
5003
5004struct ec_params_usb_pd_fw_update {
5005 uint16_t dev_id;
5006 uint8_t cmd;
5007 uint8_t port;
5008 uint32_t size;
5009
5010} __ec_align4;
5011
5012
5013#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
5014
5015#define PD_RW_HASH_SIZE 20
5016struct ec_params_usb_pd_rw_hash_entry {
5017 uint16_t dev_id;
5018 uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
5019 uint8_t reserved;
5020
5021
5022
5023
5024 uint32_t current_image;
5025} __ec_align1;
5026
5027
5028#define EC_CMD_USB_PD_DEV_INFO 0x0112
5029
5030struct ec_params_usb_pd_info_request {
5031 uint8_t port;
5032} __ec_align1;
5033
5034
5035#define EC_CMD_USB_PD_DISCOVERY 0x0113
5036struct ec_params_usb_pd_discovery_entry {
5037 uint16_t vid;
5038 uint16_t pid;
5039 uint8_t ptype;
5040} __ec_align_size1;
5041
5042
5043#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
5044
5045
5046enum usb_pd_override_ports {
5047 OVERRIDE_DONT_CHARGE = -2,
5048 OVERRIDE_OFF = -1,
5049
5050};
5051
5052struct ec_params_charge_port_override {
5053 int16_t override_port;
5054} __ec_align2;
5055
5056
5057
5058
5059
5060
5061#define EC_CMD_PD_GET_LOG_ENTRY 0x0115
5062
5063struct ec_response_pd_log {
5064 uint32_t timestamp;
5065 uint8_t type;
5066 uint8_t size_port;
5067 uint16_t data;
5068 uint8_t payload[0];
5069} __ec_align4;
5070
5071
5072#define PD_LOG_TIMESTAMP_SHIFT 10
5073
5074#define PD_LOG_SIZE_MASK 0x1f
5075#define PD_LOG_PORT_MASK 0xe0
5076#define PD_LOG_PORT_SHIFT 5
5077#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
5078 ((size) & PD_LOG_SIZE_MASK))
5079#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
5080#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
5081
5082
5083
5084#define PD_EVENT_MCU_BASE 0x00
5085#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)
5086#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1)
5087
5088#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2)
5089
5090#define PD_EVENT_ACC_BASE 0x20
5091#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)
5092#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1)
5093
5094#define PD_EVENT_PS_BASE 0x40
5095#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)
5096
5097#define PD_EVENT_VIDEO_BASE 0x60
5098#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
5099#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1)
5100
5101#define PD_EVENT_NO_ENTRY 0xff
5102
5103
5104
5105
5106
5107
5108
5109#define CHARGE_FLAGS_DUAL_ROLE BIT(15)
5110
5111#define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14)
5112
5113#define CHARGE_FLAGS_OVERRIDE BIT(13)
5114
5115#define CHARGE_FLAGS_TYPE_SHIFT 3
5116#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
5117
5118#define CHARGE_FLAGS_ROLE_MASK (7 << 0)
5119
5120
5121
5122
5123#define PS_FAULT_OCP 1
5124#define PS_FAULT_FAST_OCP 2
5125#define PS_FAULT_OVP 3
5126#define PS_FAULT_DISCH 4
5127
5128
5129
5130
5131struct mcdp_version {
5132 uint8_t major;
5133 uint8_t minor;
5134 uint16_t build;
5135} __ec_align4;
5136
5137struct mcdp_info {
5138 uint8_t family[2];
5139 uint8_t chipid[2];
5140 struct mcdp_version irom;
5141 struct mcdp_version fw;
5142} __ec_align4;
5143
5144
5145#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
5146#define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
5147
5148
5149#define EC_CMD_USB_PD_GET_AMODE 0x0116
5150struct ec_params_usb_pd_get_mode_request {
5151 uint16_t svid_idx;
5152 uint8_t port;
5153} __ec_align_size1;
5154
5155struct ec_params_usb_pd_get_mode_response {
5156 uint16_t svid;
5157 uint16_t opos;
5158 uint32_t vdo[6];
5159} __ec_align4;
5160
5161#define EC_CMD_USB_PD_SET_AMODE 0x0117
5162
5163enum pd_mode_cmd {
5164 PD_EXIT_MODE = 0,
5165 PD_ENTER_MODE = 1,
5166
5167 PD_MODE_CMD_COUNT,
5168};
5169
5170struct ec_params_usb_pd_set_mode_request {
5171 uint32_t cmd;
5172 uint16_t svid;
5173 uint8_t opos;
5174 uint8_t port;
5175} __ec_align4;
5176
5177
5178#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
5179
5180struct ec_params_pd_write_log_entry {
5181 uint8_t type;
5182 uint8_t port;
5183} __ec_align1;
5184
5185
5186
5187#define EC_CMD_PD_CONTROL 0x0119
5188
5189enum ec_pd_control_cmd {
5190 PD_SUSPEND = 0,
5191 PD_RESUME,
5192 PD_RESET,
5193 PD_CONTROL_DISABLE,
5194 PD_CHIP_ON,
5195};
5196
5197struct ec_params_pd_control {
5198 uint8_t chip;
5199 uint8_t subcmd;
5200} __ec_align1;
5201
5202
5203#define EC_CMD_USB_PD_MUX_INFO 0x011A
5204
5205struct ec_params_usb_pd_mux_info {
5206 uint8_t port;
5207} __ec_align1;
5208
5209
5210#define USB_PD_MUX_USB_ENABLED BIT(0)
5211#define USB_PD_MUX_DP_ENABLED BIT(1)
5212#define USB_PD_MUX_POLARITY_INVERTED BIT(2)
5213#define USB_PD_MUX_HPD_IRQ BIT(3)
5214#define USB_PD_MUX_HPD_LVL BIT(4)
5215
5216struct ec_response_usb_pd_mux_info {
5217 uint8_t flags;
5218} __ec_align1;
5219
5220#define EC_CMD_PD_CHIP_INFO 0x011B
5221
5222struct ec_params_pd_chip_info {
5223 uint8_t port;
5224 uint8_t renew;
5225} __ec_align1;
5226
5227struct ec_response_pd_chip_info {
5228 uint16_t vendor_id;
5229 uint16_t product_id;
5230 uint16_t device_id;
5231 union {
5232 uint8_t fw_version_string[8];
5233 uint64_t fw_version_number;
5234 };
5235} __ec_align2;
5236
5237struct ec_response_pd_chip_info_v1 {
5238 uint16_t vendor_id;
5239 uint16_t product_id;
5240 uint16_t device_id;
5241 union {
5242 uint8_t fw_version_string[8];
5243 uint64_t fw_version_number;
5244 };
5245 union {
5246 uint8_t min_req_fw_version_string[8];
5247 uint64_t min_req_fw_version_number;
5248 };
5249} __ec_align2;
5250
5251
5252#define EC_CMD_RWSIG_CHECK_STATUS 0x011C
5253
5254struct ec_response_rwsig_check_status {
5255 uint32_t status;
5256} __ec_align4;
5257
5258
5259#define EC_CMD_RWSIG_ACTION 0x011D
5260
5261enum rwsig_action {
5262 RWSIG_ACTION_ABORT = 0,
5263 RWSIG_ACTION_CONTINUE = 1,
5264};
5265
5266struct ec_params_rwsig_action {
5267 uint32_t action;
5268} __ec_align4;
5269
5270
5271#define EC_CMD_EFS_VERIFY 0x011E
5272
5273struct ec_params_efs_verify {
5274 uint8_t region;
5275} __ec_align1;
5276
5277
5278
5279
5280
5281
5282#define EC_CMD_GET_CROS_BOARD_INFO 0x011F
5283
5284
5285
5286
5287#define EC_CMD_SET_CROS_BOARD_INFO 0x0120
5288
5289enum cbi_data_tag {
5290 CBI_TAG_BOARD_VERSION = 0,
5291 CBI_TAG_OEM_ID = 1,
5292 CBI_TAG_SKU_ID = 2,
5293 CBI_TAG_DRAM_PART_NUM = 3,
5294 CBI_TAG_OEM_NAME = 4,
5295 CBI_TAG_MODEL_ID = 5,
5296 CBI_TAG_COUNT,
5297};
5298
5299
5300
5301
5302
5303
5304
5305#define CBI_GET_RELOAD BIT(0)
5306
5307struct ec_params_get_cbi {
5308 uint32_t tag;
5309 uint32_t flag;
5310} __ec_align4;
5311
5312
5313
5314
5315
5316
5317
5318
5319
5320#define CBI_SET_NO_SYNC BIT(0)
5321#define CBI_SET_INIT BIT(1)
5322
5323struct ec_params_set_cbi {
5324 uint32_t tag;
5325 uint32_t flag;
5326 uint32_t size;
5327 uint8_t data[];
5328} __ec_align1;
5329
5330
5331
5332
5333#define EC_CMD_GET_UPTIME_INFO 0x0121
5334
5335struct ec_response_uptime_info {
5336
5337
5338
5339
5340
5341
5342
5343
5344 uint32_t time_since_ec_boot_ms;
5345
5346
5347
5348
5349
5350
5351
5352 uint32_t ap_resets_since_ec_boot;
5353
5354
5355
5356
5357
5358 uint32_t ec_reset_flags;
5359
5360
5361 struct ap_reset_log_entry {
5362
5363
5364
5365
5366 uint16_t reset_cause;
5367
5368
5369 uint16_t reserved;
5370
5371
5372
5373
5374
5375
5376 uint32_t reset_time_ms;
5377 } recent_ap_reset[4];
5378} __ec_align4;
5379
5380
5381
5382
5383
5384
5385
5386#define EC_CMD_ADD_ENTROPY 0x0122
5387
5388enum add_entropy_action {
5389
5390 ADD_ENTROPY_ASYNC = 0,
5391
5392
5393
5394
5395
5396 ADD_ENTROPY_RESET_ASYNC = 1,
5397
5398 ADD_ENTROPY_GET_RESULT = 2,
5399};
5400
5401struct ec_params_rollback_add_entropy {
5402 uint8_t action;
5403} __ec_align1;
5404
5405
5406
5407
5408#define EC_CMD_ADC_READ 0x0123
5409
5410struct ec_params_adc_read {
5411 uint8_t adc_channel;
5412} __ec_align1;
5413
5414struct ec_response_adc_read {
5415 int32_t adc_value;
5416} __ec_align4;
5417
5418
5419
5420
5421#define EC_CMD_ROLLBACK_INFO 0x0124
5422
5423struct ec_response_rollback_info {
5424 int32_t id;
5425 int32_t rollback_min_version;
5426 int32_t rw_rollback_version;
5427} __ec_align4;
5428
5429
5430
5431#define EC_CMD_AP_RESET 0x0125
5432
5433
5434
5435
5436
5437
5438
5439
5440#define EC_CMD_CR51_BASE 0x0300
5441#define EC_CMD_CR51_LAST 0x03FF
5442
5443
5444
5445
5446
5447#define EC_CMD_FP_PASSTHRU 0x0400
5448
5449#define EC_FP_FLAG_NOT_COMPLETE 0x1
5450
5451struct ec_params_fp_passthru {
5452 uint16_t len;
5453 uint16_t flags;
5454 uint8_t data[];
5455} __ec_align2;
5456
5457
5458#define EC_CMD_FP_MODE 0x0402
5459
5460
5461#define FP_MODE_DEEPSLEEP BIT(0)
5462
5463#define FP_MODE_FINGER_DOWN BIT(1)
5464
5465#define FP_MODE_FINGER_UP BIT(2)
5466
5467#define FP_MODE_CAPTURE BIT(3)
5468
5469#define FP_MODE_ENROLL_SESSION BIT(4)
5470
5471#define FP_MODE_ENROLL_IMAGE BIT(5)
5472
5473#define FP_MODE_MATCH BIT(6)
5474
5475#define FP_MODE_RESET_SENSOR BIT(7)
5476
5477#define FP_MODE_DONT_CHANGE BIT(31)
5478
5479#define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \
5480 FP_MODE_FINGER_DOWN | \
5481 FP_MODE_FINGER_UP | \
5482 FP_MODE_CAPTURE | \
5483 FP_MODE_ENROLL_SESSION | \
5484 FP_MODE_ENROLL_IMAGE | \
5485 FP_MODE_MATCH | \
5486 FP_MODE_RESET_SENSOR | \
5487 FP_MODE_DONT_CHANGE)
5488
5489
5490#define FP_MODE_CAPTURE_TYPE_SHIFT 28
5491#define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
5492
5493
5494
5495
5496enum fp_capture_type {
5497
5498 FP_CAPTURE_VENDOR_FORMAT = 0,
5499
5500 FP_CAPTURE_SIMPLE_IMAGE = 1,
5501
5502 FP_CAPTURE_PATTERN0 = 2,
5503
5504 FP_CAPTURE_PATTERN1 = 3,
5505
5506 FP_CAPTURE_QUALITY_TEST = 4,
5507
5508 FP_CAPTURE_RESET_TEST = 5,
5509 FP_CAPTURE_TYPE_MAX,
5510};
5511
5512#define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \
5513 >> FP_MODE_CAPTURE_TYPE_SHIFT)
5514
5515struct ec_params_fp_mode {
5516 uint32_t mode;
5517} __ec_align4;
5518
5519struct ec_response_fp_mode {
5520 uint32_t mode;
5521} __ec_align4;
5522
5523
5524#define EC_CMD_FP_INFO 0x0403
5525
5526
5527#define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF)
5528
5529#define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF)
5530
5531#define FP_ERROR_NO_IRQ BIT(12)
5532
5533#define FP_ERROR_SPI_COMM BIT(13)
5534
5535#define FP_ERROR_BAD_HWID BIT(14)
5536
5537#define FP_ERROR_INIT_FAIL BIT(15)
5538
5539struct ec_response_fp_info_v0 {
5540
5541 uint32_t vendor_id;
5542 uint32_t product_id;
5543 uint32_t model_id;
5544 uint32_t version;
5545
5546 uint32_t frame_size;
5547 uint32_t pixel_format;
5548 uint16_t width;
5549 uint16_t height;
5550 uint16_t bpp;
5551 uint16_t errors;
5552} __ec_align4;
5553
5554struct ec_response_fp_info {
5555
5556 uint32_t vendor_id;
5557 uint32_t product_id;
5558 uint32_t model_id;
5559 uint32_t version;
5560
5561 uint32_t frame_size;
5562 uint32_t pixel_format;
5563 uint16_t width;
5564 uint16_t height;
5565 uint16_t bpp;
5566 uint16_t errors;
5567
5568 uint32_t template_size;
5569 uint16_t template_max;
5570 uint16_t template_valid;
5571 uint32_t template_dirty;
5572 uint32_t template_version;
5573} __ec_align4;
5574
5575
5576#define EC_CMD_FP_FRAME 0x0404
5577
5578
5579#define FP_FRAME_INDEX_SHIFT 28
5580
5581#define FP_FRAME_INDEX_RAW_IMAGE 0
5582
5583#define FP_FRAME_INDEX_TEMPLATE 1
5584#define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT)
5585#define FP_FRAME_OFFSET_MASK 0x0FFFFFFF
5586
5587
5588#define FP_TEMPLATE_FORMAT_VERSION 3
5589
5590
5591#define FP_CONTEXT_NONCE_BYTES 12
5592#define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t))
5593#define FP_CONTEXT_TAG_BYTES 16
5594#define FP_CONTEXT_SALT_BYTES 16
5595#define FP_CONTEXT_TPM_BYTES 32
5596
5597struct ec_fp_template_encryption_metadata {
5598
5599
5600
5601 uint16_t struct_version;
5602
5603 uint16_t reserved;
5604
5605
5606
5607
5608 uint8_t nonce[FP_CONTEXT_NONCE_BYTES];
5609 uint8_t salt[FP_CONTEXT_SALT_BYTES];
5610 uint8_t tag[FP_CONTEXT_TAG_BYTES];
5611};
5612
5613struct ec_params_fp_frame {
5614
5615
5616
5617
5618
5619 uint32_t offset;
5620 uint32_t size;
5621} __ec_align4;
5622
5623
5624#define EC_CMD_FP_TEMPLATE 0x0405
5625
5626
5627#define FP_TEMPLATE_COMMIT 0x80000000
5628
5629struct ec_params_fp_template {
5630 uint32_t offset;
5631 uint32_t size;
5632 uint8_t data[];
5633} __ec_align4;
5634
5635
5636#define EC_CMD_FP_CONTEXT 0x0406
5637
5638struct ec_params_fp_context {
5639 uint32_t userid[FP_CONTEXT_USERID_WORDS];
5640} __ec_align4;
5641
5642#define EC_CMD_FP_STATS 0x0407
5643
5644#define FPSTATS_CAPTURE_INV BIT(0)
5645#define FPSTATS_MATCHING_INV BIT(1)
5646
5647struct ec_response_fp_stats {
5648 uint32_t capture_time_us;
5649 uint32_t matching_time_us;
5650 uint32_t overall_time_us;
5651 struct {
5652 uint32_t lo;
5653 uint32_t hi;
5654 } overall_t0;
5655 uint8_t timestamps_invalid;
5656 int8_t template_matched;
5657} __ec_align2;
5658
5659#define EC_CMD_FP_SEED 0x0408
5660struct ec_params_fp_seed {
5661
5662
5663
5664 uint16_t struct_version;
5665
5666 uint16_t reserved;
5667
5668 uint8_t seed[FP_CONTEXT_TPM_BYTES];
5669} __ec_align4;
5670
5671#define EC_CMD_FP_ENC_STATUS 0x0409
5672
5673
5674#define FP_ENC_STATUS_SEED_SET BIT(0)
5675
5676struct ec_response_fp_encryption_status {
5677
5678 uint32_t valid_flags;
5679
5680 uint32_t status;
5681} __ec_align4;
5682
5683
5684
5685
5686
5687#define EC_CMD_TP_SELF_TEST 0x0500
5688
5689
5690#define EC_CMD_TP_FRAME_INFO 0x0501
5691
5692struct ec_response_tp_frame_info {
5693 uint32_t n_frames;
5694 uint32_t frame_sizes[0];
5695} __ec_align4;
5696
5697
5698#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
5699
5700
5701#define EC_CMD_TP_FRAME_GET 0x0503
5702
5703struct ec_params_tp_frame_get {
5704 uint32_t frame_index;
5705 uint32_t offset;
5706 uint32_t size;
5707} __ec_align4;
5708
5709
5710
5711
5712#define EC_COMM_TEXT_MAX 8
5713
5714
5715
5716
5717
5718#define EC_CMD_BATTERY_GET_STATIC 0x0600
5719
5720
5721
5722
5723
5724struct ec_params_battery_static_info {
5725 uint8_t index;
5726} __ec_align_size1;
5727
5728
5729
5730
5731
5732
5733
5734
5735
5736
5737
5738struct ec_response_battery_static_info {
5739 uint16_t design_capacity;
5740 uint16_t design_voltage;
5741 char manufacturer[EC_COMM_TEXT_MAX];
5742 char model[EC_COMM_TEXT_MAX];
5743 char serial[EC_COMM_TEXT_MAX];
5744 char type[EC_COMM_TEXT_MAX];
5745
5746 uint32_t cycle_count;
5747} __ec_align4;
5748
5749
5750
5751
5752
5753#define EC_CMD_BATTERY_GET_DYNAMIC 0x0601
5754
5755
5756
5757
5758
5759struct ec_params_battery_dynamic_info {
5760 uint8_t index;
5761} __ec_align_size1;
5762
5763
5764
5765
5766
5767
5768
5769
5770
5771
5772
5773struct ec_response_battery_dynamic_info {
5774 int16_t actual_voltage;
5775 int16_t actual_current;
5776 int16_t remaining_capacity;
5777 int16_t full_capacity;
5778 int16_t flags;
5779 int16_t desired_voltage;
5780 int16_t desired_current;
5781} __ec_align2;
5782
5783
5784
5785
5786#define EC_CMD_CHARGER_CONTROL 0x0602
5787
5788
5789
5790
5791
5792
5793
5794
5795
5796
5797
5798struct ec_params_charger_control {
5799 int16_t max_current;
5800 uint16_t otg_voltage;
5801 uint8_t allow_charging;
5802} __ec_align_size1;
5803
5804
5805
5806
5807
5808
5809
5810
5811
5812
5813
5814
5815
5816
5817
5818
5819
5820
5821
5822
5823
5824
5825
5826
5827
5828
5829
5830#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
5831#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
5832
5833
5834
5835
5836
5837#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
5838 (EC_CMD_BOARD_SPECIFIC_BASE + (command))
5839
5840
5841
5842
5843
5844
5845
5846
5847
5848
5849
5850
5851
5852
5853
5854
5855
5856
5857
5858
5859
5860
5861
5862
5863
5864#define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
5865#define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
5866
5867
5868
5869
5870
5871
5872
5873
5874#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
5875#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
5876#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
5877
5878
5879
5880#endif
5881