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7
8
9#include <linux/delay.h>
10#include <linux/init.h>
11#include <linux/interrupt.h>
12#include <linux/pci.h>
13#include <linux/module.h>
14#include <linux/io.h>
15#include <linux/nospec.h>
16
17#include <sound/core.h>
18#include <sound/control.h>
19#include <sound/pcm.h>
20#include <sound/info.h>
21#include <sound/asoundef.h>
22#include <sound/initval.h>
23
24#include <asm/current.h>
25
26static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
27static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
28static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
29static bool precise_ptr[SNDRV_CARDS];
30
31module_param_array(index, int, NULL, 0444);
32MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
33module_param_array(id, charp, NULL, 0444);
34MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
35module_param_array(enable, bool, NULL, 0444);
36MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
37module_param_array(precise_ptr, bool, NULL, 0444);
38MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
39MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
40MODULE_DESCRIPTION("RME Digi9652/Digi9636");
41MODULE_LICENSE("GPL");
42MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
43 "{RME,Hammerfall-Light}}");
44
45
46
47
48
49
50
51
52
53
54#define RME9652_NCHANNELS 26
55#define RME9636_NCHANNELS 18
56
57
58
59#define RME9652_SYNC_FROM_SPDIF 0
60#define RME9652_SYNC_FROM_ADAT1 1
61#define RME9652_SYNC_FROM_ADAT2 2
62#define RME9652_SYNC_FROM_ADAT3 3
63
64
65
66#define RME9652_SPDIFIN_OPTICAL 0
67#define RME9652_SPDIFIN_COAXIAL 1
68#define RME9652_SPDIFIN_INTERN 2
69
70
71
72#define RME9652_IRQ (1<<0)
73#define RME9652_lock_2 (1<<1)
74#define RME9652_lock_1 (1<<2)
75#define RME9652_lock_0 (1<<3)
76#define RME9652_fs48 (1<<4)
77#define RME9652_wsel_rd (1<<5)
78
79#define RME9652_sync_2 (1<<16)
80#define RME9652_sync_1 (1<<17)
81#define RME9652_sync_0 (1<<18)
82#define RME9652_DS_rd (1<<19)
83#define RME9652_tc_busy (1<<20)
84#define RME9652_tc_out (1<<21)
85#define RME9652_F_0 (1<<22)
86#define RME9652_F_1 (1<<23)
87#define RME9652_F_2 (1<<24)
88#define RME9652_ERF (1<<25)
89#define RME9652_buffer_id (1<<26)
90#define RME9652_tc_valid (1<<27)
91#define RME9652_SPDIF_READ (1<<28)
92
93#define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
94#define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
95#define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
96#define rme9652_decode_spdif_rate(x) ((x)>>22)
97
98
99
100#define RME9652_buf_pos 0x000FFC0
101
102
103
104
105
106#define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
107
108
109
110
111
112#define RME9652_IO_EXTENT 1024
113
114#define RME9652_init_buffer 0
115#define RME9652_play_buffer 32
116#define RME9652_rec_buffer 36
117#define RME9652_control_register 64
118#define RME9652_irq_clear 96
119#define RME9652_time_code 100
120#define RME9652_thru_base 128
121
122
123
124
125
126
127
128#define RME9652_status_register 0
129
130
131
132
133#define RME9652_start_bit (1<<0)
134
135#define RME9652_Master (1<<4)
136#define RME9652_IE (1<<5)
137#define RME9652_freq (1<<6)
138#define RME9652_freq1 (1<<7)
139#define RME9652_DS (1<<8)
140#define RME9652_PRO (1<<9)
141#define RME9652_EMP (1<<10)
142#define RME9652_Dolby (1<<11)
143#define RME9652_opt_out (1<<12)
144#define RME9652_wsel (1<<13)
145#define RME9652_inp_0 (1<<14)
146#define RME9652_inp_1 (1<<15)
147#define RME9652_SyncPref_ADAT2 (1<<16)
148#define RME9652_SyncPref_ADAT3 (1<<17)
149#define RME9652_SPDIF_RESET (1<<18)
150#define RME9652_SPDIF_SELECT (1<<19)
151#define RME9652_SPDIF_CLOCK (1<<20)
152#define RME9652_SPDIF_WRITE (1<<21)
153#define RME9652_ADAT1_INTERNAL (1<<22)
154
155
156
157#define RME9652_latency 0x0e
158#define rme9652_encode_latency(x) (((x)&0x7)<<1)
159#define rme9652_decode_latency(x) (((x)>>1)&0x7)
160#define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
161#define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
162#define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
163#define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
164
165#define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
166#define RME9652_SyncPref_ADAT1 0
167#define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
168
169
170
171#define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
172#define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
173
174
175
176
177
178
179
180
181
182
183#define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
184#define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
185
186struct snd_rme9652 {
187 int dev;
188
189 spinlock_t lock;
190 int irq;
191 unsigned long port;
192 void __iomem *iobase;
193
194 int precise_ptr;
195
196 u32 control_register;
197 u32 thru_bits;
198
199 u32 creg_spdif;
200 u32 creg_spdif_stream;
201
202 char *card_name;
203
204 size_t hw_offsetmask;
205 size_t prev_hw_offset;
206 size_t max_jitter;
207
208 size_t period_bytes;
209
210 unsigned char ds_channels;
211 unsigned char ss_channels;
212
213 struct snd_dma_buffer playback_dma_buf;
214 struct snd_dma_buffer capture_dma_buf;
215
216 unsigned char *capture_buffer;
217 unsigned char *playback_buffer;
218
219 pid_t capture_pid;
220 pid_t playback_pid;
221
222 struct snd_pcm_substream *capture_substream;
223 struct snd_pcm_substream *playback_substream;
224 int running;
225
226 int passthru;
227 int hw_rev;
228
229 int last_spdif_sample_rate;
230 int last_adat_sample_rate;
231
232 const char *channel_map;
233
234 struct snd_card *card;
235 struct snd_pcm *pcm;
236 struct pci_dev *pci;
237 struct snd_kcontrol *spdif_ctl;
238
239};
240
241
242
243
244
245
246
247
248
249static const char channel_map_9652_ss[26] = {
250 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
251 18, 19, 20, 21, 22, 23, 24, 25
252};
253
254static const char channel_map_9636_ss[26] = {
255 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
256
257 24, 25,
258
259 -1, -1, -1, -1, -1, -1, -1, -1
260};
261
262static const char channel_map_9652_ds[26] = {
263
264 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
265
266 24, 25,
267
268 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
269};
270
271static const char channel_map_9636_ds[26] = {
272
273 1, 3, 5, 7, 9, 11, 13, 15,
274
275 24, 25,
276
277 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
278};
279
280static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
281{
282 return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, size, dmab);
283}
284
285static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
286{
287 if (dmab->area)
288 snd_dma_free_pages(dmab);
289}
290
291
292static const struct pci_device_id snd_rme9652_ids[] = {
293 {
294 .vendor = 0x10ee,
295 .device = 0x3fc4,
296 .subvendor = PCI_ANY_ID,
297 .subdevice = PCI_ANY_ID,
298 },
299 { 0, },
300};
301
302MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
303
304static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
305{
306 writel(val, rme9652->iobase + reg);
307}
308
309static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
310{
311 return readl(rme9652->iobase + reg);
312}
313
314static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
315{
316 unsigned long flags;
317 int ret = 1;
318
319 spin_lock_irqsave(&rme9652->lock, flags);
320 if ((rme9652->playback_pid != rme9652->capture_pid) &&
321 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
322 ret = 0;
323 }
324 spin_unlock_irqrestore(&rme9652->lock, flags);
325 return ret;
326}
327
328static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
329{
330 if (rme9652_running_double_speed(rme9652)) {
331 return (rme9652_read(rme9652, RME9652_status_register) &
332 RME9652_fs48) ? 96000 : 88200;
333 } else {
334 return (rme9652_read(rme9652, RME9652_status_register) &
335 RME9652_fs48) ? 48000 : 44100;
336 }
337}
338
339static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
340{
341 unsigned int i;
342
343 i = rme9652->control_register & RME9652_latency;
344 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
345 rme9652->hw_offsetmask =
346 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
347 rme9652->max_jitter = 80;
348}
349
350static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
351{
352 int status;
353 unsigned int offset, frag;
354 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
355 snd_pcm_sframes_t delta;
356
357 status = rme9652_read(rme9652, RME9652_status_register);
358 if (!rme9652->precise_ptr)
359 return (status & RME9652_buffer_id) ? period_size : 0;
360 offset = status & RME9652_buf_pos;
361
362
363
364
365
366 delta = rme9652->prev_hw_offset - offset;
367 delta &= 0xffff;
368 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
369 offset = rme9652->prev_hw_offset;
370 else
371 rme9652->prev_hw_offset = offset;
372 offset &= rme9652->hw_offsetmask;
373 offset /= 4;
374 frag = status & RME9652_buffer_id;
375
376 if (offset < period_size) {
377 if (offset > rme9652->max_jitter) {
378 if (frag)
379 dev_err(rme9652->card->dev,
380 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
381 status, offset);
382 } else if (!frag)
383 return 0;
384 offset -= rme9652->max_jitter;
385 if ((int)offset < 0)
386 offset += period_size * 2;
387 } else {
388 if (offset > period_size + rme9652->max_jitter) {
389 if (!frag)
390 dev_err(rme9652->card->dev,
391 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
392 status, offset);
393 } else if (frag)
394 return period_size;
395 offset -= rme9652->max_jitter;
396 }
397
398 return offset;
399}
400
401static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
402{
403 int i;
404
405
406
407
408
409
410
411 for (i = 0; i < 8; i++) {
412 rme9652_write(rme9652, i * 4, 0);
413 udelay(10);
414 }
415 rme9652->prev_hw_offset = 0;
416}
417
418static inline void rme9652_start(struct snd_rme9652 *s)
419{
420 s->control_register |= (RME9652_IE | RME9652_start_bit);
421 rme9652_write(s, RME9652_control_register, s->control_register);
422}
423
424static inline void rme9652_stop(struct snd_rme9652 *s)
425{
426 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
427 rme9652_write(s, RME9652_control_register, s->control_register);
428}
429
430static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
431 unsigned int frames)
432{
433 int restart = 0;
434 int n;
435
436 spin_lock_irq(&s->lock);
437
438 if ((restart = s->running)) {
439 rme9652_stop(s);
440 }
441
442 frames >>= 7;
443 n = 0;
444 while (frames) {
445 n++;
446 frames >>= 1;
447 }
448
449 s->control_register &= ~RME9652_latency;
450 s->control_register |= rme9652_encode_latency(n);
451
452 rme9652_write(s, RME9652_control_register, s->control_register);
453
454 rme9652_compute_period_size(s);
455
456 if (restart)
457 rme9652_start(s);
458
459 spin_unlock_irq(&s->lock);
460
461 return 0;
462}
463
464static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
465{
466 int restart;
467 int reject_if_open = 0;
468 int xrate;
469
470 if (!snd_rme9652_use_is_exclusive (rme9652)) {
471 return -EBUSY;
472 }
473
474
475
476
477
478
479
480
481
482
483
484
485 spin_lock_irq(&rme9652->lock);
486 xrate = rme9652_adat_sample_rate(rme9652);
487
488 switch (rate) {
489 case 44100:
490 if (xrate > 48000) {
491 reject_if_open = 1;
492 }
493 rate = 0;
494 break;
495 case 48000:
496 if (xrate > 48000) {
497 reject_if_open = 1;
498 }
499 rate = RME9652_freq;
500 break;
501 case 88200:
502 if (xrate < 48000) {
503 reject_if_open = 1;
504 }
505 rate = RME9652_DS;
506 break;
507 case 96000:
508 if (xrate < 48000) {
509 reject_if_open = 1;
510 }
511 rate = RME9652_DS | RME9652_freq;
512 break;
513 default:
514 spin_unlock_irq(&rme9652->lock);
515 return -EINVAL;
516 }
517
518 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
519 spin_unlock_irq(&rme9652->lock);
520 return -EBUSY;
521 }
522
523 if ((restart = rme9652->running)) {
524 rme9652_stop(rme9652);
525 }
526 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
527 rme9652->control_register |= rate;
528 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
529
530 if (restart) {
531 rme9652_start(rme9652);
532 }
533
534 if (rate & RME9652_DS) {
535 if (rme9652->ss_channels == RME9652_NCHANNELS) {
536 rme9652->channel_map = channel_map_9652_ds;
537 } else {
538 rme9652->channel_map = channel_map_9636_ds;
539 }
540 } else {
541 if (rme9652->ss_channels == RME9652_NCHANNELS) {
542 rme9652->channel_map = channel_map_9652_ss;
543 } else {
544 rme9652->channel_map = channel_map_9636_ss;
545 }
546 }
547
548 spin_unlock_irq(&rme9652->lock);
549 return 0;
550}
551
552static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
553{
554 int i;
555
556 rme9652->passthru = 0;
557
558 if (channel < 0) {
559
560
561
562 if (enable) {
563 for (i = 0; i < RME9652_NCHANNELS; i++) {
564 rme9652->thru_bits |= (1 << i);
565 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
566 }
567 } else {
568 for (i = 0; i < RME9652_NCHANNELS; i++) {
569 rme9652->thru_bits &= ~(1 << i);
570 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
571 }
572 }
573
574 } else {
575 int mapped_channel;
576
577 mapped_channel = rme9652->channel_map[channel];
578
579 if (enable) {
580 rme9652->thru_bits |= (1 << mapped_channel);
581 } else {
582 rme9652->thru_bits &= ~(1 << mapped_channel);
583 }
584
585 rme9652_write(rme9652,
586 RME9652_thru_base + mapped_channel * 4,
587 enable ? 1 : 0);
588 }
589}
590
591static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
592{
593 if (onoff) {
594 rme9652_set_thru(rme9652, -1, 1);
595
596
597
598
599
600 rme9652->control_register =
601 RME9652_inp_0 |
602 rme9652_encode_latency(7) |
603 RME9652_start_bit;
604
605 rme9652_reset_hw_pointer(rme9652);
606
607 rme9652_write(rme9652, RME9652_control_register,
608 rme9652->control_register);
609 rme9652->passthru = 1;
610 } else {
611 rme9652_set_thru(rme9652, -1, 0);
612 rme9652_stop(rme9652);
613 rme9652->passthru = 0;
614 }
615
616 return 0;
617}
618
619static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
620{
621 if (onoff)
622 rme9652->control_register |= mask;
623 else
624 rme9652->control_register &= ~mask;
625
626 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
627}
628
629static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
630{
631 long mask;
632 long i;
633
634 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
635 if (val & mask)
636 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
637 else
638 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
639
640 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
641 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
642 }
643}
644
645static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
646{
647 long mask;
648 long val;
649 long i;
650
651 val = 0;
652
653 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
654 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
655 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
656 val |= mask;
657 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
658 }
659
660 return val;
661}
662
663static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
664{
665 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
666 rme9652_spdif_write_byte (rme9652, 0x20);
667 rme9652_spdif_write_byte (rme9652, address);
668 rme9652_spdif_write_byte (rme9652, data);
669 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
670}
671
672
673static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
674{
675 int ret;
676
677 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
678 rme9652_spdif_write_byte (rme9652, 0x20);
679 rme9652_spdif_write_byte (rme9652, address);
680 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
681 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
682
683 rme9652_spdif_write_byte (rme9652, 0x21);
684 ret = rme9652_spdif_read_byte (rme9652);
685 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
686
687 return ret;
688}
689
690static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
691{
692
693
694 rme9652->control_register |= RME9652_SPDIF_RESET;
695
696 rme9652_write_spdif_codec (rme9652, 4, 0x40);
697 rme9652_write_spdif_codec (rme9652, 17, 0x13);
698 rme9652_write_spdif_codec (rme9652, 6, 0x02);
699}
700
701static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
702{
703 unsigned int rate_bits;
704
705 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
706 return -1;
707 }
708
709 if (s->hw_rev == 15) {
710
711 int x, y, ret;
712
713 x = rme9652_spdif_read_codec (s, 30);
714
715 if (x != 0)
716 y = 48000 * 64 / x;
717 else
718 y = 0;
719
720 if (y > 30400 && y < 33600) ret = 32000;
721 else if (y > 41900 && y < 46000) ret = 44100;
722 else if (y > 46000 && y < 50400) ret = 48000;
723 else if (y > 60800 && y < 67200) ret = 64000;
724 else if (y > 83700 && y < 92000) ret = 88200;
725 else if (y > 92000 && y < 100000) ret = 96000;
726 else ret = 0;
727 return ret;
728 }
729
730 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
731
732 switch (rme9652_decode_spdif_rate(rate_bits)) {
733 case 0x7:
734 return 32000;
735 break;
736
737 case 0x6:
738 return 44100;
739 break;
740
741 case 0x5:
742 return 48000;
743 break;
744
745 case 0x4:
746 return 88200;
747 break;
748
749 case 0x3:
750 return 96000;
751 break;
752
753 case 0x0:
754 return 64000;
755 break;
756
757 default:
758 dev_err(s->card->dev,
759 "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
760 s->card_name, rate_bits);
761 return 0;
762 break;
763 }
764}
765
766
767
768
769
770static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
771{
772 u32 val = 0;
773 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
774 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
775 if (val & RME9652_PRO)
776 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
777 else
778 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
779 return val;
780}
781
782static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
783{
784 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
785 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
786 if (val & RME9652_PRO)
787 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
788 else
789 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
790}
791
792static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
793{
794 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
795 uinfo->count = 1;
796 return 0;
797}
798
799static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
800{
801 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
802
803 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
804 return 0;
805}
806
807static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
808{
809 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
810 int change;
811 u32 val;
812
813 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
814 spin_lock_irq(&rme9652->lock);
815 change = val != rme9652->creg_spdif;
816 rme9652->creg_spdif = val;
817 spin_unlock_irq(&rme9652->lock);
818 return change;
819}
820
821static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
822{
823 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
824 uinfo->count = 1;
825 return 0;
826}
827
828static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
829{
830 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
831
832 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
833 return 0;
834}
835
836static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
837{
838 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
839 int change;
840 u32 val;
841
842 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
843 spin_lock_irq(&rme9652->lock);
844 change = val != rme9652->creg_spdif_stream;
845 rme9652->creg_spdif_stream = val;
846 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
847 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
848 spin_unlock_irq(&rme9652->lock);
849 return change;
850}
851
852static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
853{
854 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
855 uinfo->count = 1;
856 return 0;
857}
858
859static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
860{
861 ucontrol->value.iec958.status[0] = kcontrol->private_value;
862 return 0;
863}
864
865#define RME9652_ADAT1_IN(xname, xindex) \
866{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
867 .info = snd_rme9652_info_adat1_in, \
868 .get = snd_rme9652_get_adat1_in, \
869 .put = snd_rme9652_put_adat1_in }
870
871static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
872{
873 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
874 return 1;
875 return 0;
876}
877
878static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
879{
880 int restart = 0;
881
882 if (internal) {
883 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
884 } else {
885 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
886 }
887
888
889
890 if ((restart = rme9652->running)) {
891 rme9652_stop(rme9652);
892 }
893
894 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
895
896 if (restart) {
897 rme9652_start(rme9652);
898 }
899
900 return 0;
901}
902
903static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
904{
905 static const char * const texts[2] = {"ADAT1", "Internal"};
906
907 return snd_ctl_enum_info(uinfo, 1, 2, texts);
908}
909
910static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
911{
912 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
913
914 spin_lock_irq(&rme9652->lock);
915 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
916 spin_unlock_irq(&rme9652->lock);
917 return 0;
918}
919
920static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
921{
922 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
923 int change;
924 unsigned int val;
925
926 if (!snd_rme9652_use_is_exclusive(rme9652))
927 return -EBUSY;
928 val = ucontrol->value.enumerated.item[0] % 2;
929 spin_lock_irq(&rme9652->lock);
930 change = val != rme9652_adat1_in(rme9652);
931 if (change)
932 rme9652_set_adat1_input(rme9652, val);
933 spin_unlock_irq(&rme9652->lock);
934 return change;
935}
936
937#define RME9652_SPDIF_IN(xname, xindex) \
938{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
939 .info = snd_rme9652_info_spdif_in, \
940 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
941
942static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
943{
944 return rme9652_decode_spdif_in(rme9652->control_register &
945 RME9652_inp);
946}
947
948static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
949{
950 int restart = 0;
951
952 rme9652->control_register &= ~RME9652_inp;
953 rme9652->control_register |= rme9652_encode_spdif_in(in);
954
955 if ((restart = rme9652->running)) {
956 rme9652_stop(rme9652);
957 }
958
959 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
960
961 if (restart) {
962 rme9652_start(rme9652);
963 }
964
965 return 0;
966}
967
968static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
969{
970 static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
971
972 return snd_ctl_enum_info(uinfo, 1, 3, texts);
973}
974
975static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
976{
977 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
978
979 spin_lock_irq(&rme9652->lock);
980 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
981 spin_unlock_irq(&rme9652->lock);
982 return 0;
983}
984
985static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
986{
987 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
988 int change;
989 unsigned int val;
990
991 if (!snd_rme9652_use_is_exclusive(rme9652))
992 return -EBUSY;
993 val = ucontrol->value.enumerated.item[0] % 3;
994 spin_lock_irq(&rme9652->lock);
995 change = val != rme9652_spdif_in(rme9652);
996 if (change)
997 rme9652_set_spdif_input(rme9652, val);
998 spin_unlock_irq(&rme9652->lock);
999 return change;
1000}
1001
1002#define RME9652_SPDIF_OUT(xname, xindex) \
1003{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1004 .info = snd_rme9652_info_spdif_out, \
1005 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1006
1007static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1008{
1009 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1010}
1011
1012static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1013{
1014 int restart = 0;
1015
1016 if (out) {
1017 rme9652->control_register |= RME9652_opt_out;
1018 } else {
1019 rme9652->control_register &= ~RME9652_opt_out;
1020 }
1021
1022 if ((restart = rme9652->running)) {
1023 rme9652_stop(rme9652);
1024 }
1025
1026 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1027
1028 if (restart) {
1029 rme9652_start(rme9652);
1030 }
1031
1032 return 0;
1033}
1034
1035#define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1036
1037static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1038{
1039 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1040
1041 spin_lock_irq(&rme9652->lock);
1042 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1043 spin_unlock_irq(&rme9652->lock);
1044 return 0;
1045}
1046
1047static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1048{
1049 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1050 int change;
1051 unsigned int val;
1052
1053 if (!snd_rme9652_use_is_exclusive(rme9652))
1054 return -EBUSY;
1055 val = ucontrol->value.integer.value[0] & 1;
1056 spin_lock_irq(&rme9652->lock);
1057 change = (int)val != rme9652_spdif_out(rme9652);
1058 rme9652_set_spdif_output(rme9652, val);
1059 spin_unlock_irq(&rme9652->lock);
1060 return change;
1061}
1062
1063#define RME9652_SYNC_MODE(xname, xindex) \
1064{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1065 .info = snd_rme9652_info_sync_mode, \
1066 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1067
1068static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1069{
1070 if (rme9652->control_register & RME9652_wsel) {
1071 return 2;
1072 } else if (rme9652->control_register & RME9652_Master) {
1073 return 1;
1074 } else {
1075 return 0;
1076 }
1077}
1078
1079static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1080{
1081 int restart = 0;
1082
1083 switch (mode) {
1084 case 0:
1085 rme9652->control_register &=
1086 ~(RME9652_Master | RME9652_wsel);
1087 break;
1088 case 1:
1089 rme9652->control_register =
1090 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1091 break;
1092 case 2:
1093 rme9652->control_register |=
1094 (RME9652_Master | RME9652_wsel);
1095 break;
1096 }
1097
1098 if ((restart = rme9652->running)) {
1099 rme9652_stop(rme9652);
1100 }
1101
1102 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1103
1104 if (restart) {
1105 rme9652_start(rme9652);
1106 }
1107
1108 return 0;
1109}
1110
1111static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1112{
1113 static const char * const texts[3] = {
1114 "AutoSync", "Master", "Word Clock"
1115 };
1116
1117 return snd_ctl_enum_info(uinfo, 1, 3, texts);
1118}
1119
1120static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1121{
1122 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1123
1124 spin_lock_irq(&rme9652->lock);
1125 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1126 spin_unlock_irq(&rme9652->lock);
1127 return 0;
1128}
1129
1130static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1131{
1132 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1133 int change;
1134 unsigned int val;
1135
1136 val = ucontrol->value.enumerated.item[0] % 3;
1137 spin_lock_irq(&rme9652->lock);
1138 change = (int)val != rme9652_sync_mode(rme9652);
1139 rme9652_set_sync_mode(rme9652, val);
1140 spin_unlock_irq(&rme9652->lock);
1141 return change;
1142}
1143
1144#define RME9652_SYNC_PREF(xname, xindex) \
1145{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1146 .info = snd_rme9652_info_sync_pref, \
1147 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1148
1149static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1150{
1151 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1152 case RME9652_SyncPref_ADAT1:
1153 return RME9652_SYNC_FROM_ADAT1;
1154 case RME9652_SyncPref_ADAT2:
1155 return RME9652_SYNC_FROM_ADAT2;
1156 case RME9652_SyncPref_ADAT3:
1157 return RME9652_SYNC_FROM_ADAT3;
1158 case RME9652_SyncPref_SPDIF:
1159 return RME9652_SYNC_FROM_SPDIF;
1160 }
1161
1162 return 0;
1163}
1164
1165static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1166{
1167 int restart;
1168
1169 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1170 switch (pref) {
1171 case RME9652_SYNC_FROM_ADAT1:
1172 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1173 break;
1174 case RME9652_SYNC_FROM_ADAT2:
1175 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1176 break;
1177 case RME9652_SYNC_FROM_ADAT3:
1178 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1179 break;
1180 case RME9652_SYNC_FROM_SPDIF:
1181 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1182 break;
1183 }
1184
1185 if ((restart = rme9652->running)) {
1186 rme9652_stop(rme9652);
1187 }
1188
1189 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1190
1191 if (restart) {
1192 rme9652_start(rme9652);
1193 }
1194
1195 return 0;
1196}
1197
1198static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1199{
1200 static const char * const texts[4] = {
1201 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1202 };
1203 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1204
1205 return snd_ctl_enum_info(uinfo, 1,
1206 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1207 texts);
1208}
1209
1210static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1211{
1212 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1213
1214 spin_lock_irq(&rme9652->lock);
1215 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1216 spin_unlock_irq(&rme9652->lock);
1217 return 0;
1218}
1219
1220static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1221{
1222 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1223 int change, max;
1224 unsigned int val;
1225
1226 if (!snd_rme9652_use_is_exclusive(rme9652))
1227 return -EBUSY;
1228 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1229 val = ucontrol->value.enumerated.item[0] % max;
1230 spin_lock_irq(&rme9652->lock);
1231 change = (int)val != rme9652_sync_pref(rme9652);
1232 rme9652_set_sync_pref(rme9652, val);
1233 spin_unlock_irq(&rme9652->lock);
1234 return change;
1235}
1236
1237static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1238{
1239 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1240 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1241 uinfo->count = rme9652->ss_channels;
1242 uinfo->value.integer.min = 0;
1243 uinfo->value.integer.max = 1;
1244 return 0;
1245}
1246
1247static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1248{
1249 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1250 unsigned int k;
1251 u32 thru_bits = rme9652->thru_bits;
1252
1253 for (k = 0; k < rme9652->ss_channels; ++k) {
1254 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1255 }
1256 return 0;
1257}
1258
1259static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1260{
1261 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1262 int change;
1263 unsigned int chn;
1264 u32 thru_bits = 0;
1265
1266 if (!snd_rme9652_use_is_exclusive(rme9652))
1267 return -EBUSY;
1268
1269 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1270 if (ucontrol->value.integer.value[chn])
1271 thru_bits |= 1 << chn;
1272 }
1273
1274 spin_lock_irq(&rme9652->lock);
1275 change = thru_bits ^ rme9652->thru_bits;
1276 if (change) {
1277 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1278 if (!(change & (1 << chn)))
1279 continue;
1280 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1281 }
1282 }
1283 spin_unlock_irq(&rme9652->lock);
1284 return !!change;
1285}
1286
1287#define RME9652_PASSTHRU(xname, xindex) \
1288{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1289 .info = snd_rme9652_info_passthru, \
1290 .put = snd_rme9652_put_passthru, \
1291 .get = snd_rme9652_get_passthru }
1292
1293#define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1294
1295static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1296{
1297 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1298
1299 spin_lock_irq(&rme9652->lock);
1300 ucontrol->value.integer.value[0] = rme9652->passthru;
1301 spin_unlock_irq(&rme9652->lock);
1302 return 0;
1303}
1304
1305static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1306{
1307 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1308 int change;
1309 unsigned int val;
1310 int err = 0;
1311
1312 if (!snd_rme9652_use_is_exclusive(rme9652))
1313 return -EBUSY;
1314
1315 val = ucontrol->value.integer.value[0] & 1;
1316 spin_lock_irq(&rme9652->lock);
1317 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1318 if (change)
1319 err = rme9652_set_passthru(rme9652, val);
1320 spin_unlock_irq(&rme9652->lock);
1321 return err ? err : change;
1322}
1323
1324
1325
1326#define RME9652_SPDIF_RATE(xname, xindex) \
1327{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1328 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1329 .info = snd_rme9652_info_spdif_rate, \
1330 .get = snd_rme9652_get_spdif_rate }
1331
1332static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1333{
1334 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1335 uinfo->count = 1;
1336 uinfo->value.integer.min = 0;
1337 uinfo->value.integer.max = 96000;
1338 return 0;
1339}
1340
1341static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1342{
1343 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1344
1345 spin_lock_irq(&rme9652->lock);
1346 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1347 spin_unlock_irq(&rme9652->lock);
1348 return 0;
1349}
1350
1351#define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1352{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1353 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1354 .info = snd_rme9652_info_adat_sync, \
1355 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1356
1357static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1358{
1359 static const char * const texts[4] = {
1360 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1361 };
1362
1363 return snd_ctl_enum_info(uinfo, 1, 4, texts);
1364}
1365
1366static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1367{
1368 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1369 unsigned int mask1, mask2, val;
1370
1371 switch (kcontrol->private_value) {
1372 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1373 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1374 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1375 default: return -EINVAL;
1376 }
1377 val = rme9652_read(rme9652, RME9652_status_register);
1378 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1379 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1380 return 0;
1381}
1382
1383#define RME9652_TC_VALID(xname, xindex) \
1384{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1385 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1386 .info = snd_rme9652_info_tc_valid, \
1387 .get = snd_rme9652_get_tc_valid }
1388
1389#define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1390
1391static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1392{
1393 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1394
1395 ucontrol->value.integer.value[0] =
1396 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1397 return 0;
1398}
1399
1400#ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1401
1402
1403
1404static int snd_rme9652_get_tc_value(void *private_data,
1405 snd_kswitch_t *kswitch,
1406 snd_switch_t *uswitch)
1407{
1408 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1409 u32 value;
1410 int i;
1411
1412 uswitch->type = SNDRV_SW_TYPE_DWORD;
1413
1414 if ((rme9652_read(s, RME9652_status_register) &
1415 RME9652_tc_valid) == 0) {
1416 uswitch->value.data32[0] = 0;
1417 return 0;
1418 }
1419
1420
1421
1422 rme9652_write(s, RME9652_time_code, 0);
1423
1424
1425
1426 for (i = 0; i < 50; i++) {
1427 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1428 break;
1429 }
1430
1431 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1432 return -EIO;
1433 }
1434
1435 value = 0;
1436
1437 for (i = 0; i < 32; i++) {
1438 value >>= 1;
1439
1440 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1441 value |= 0x80000000;
1442 }
1443
1444 if (value > 2 * 60 * 48000) {
1445 value -= 2 * 60 * 48000;
1446 } else {
1447 value = 0;
1448 }
1449
1450 uswitch->value.data32[0] = value;
1451
1452 return 0;
1453}
1454
1455#endif
1456
1457static const struct snd_kcontrol_new snd_rme9652_controls[] = {
1458{
1459 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1460 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1461 .info = snd_rme9652_control_spdif_info,
1462 .get = snd_rme9652_control_spdif_get,
1463 .put = snd_rme9652_control_spdif_put,
1464},
1465{
1466 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1467 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1468 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1469 .info = snd_rme9652_control_spdif_stream_info,
1470 .get = snd_rme9652_control_spdif_stream_get,
1471 .put = snd_rme9652_control_spdif_stream_put,
1472},
1473{
1474 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1475 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1476 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1477 .info = snd_rme9652_control_spdif_mask_info,
1478 .get = snd_rme9652_control_spdif_mask_get,
1479 .private_value = IEC958_AES0_NONAUDIO |
1480 IEC958_AES0_PROFESSIONAL |
1481 IEC958_AES0_CON_EMPHASIS,
1482},
1483{
1484 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1485 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1486 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1487 .info = snd_rme9652_control_spdif_mask_info,
1488 .get = snd_rme9652_control_spdif_mask_get,
1489 .private_value = IEC958_AES0_NONAUDIO |
1490 IEC958_AES0_PROFESSIONAL |
1491 IEC958_AES0_PRO_EMPHASIS,
1492},
1493RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1494RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1495RME9652_SYNC_MODE("Sync Mode", 0),
1496RME9652_SYNC_PREF("Preferred Sync Source", 0),
1497{
1498 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1499 .name = "Channels Thru",
1500 .index = 0,
1501 .info = snd_rme9652_info_thru,
1502 .get = snd_rme9652_get_thru,
1503 .put = snd_rme9652_put_thru,
1504},
1505RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1506RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1507RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1508RME9652_TC_VALID("Timecode Valid", 0),
1509RME9652_PASSTHRU("Passthru", 0)
1510};
1511
1512static const struct snd_kcontrol_new snd_rme9652_adat3_check =
1513RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1514
1515static const struct snd_kcontrol_new snd_rme9652_adat1_input =
1516RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1517
1518static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1519{
1520 unsigned int idx;
1521 int err;
1522 struct snd_kcontrol *kctl;
1523
1524 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1525 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1526 return err;
1527 if (idx == 1)
1528 rme9652->spdif_ctl = kctl;
1529 }
1530
1531 if (rme9652->ss_channels == RME9652_NCHANNELS)
1532 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1533 return err;
1534
1535 if (rme9652->hw_rev >= 15)
1536 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1537 return err;
1538
1539 return 0;
1540}
1541
1542
1543
1544
1545
1546static void
1547snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1548{
1549 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1550 u32 thru_bits = rme9652->thru_bits;
1551 int show_auto_sync_source = 0;
1552 int i;
1553 unsigned int status;
1554 int x;
1555
1556 status = rme9652_read(rme9652, RME9652_status_register);
1557
1558 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1559 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1560 rme9652->capture_buffer, rme9652->playback_buffer);
1561 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1562 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1563 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1564
1565 snd_iprintf(buffer, "\n");
1566
1567 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1568 RME9652_latency));
1569
1570 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1571 x, (unsigned long) rme9652->period_bytes);
1572 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1573 rme9652_hw_pointer(rme9652));
1574 snd_iprintf(buffer, "Passthru: %s\n",
1575 rme9652->passthru ? "yes" : "no");
1576
1577 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1578 snd_iprintf(buffer, "Clock mode: autosync\n");
1579 show_auto_sync_source = 1;
1580 } else if (rme9652->control_register & RME9652_wsel) {
1581 if (status & RME9652_wsel_rd) {
1582 snd_iprintf(buffer, "Clock mode: word clock\n");
1583 } else {
1584 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1585 }
1586 } else {
1587 snd_iprintf(buffer, "Clock mode: master\n");
1588 }
1589
1590 if (show_auto_sync_source) {
1591 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1592 case RME9652_SyncPref_ADAT1:
1593 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1594 break;
1595 case RME9652_SyncPref_ADAT2:
1596 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1597 break;
1598 case RME9652_SyncPref_ADAT3:
1599 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1600 break;
1601 case RME9652_SyncPref_SPDIF:
1602 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1603 break;
1604 default:
1605 snd_iprintf(buffer, "Pref. sync source: ???\n");
1606 }
1607 }
1608
1609 if (rme9652->hw_rev >= 15)
1610 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1611 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1612 "Internal" : "ADAT1 optical");
1613
1614 snd_iprintf(buffer, "\n");
1615
1616 switch (rme9652_decode_spdif_in(rme9652->control_register &
1617 RME9652_inp)) {
1618 case RME9652_SPDIFIN_OPTICAL:
1619 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1620 break;
1621 case RME9652_SPDIFIN_COAXIAL:
1622 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1623 break;
1624 case RME9652_SPDIFIN_INTERN:
1625 snd_iprintf(buffer, "IEC958 input: Internal\n");
1626 break;
1627 default:
1628 snd_iprintf(buffer, "IEC958 input: ???\n");
1629 break;
1630 }
1631
1632 if (rme9652->control_register & RME9652_opt_out) {
1633 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1634 } else {
1635 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1636 }
1637
1638 if (rme9652->control_register & RME9652_PRO) {
1639 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1640 } else {
1641 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1642 }
1643
1644 if (rme9652->control_register & RME9652_EMP) {
1645 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1646 } else {
1647 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1648 }
1649
1650 if (rme9652->control_register & RME9652_Dolby) {
1651 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1652 } else {
1653 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1654 }
1655
1656 i = rme9652_spdif_sample_rate(rme9652);
1657
1658 if (i < 0) {
1659 snd_iprintf(buffer,
1660 "IEC958 sample rate: error flag set\n");
1661 } else if (i == 0) {
1662 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1663 } else {
1664 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1665 }
1666
1667 snd_iprintf(buffer, "\n");
1668
1669 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1670 rme9652_adat_sample_rate(rme9652));
1671
1672
1673
1674 x = status & RME9652_sync_0;
1675 if (status & RME9652_lock_0) {
1676 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1677 } else {
1678 snd_iprintf(buffer, "ADAT1: No Lock\n");
1679 }
1680
1681 x = status & RME9652_sync_1;
1682 if (status & RME9652_lock_1) {
1683 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1684 } else {
1685 snd_iprintf(buffer, "ADAT2: No Lock\n");
1686 }
1687
1688 x = status & RME9652_sync_2;
1689 if (status & RME9652_lock_2) {
1690 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1691 } else {
1692 snd_iprintf(buffer, "ADAT3: No Lock\n");
1693 }
1694
1695 snd_iprintf(buffer, "\n");
1696
1697 snd_iprintf(buffer, "Timecode signal: %s\n",
1698 (status & RME9652_tc_valid) ? "yes" : "no");
1699
1700
1701
1702 snd_iprintf(buffer, "Punch Status:\n\n");
1703
1704 for (i = 0; i < rme9652->ss_channels; i++) {
1705 if (thru_bits & (1 << i)) {
1706 snd_iprintf(buffer, "%2d: on ", i + 1);
1707 } else {
1708 snd_iprintf(buffer, "%2d: off ", i + 1);
1709 }
1710
1711 if (((i + 1) % 8) == 0) {
1712 snd_iprintf(buffer, "\n");
1713 }
1714 }
1715
1716 snd_iprintf(buffer, "\n");
1717}
1718
1719static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1720{
1721 snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1722 snd_rme9652_proc_read);
1723}
1724
1725static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1726{
1727 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1728 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1729}
1730
1731static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1732{
1733 if (rme9652->irq >= 0)
1734 rme9652_stop(rme9652);
1735 snd_rme9652_free_buffers(rme9652);
1736
1737 if (rme9652->irq >= 0)
1738 free_irq(rme9652->irq, (void *)rme9652);
1739 iounmap(rme9652->iobase);
1740 if (rme9652->port)
1741 pci_release_regions(rme9652->pci);
1742
1743 pci_disable_device(rme9652->pci);
1744 return 0;
1745}
1746
1747static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1748{
1749 unsigned long pb_bus, cb_bus;
1750
1751 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1752 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1753 if (rme9652->capture_dma_buf.area)
1754 snd_dma_free_pages(&rme9652->capture_dma_buf);
1755 dev_err(rme9652->card->dev,
1756 "%s: no buffers available\n", rme9652->card_name);
1757 return -ENOMEM;
1758 }
1759
1760
1761
1762 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1763 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1764
1765
1766
1767 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1768 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1769
1770 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1771 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1772
1773 return 0;
1774}
1775
1776static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1777{
1778 unsigned int k;
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796 rme9652->control_register =
1797 RME9652_inp_0 | rme9652_encode_latency(7);
1798
1799 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1800
1801 rme9652_reset_hw_pointer(rme9652);
1802 rme9652_compute_period_size(rme9652);
1803
1804
1805
1806 for (k = 0; k < RME9652_NCHANNELS; ++k)
1807 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1808
1809 rme9652->thru_bits = 0;
1810 rme9652->passthru = 0;
1811
1812
1813
1814 rme9652_set_rate(rme9652, 48000);
1815}
1816
1817static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1818{
1819 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1820
1821 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1822 return IRQ_NONE;
1823 }
1824
1825 rme9652_write(rme9652, RME9652_irq_clear, 0);
1826
1827 if (rme9652->capture_substream) {
1828 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1829 }
1830
1831 if (rme9652->playback_substream) {
1832 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1833 }
1834 return IRQ_HANDLED;
1835}
1836
1837static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1838{
1839 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1840 return rme9652_hw_pointer(rme9652);
1841}
1842
1843static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1844 int stream,
1845 int channel)
1846
1847{
1848 int mapped_channel;
1849
1850 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1851 return NULL;
1852
1853 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1854 return NULL;
1855 }
1856
1857 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1858 return rme9652->capture_buffer +
1859 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1860 } else {
1861 return rme9652->playback_buffer +
1862 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1863 }
1864}
1865
1866static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1867 int channel, unsigned long pos,
1868 void __user *src, unsigned long count)
1869{
1870 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1871 char *channel_buf;
1872
1873 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1874 return -EINVAL;
1875
1876 channel_buf = rme9652_channel_buffer_location (rme9652,
1877 substream->pstr->stream,
1878 channel);
1879 if (snd_BUG_ON(!channel_buf))
1880 return -EIO;
1881 if (copy_from_user(channel_buf + pos, src, count))
1882 return -EFAULT;
1883 return 0;
1884}
1885
1886static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1887 int channel, unsigned long pos,
1888 void *src, unsigned long count)
1889{
1890 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1891 char *channel_buf;
1892
1893 channel_buf = rme9652_channel_buffer_location(rme9652,
1894 substream->pstr->stream,
1895 channel);
1896 if (snd_BUG_ON(!channel_buf))
1897 return -EIO;
1898 memcpy(channel_buf + pos, src, count);
1899 return 0;
1900}
1901
1902static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1903 int channel, unsigned long pos,
1904 void __user *dst, unsigned long count)
1905{
1906 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1907 char *channel_buf;
1908
1909 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1910 return -EINVAL;
1911
1912 channel_buf = rme9652_channel_buffer_location (rme9652,
1913 substream->pstr->stream,
1914 channel);
1915 if (snd_BUG_ON(!channel_buf))
1916 return -EIO;
1917 if (copy_to_user(dst, channel_buf + pos, count))
1918 return -EFAULT;
1919 return 0;
1920}
1921
1922static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1923 int channel, unsigned long pos,
1924 void *dst, unsigned long count)
1925{
1926 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1927 char *channel_buf;
1928
1929 channel_buf = rme9652_channel_buffer_location(rme9652,
1930 substream->pstr->stream,
1931 channel);
1932 if (snd_BUG_ON(!channel_buf))
1933 return -EIO;
1934 memcpy(dst, channel_buf + pos, count);
1935 return 0;
1936}
1937
1938static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1939 int channel, unsigned long pos,
1940 unsigned long count)
1941{
1942 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1943 char *channel_buf;
1944
1945 channel_buf = rme9652_channel_buffer_location (rme9652,
1946 substream->pstr->stream,
1947 channel);
1948 if (snd_BUG_ON(!channel_buf))
1949 return -EIO;
1950 memset(channel_buf + pos, 0, count);
1951 return 0;
1952}
1953
1954static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1955{
1956 struct snd_pcm_runtime *runtime = substream->runtime;
1957 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1958 struct snd_pcm_substream *other;
1959 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1960 other = rme9652->capture_substream;
1961 else
1962 other = rme9652->playback_substream;
1963 if (rme9652->running)
1964 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1965 else
1966 runtime->status->hw_ptr = 0;
1967 if (other) {
1968 struct snd_pcm_substream *s;
1969 struct snd_pcm_runtime *oruntime = other->runtime;
1970 snd_pcm_group_for_each_entry(s, substream) {
1971 if (s == other) {
1972 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1973 break;
1974 }
1975 }
1976 }
1977 return 0;
1978}
1979
1980static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1981 struct snd_pcm_hw_params *params)
1982{
1983 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1984 int err;
1985 pid_t this_pid;
1986 pid_t other_pid;
1987
1988 spin_lock_irq(&rme9652->lock);
1989
1990 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1991 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1992 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1993 this_pid = rme9652->playback_pid;
1994 other_pid = rme9652->capture_pid;
1995 } else {
1996 this_pid = rme9652->capture_pid;
1997 other_pid = rme9652->playback_pid;
1998 }
1999
2000 if ((other_pid > 0) && (this_pid != other_pid)) {
2001
2002
2003
2004
2005
2006
2007 if ((int)params_rate(params) !=
2008 rme9652_adat_sample_rate(rme9652)) {
2009 spin_unlock_irq(&rme9652->lock);
2010 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2011 return -EBUSY;
2012 }
2013
2014 if (params_period_size(params) != rme9652->period_bytes / 4) {
2015 spin_unlock_irq(&rme9652->lock);
2016 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2017 return -EBUSY;
2018 }
2019
2020
2021
2022 spin_unlock_irq(&rme9652->lock);
2023 return 0;
2024
2025 } else {
2026 spin_unlock_irq(&rme9652->lock);
2027 }
2028
2029
2030
2031
2032 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2033 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2034 return err;
2035 }
2036
2037 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2038 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2039 return err;
2040 }
2041
2042 return 0;
2043}
2044
2045static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2046 struct snd_pcm_channel_info *info)
2047{
2048 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2049 int chn;
2050
2051 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2052 return -EINVAL;
2053
2054 chn = rme9652->channel_map[array_index_nospec(info->channel,
2055 RME9652_NCHANNELS)];
2056 if (chn < 0)
2057 return -EINVAL;
2058
2059 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2060 info->first = 0;
2061 info->step = 32;
2062 return 0;
2063}
2064
2065static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2066 unsigned int cmd, void *arg)
2067{
2068 switch (cmd) {
2069 case SNDRV_PCM_IOCTL1_RESET:
2070 {
2071 return snd_rme9652_reset(substream);
2072 }
2073 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2074 {
2075 struct snd_pcm_channel_info *info = arg;
2076 return snd_rme9652_channel_info(substream, info);
2077 }
2078 default:
2079 break;
2080 }
2081
2082 return snd_pcm_lib_ioctl(substream, cmd, arg);
2083}
2084
2085static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2086{
2087 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2088}
2089
2090static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2091 int cmd)
2092{
2093 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2094 struct snd_pcm_substream *other;
2095 int running;
2096 spin_lock(&rme9652->lock);
2097 running = rme9652->running;
2098 switch (cmd) {
2099 case SNDRV_PCM_TRIGGER_START:
2100 running |= 1 << substream->stream;
2101 break;
2102 case SNDRV_PCM_TRIGGER_STOP:
2103 running &= ~(1 << substream->stream);
2104 break;
2105 default:
2106 snd_BUG();
2107 spin_unlock(&rme9652->lock);
2108 return -EINVAL;
2109 }
2110 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2111 other = rme9652->capture_substream;
2112 else
2113 other = rme9652->playback_substream;
2114
2115 if (other) {
2116 struct snd_pcm_substream *s;
2117 snd_pcm_group_for_each_entry(s, substream) {
2118 if (s == other) {
2119 snd_pcm_trigger_done(s, substream);
2120 if (cmd == SNDRV_PCM_TRIGGER_START)
2121 running |= 1 << s->stream;
2122 else
2123 running &= ~(1 << s->stream);
2124 goto _ok;
2125 }
2126 }
2127 if (cmd == SNDRV_PCM_TRIGGER_START) {
2128 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2129 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2130 rme9652_silence_playback(rme9652);
2131 } else {
2132 if (running &&
2133 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2134 rme9652_silence_playback(rme9652);
2135 }
2136 } else {
2137 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2138 rme9652_silence_playback(rme9652);
2139 }
2140 _ok:
2141 snd_pcm_trigger_done(substream, substream);
2142 if (!rme9652->running && running)
2143 rme9652_start(rme9652);
2144 else if (rme9652->running && !running)
2145 rme9652_stop(rme9652);
2146 rme9652->running = running;
2147 spin_unlock(&rme9652->lock);
2148
2149 return 0;
2150}
2151
2152static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2153{
2154 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2155 unsigned long flags;
2156
2157 spin_lock_irqsave(&rme9652->lock, flags);
2158 if (!rme9652->running)
2159 rme9652_reset_hw_pointer(rme9652);
2160 spin_unlock_irqrestore(&rme9652->lock, flags);
2161 return 0;
2162}
2163
2164static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2165{
2166 .info = (SNDRV_PCM_INFO_MMAP |
2167 SNDRV_PCM_INFO_MMAP_VALID |
2168 SNDRV_PCM_INFO_NONINTERLEAVED |
2169 SNDRV_PCM_INFO_SYNC_START |
2170 SNDRV_PCM_INFO_DOUBLE),
2171 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2172 .rates = (SNDRV_PCM_RATE_44100 |
2173 SNDRV_PCM_RATE_48000 |
2174 SNDRV_PCM_RATE_88200 |
2175 SNDRV_PCM_RATE_96000),
2176 .rate_min = 44100,
2177 .rate_max = 96000,
2178 .channels_min = 10,
2179 .channels_max = 26,
2180 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2181 .period_bytes_min = (64 * 4) * 10,
2182 .period_bytes_max = (8192 * 4) * 26,
2183 .periods_min = 2,
2184 .periods_max = 2,
2185 .fifo_size = 0,
2186};
2187
2188static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2189{
2190 .info = (SNDRV_PCM_INFO_MMAP |
2191 SNDRV_PCM_INFO_MMAP_VALID |
2192 SNDRV_PCM_INFO_NONINTERLEAVED |
2193 SNDRV_PCM_INFO_SYNC_START),
2194 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2195 .rates = (SNDRV_PCM_RATE_44100 |
2196 SNDRV_PCM_RATE_48000 |
2197 SNDRV_PCM_RATE_88200 |
2198 SNDRV_PCM_RATE_96000),
2199 .rate_min = 44100,
2200 .rate_max = 96000,
2201 .channels_min = 10,
2202 .channels_max = 26,
2203 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2204 .period_bytes_min = (64 * 4) * 10,
2205 .period_bytes_max = (8192 * 4) * 26,
2206 .periods_min = 2,
2207 .periods_max = 2,
2208 .fifo_size = 0,
2209};
2210
2211static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2212
2213static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2214 .count = ARRAY_SIZE(period_sizes),
2215 .list = period_sizes,
2216 .mask = 0
2217};
2218
2219static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2220 struct snd_pcm_hw_rule *rule)
2221{
2222 struct snd_rme9652 *rme9652 = rule->private;
2223 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2224 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2225 return snd_interval_list(c, 2, list, 0);
2226}
2227
2228static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2229 struct snd_pcm_hw_rule *rule)
2230{
2231 struct snd_rme9652 *rme9652 = rule->private;
2232 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2233 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2234 if (r->min > 48000) {
2235 struct snd_interval t = {
2236 .min = rme9652->ds_channels,
2237 .max = rme9652->ds_channels,
2238 .integer = 1,
2239 };
2240 return snd_interval_refine(c, &t);
2241 } else if (r->max < 88200) {
2242 struct snd_interval t = {
2243 .min = rme9652->ss_channels,
2244 .max = rme9652->ss_channels,
2245 .integer = 1,
2246 };
2247 return snd_interval_refine(c, &t);
2248 }
2249 return 0;
2250}
2251
2252static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2253 struct snd_pcm_hw_rule *rule)
2254{
2255 struct snd_rme9652 *rme9652 = rule->private;
2256 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2257 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2258 if (c->min >= rme9652->ss_channels) {
2259 struct snd_interval t = {
2260 .min = 44100,
2261 .max = 48000,
2262 .integer = 1,
2263 };
2264 return snd_interval_refine(r, &t);
2265 } else if (c->max <= rme9652->ds_channels) {
2266 struct snd_interval t = {
2267 .min = 88200,
2268 .max = 96000,
2269 .integer = 1,
2270 };
2271 return snd_interval_refine(r, &t);
2272 }
2273 return 0;
2274}
2275
2276static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2277{
2278 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2279 struct snd_pcm_runtime *runtime = substream->runtime;
2280
2281 spin_lock_irq(&rme9652->lock);
2282
2283 snd_pcm_set_sync(substream);
2284
2285 runtime->hw = snd_rme9652_playback_subinfo;
2286 runtime->dma_area = rme9652->playback_buffer;
2287 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2288
2289 if (rme9652->capture_substream == NULL) {
2290 rme9652_stop(rme9652);
2291 rme9652_set_thru(rme9652, -1, 0);
2292 }
2293
2294 rme9652->playback_pid = current->pid;
2295 rme9652->playback_substream = substream;
2296
2297 spin_unlock_irq(&rme9652->lock);
2298
2299 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2300 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2301 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2302 snd_rme9652_hw_rule_channels, rme9652,
2303 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2304 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2305 snd_rme9652_hw_rule_channels_rate, rme9652,
2306 SNDRV_PCM_HW_PARAM_RATE, -1);
2307 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2308 snd_rme9652_hw_rule_rate_channels, rme9652,
2309 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2310
2311 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2312 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2313 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2314 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2315 return 0;
2316}
2317
2318static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2319{
2320 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2321
2322 spin_lock_irq(&rme9652->lock);
2323
2324 rme9652->playback_pid = -1;
2325 rme9652->playback_substream = NULL;
2326
2327 spin_unlock_irq(&rme9652->lock);
2328
2329 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2330 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2331 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2332 return 0;
2333}
2334
2335
2336static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2337{
2338 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2339 struct snd_pcm_runtime *runtime = substream->runtime;
2340
2341 spin_lock_irq(&rme9652->lock);
2342
2343 snd_pcm_set_sync(substream);
2344
2345 runtime->hw = snd_rme9652_capture_subinfo;
2346 runtime->dma_area = rme9652->capture_buffer;
2347 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2348
2349 if (rme9652->playback_substream == NULL) {
2350 rme9652_stop(rme9652);
2351 rme9652_set_thru(rme9652, -1, 0);
2352 }
2353
2354 rme9652->capture_pid = current->pid;
2355 rme9652->capture_substream = substream;
2356
2357 spin_unlock_irq(&rme9652->lock);
2358
2359 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2360 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2361 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2362 snd_rme9652_hw_rule_channels, rme9652,
2363 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2364 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2365 snd_rme9652_hw_rule_channels_rate, rme9652,
2366 SNDRV_PCM_HW_PARAM_RATE, -1);
2367 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2368 snd_rme9652_hw_rule_rate_channels, rme9652,
2369 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2370 return 0;
2371}
2372
2373static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2374{
2375 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2376
2377 spin_lock_irq(&rme9652->lock);
2378
2379 rme9652->capture_pid = -1;
2380 rme9652->capture_substream = NULL;
2381
2382 spin_unlock_irq(&rme9652->lock);
2383 return 0;
2384}
2385
2386static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2387 .open = snd_rme9652_playback_open,
2388 .close = snd_rme9652_playback_release,
2389 .ioctl = snd_rme9652_ioctl,
2390 .hw_params = snd_rme9652_hw_params,
2391 .prepare = snd_rme9652_prepare,
2392 .trigger = snd_rme9652_trigger,
2393 .pointer = snd_rme9652_hw_pointer,
2394 .copy_user = snd_rme9652_playback_copy,
2395 .copy_kernel = snd_rme9652_playback_copy_kernel,
2396 .fill_silence = snd_rme9652_hw_silence,
2397};
2398
2399static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2400 .open = snd_rme9652_capture_open,
2401 .close = snd_rme9652_capture_release,
2402 .ioctl = snd_rme9652_ioctl,
2403 .hw_params = snd_rme9652_hw_params,
2404 .prepare = snd_rme9652_prepare,
2405 .trigger = snd_rme9652_trigger,
2406 .pointer = snd_rme9652_hw_pointer,
2407 .copy_user = snd_rme9652_capture_copy,
2408 .copy_kernel = snd_rme9652_capture_copy_kernel,
2409};
2410
2411static int snd_rme9652_create_pcm(struct snd_card *card,
2412 struct snd_rme9652 *rme9652)
2413{
2414 struct snd_pcm *pcm;
2415 int err;
2416
2417 if ((err = snd_pcm_new(card,
2418 rme9652->card_name,
2419 0, 1, 1, &pcm)) < 0) {
2420 return err;
2421 }
2422
2423 rme9652->pcm = pcm;
2424 pcm->private_data = rme9652;
2425 strcpy(pcm->name, rme9652->card_name);
2426
2427 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2428 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2429
2430 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2431
2432 return 0;
2433}
2434
2435static int snd_rme9652_create(struct snd_card *card,
2436 struct snd_rme9652 *rme9652,
2437 int precise_ptr)
2438{
2439 struct pci_dev *pci = rme9652->pci;
2440 int err;
2441 int status;
2442 unsigned short rev;
2443
2444 rme9652->irq = -1;
2445 rme9652->card = card;
2446
2447 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2448
2449 switch (rev & 0xff) {
2450 case 3:
2451 case 4:
2452 case 8:
2453 case 9:
2454 break;
2455
2456 default:
2457
2458 return -ENODEV;
2459 }
2460
2461 if ((err = pci_enable_device(pci)) < 0)
2462 return err;
2463
2464 spin_lock_init(&rme9652->lock);
2465
2466 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2467 return err;
2468 rme9652->port = pci_resource_start(pci, 0);
2469 rme9652->iobase = ioremap(rme9652->port, RME9652_IO_EXTENT);
2470 if (rme9652->iobase == NULL) {
2471 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2472 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2473 return -EBUSY;
2474 }
2475
2476 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2477 KBUILD_MODNAME, rme9652)) {
2478 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2479 return -EBUSY;
2480 }
2481 rme9652->irq = pci->irq;
2482 card->sync_irq = rme9652->irq;
2483 rme9652->precise_ptr = precise_ptr;
2484
2485
2486
2487
2488
2489
2490 status = rme9652_read(rme9652, RME9652_status_register);
2491 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2492 rme9652->hw_rev = 15;
2493 } else {
2494 rme9652->hw_rev = 11;
2495 }
2496
2497
2498
2499
2500
2501
2502
2503
2504 switch (rev) {
2505 case 8:
2506 strcpy(card->driver, "RME9636");
2507 if (rme9652->hw_rev == 15) {
2508 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2509 } else {
2510 rme9652->card_name = "RME Digi9636";
2511 }
2512 rme9652->ss_channels = RME9636_NCHANNELS;
2513 break;
2514 case 9:
2515 strcpy(card->driver, "RME9636");
2516 rme9652->card_name = "RME Digi9636 (Rev G)";
2517 rme9652->ss_channels = RME9636_NCHANNELS;
2518 break;
2519 case 4:
2520 strcpy(card->driver, "RME9652");
2521 rme9652->card_name = "RME Digi9652 (Rev G)";
2522 rme9652->ss_channels = RME9652_NCHANNELS;
2523 break;
2524 case 3:
2525 strcpy(card->driver, "RME9652");
2526 if (rme9652->hw_rev == 15) {
2527 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2528 } else {
2529 rme9652->card_name = "RME Digi9652";
2530 }
2531 rme9652->ss_channels = RME9652_NCHANNELS;
2532 break;
2533 }
2534
2535 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2536
2537 pci_set_master(rme9652->pci);
2538
2539 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2540 return err;
2541 }
2542
2543 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2544 return err;
2545 }
2546
2547 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2548 return err;
2549 }
2550
2551 snd_rme9652_proc_init(rme9652);
2552
2553 rme9652->last_spdif_sample_rate = -1;
2554 rme9652->last_adat_sample_rate = -1;
2555 rme9652->playback_pid = -1;
2556 rme9652->capture_pid = -1;
2557 rme9652->capture_substream = NULL;
2558 rme9652->playback_substream = NULL;
2559
2560 snd_rme9652_set_defaults(rme9652);
2561
2562 if (rme9652->hw_rev == 15) {
2563 rme9652_initialize_spdif_receiver (rme9652);
2564 }
2565
2566 return 0;
2567}
2568
2569static void snd_rme9652_card_free(struct snd_card *card)
2570{
2571 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2572
2573 if (rme9652)
2574 snd_rme9652_free(rme9652);
2575}
2576
2577static int snd_rme9652_probe(struct pci_dev *pci,
2578 const struct pci_device_id *pci_id)
2579{
2580 static int dev;
2581 struct snd_rme9652 *rme9652;
2582 struct snd_card *card;
2583 int err;
2584
2585 if (dev >= SNDRV_CARDS)
2586 return -ENODEV;
2587 if (!enable[dev]) {
2588 dev++;
2589 return -ENOENT;
2590 }
2591
2592 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2593 sizeof(struct snd_rme9652), &card);
2594
2595 if (err < 0)
2596 return err;
2597
2598 rme9652 = (struct snd_rme9652 *) card->private_data;
2599 card->private_free = snd_rme9652_card_free;
2600 rme9652->dev = dev;
2601 rme9652->pci = pci;
2602 err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2603 if (err)
2604 goto free_card;
2605
2606 strcpy(card->shortname, rme9652->card_name);
2607
2608 sprintf(card->longname, "%s at 0x%lx, irq %d",
2609 card->shortname, rme9652->port, rme9652->irq);
2610 err = snd_card_register(card);
2611 if (err) {
2612free_card:
2613 snd_card_free(card);
2614 return err;
2615 }
2616 pci_set_drvdata(pci, card);
2617 dev++;
2618 return 0;
2619}
2620
2621static void snd_rme9652_remove(struct pci_dev *pci)
2622{
2623 snd_card_free(pci_get_drvdata(pci));
2624}
2625
2626static struct pci_driver rme9652_driver = {
2627 .name = KBUILD_MODNAME,
2628 .id_table = snd_rme9652_ids,
2629 .probe = snd_rme9652_probe,
2630 .remove = snd_rme9652_remove,
2631};
2632
2633module_pci_driver(rme9652_driver);
2634