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12#ifndef _ASM_S390_AP_H_
13#define _ASM_S390_AP_H_
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21typedef unsigned int ap_qid_t;
22
23#define AP_MKQID(_card, _queue) (((_card) & 0xff) << 8 | ((_queue) & 0xff))
24#define AP_QID_CARD(_qid) (((_qid) >> 8) & 0xff)
25#define AP_QID_QUEUE(_qid) ((_qid) & 0xff)
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39struct ap_queue_status {
40 unsigned int queue_empty : 1;
41 unsigned int replies_waiting : 1;
42 unsigned int queue_full : 1;
43 unsigned int _pad1 : 4;
44 unsigned int irq_enabled : 1;
45 unsigned int response_code : 8;
46 unsigned int _pad2 : 16;
47};
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54static inline bool ap_instructions_available(void)
55{
56 register unsigned long reg0 asm ("0") = AP_MKQID(0, 0);
57 register unsigned long reg1 asm ("1") = 0;
58 register unsigned long reg2 asm ("2") = 0;
59
60 asm volatile(
61 " .long 0xb2af0000\n"
62 "0: la %0,1\n"
63 "1:\n"
64 EX_TABLE(0b, 1b)
65 : "+d" (reg1), "+d" (reg2)
66 : "d" (reg0)
67 : "cc");
68 return reg1 != 0;
69}
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78static inline struct ap_queue_status ap_tapq(ap_qid_t qid, unsigned long *info)
79{
80 register unsigned long reg0 asm ("0") = qid;
81 register struct ap_queue_status reg1 asm ("1");
82 register unsigned long reg2 asm ("2");
83
84 asm volatile(".long 0xb2af0000"
85 : "=d" (reg1), "=d" (reg2)
86 : "d" (reg0)
87 : "cc");
88 if (info)
89 *info = reg2;
90 return reg1;
91}
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101static inline struct ap_queue_status ap_test_queue(ap_qid_t qid,
102 int tbit,
103 unsigned long *info)
104{
105 if (tbit)
106 qid |= 1UL << 23;
107 return ap_tapq(qid, info);
108}
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116static inline struct ap_queue_status ap_rapq(ap_qid_t qid)
117{
118 register unsigned long reg0 asm ("0") = qid | (1UL << 24);
119 register struct ap_queue_status reg1 asm ("1");
120
121 asm volatile(
122 ".long 0xb2af0000"
123 : "=d" (reg1)
124 : "d" (reg0)
125 : "cc");
126 return reg1;
127}
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134
135static inline struct ap_queue_status ap_zapq(ap_qid_t qid)
136{
137 register unsigned long reg0 asm ("0") = qid | (2UL << 24);
138 register struct ap_queue_status reg1 asm ("1");
139
140 asm volatile(
141 ".long 0xb2af0000"
142 : "=d" (reg1)
143 : "d" (reg0)
144 : "cc");
145 return reg1;
146}
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151
152struct ap_config_info {
153 unsigned int apsc : 1;
154 unsigned int apxa : 1;
155 unsigned int qact : 1;
156 unsigned int rc8a : 1;
157 unsigned char _reserved1 : 4;
158 unsigned char _reserved2[3];
159 unsigned char Na;
160 unsigned char Nd;
161 unsigned char _reserved3[10];
162 unsigned int apm[8];
163 unsigned int aqm[8];
164 unsigned int adm[8];
165 unsigned char _reserved4[16];
166} __aligned(8);
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172
173static inline int ap_qci(struct ap_config_info *config)
174{
175 register unsigned long reg0 asm ("0") = 4UL << 24;
176 register unsigned long reg1 asm ("1") = -EOPNOTSUPP;
177 register struct ap_config_info *reg2 asm ("2") = config;
178
179 asm volatile(
180 ".long 0xb2af0000\n"
181 "0: la %0,0\n"
182 "1:\n"
183 EX_TABLE(0b, 1b)
184 : "+d" (reg1)
185 : "d" (reg0), "d" (reg2)
186 : "cc", "memory");
187
188 return reg1;
189}
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197struct ap_qirq_ctrl {
198 unsigned int _res1 : 8;
199 unsigned int zone : 8;
200 unsigned int ir : 1;
201 unsigned int _res2 : 4;
202 unsigned int gisc : 3;
203 unsigned int _res3 : 6;
204 unsigned int gf : 2;
205 unsigned int _res4 : 1;
206 unsigned int gisa : 27;
207 unsigned int _res5 : 1;
208 unsigned int isc : 3;
209};
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219static inline struct ap_queue_status ap_aqic(ap_qid_t qid,
220 struct ap_qirq_ctrl qirqctrl,
221 void *ind)
222{
223 register unsigned long reg0 asm ("0") = qid | (3UL << 24);
224 register union {
225 unsigned long value;
226 struct ap_qirq_ctrl qirqctrl;
227 struct ap_queue_status status;
228 } reg1 asm ("1");
229 register void *reg2 asm ("2") = ind;
230
231 reg1.qirqctrl = qirqctrl;
232
233 asm volatile(
234 ".long 0xb2af0000"
235 : "+d" (reg1)
236 : "d" (reg0), "d" (reg2)
237 : "cc");
238
239 return reg1.status;
240}
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246
247union ap_qact_ap_info {
248 unsigned long val;
249 struct {
250 unsigned int : 3;
251 unsigned int mode : 3;
252 unsigned int : 26;
253 unsigned int cat : 8;
254 unsigned int : 8;
255 unsigned char ver[2];
256 };
257};
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268static inline struct ap_queue_status ap_qact(ap_qid_t qid, int ifbit,
269 union ap_qact_ap_info *apinfo)
270{
271 register unsigned long reg0 asm ("0") = qid | (5UL << 24)
272 | ((ifbit & 0x01) << 22);
273 register union {
274 unsigned long value;
275 struct ap_queue_status status;
276 } reg1 asm ("1");
277 register unsigned long reg2 asm ("2");
278
279 reg1.value = apinfo->val;
280
281 asm volatile(
282 ".long 0xb2af0000"
283 : "+d" (reg1), "=d" (reg2)
284 : "d" (reg0)
285 : "cc");
286 apinfo->val = reg2;
287 return reg1.status;
288}
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302static inline struct ap_queue_status ap_nqap(ap_qid_t qid,
303 unsigned long long psmid,
304 void *msg, size_t length)
305{
306 register unsigned long reg0 asm ("0") = qid | 0x40000000UL;
307 register struct ap_queue_status reg1 asm ("1");
308 register unsigned long reg2 asm ("2") = (unsigned long) msg;
309 register unsigned long reg3 asm ("3") = (unsigned long) length;
310 register unsigned long reg4 asm ("4") = (unsigned int) (psmid >> 32);
311 register unsigned long reg5 asm ("5") = psmid & 0xffffffff;
312
313 asm volatile (
314 "0: .long 0xb2ad0042\n"
315 " brc 2,0b"
316 : "+d" (reg0), "=d" (reg1), "+d" (reg2), "+d" (reg3)
317 : "d" (reg4), "d" (reg5)
318 : "cc", "memory");
319 return reg1;
320}
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340static inline struct ap_queue_status ap_dqap(ap_qid_t qid,
341 unsigned long long *psmid,
342 void *msg, size_t length)
343{
344 register unsigned long reg0 asm("0") = qid | 0x80000000UL;
345 register struct ap_queue_status reg1 asm ("1");
346 register unsigned long reg2 asm("2") = 0UL;
347 register unsigned long reg4 asm("4") = (unsigned long) msg;
348 register unsigned long reg5 asm("5") = (unsigned long) length;
349 register unsigned long reg6 asm("6") = 0UL;
350 register unsigned long reg7 asm("7") = 0UL;
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352
353 asm volatile(
354 "0: .long 0xb2ae0064\n"
355 " brc 6,0b\n"
356 : "+d" (reg0), "=d" (reg1), "+d" (reg2),
357 "+d" (reg4), "+d" (reg5), "+d" (reg6), "+d" (reg7)
358 : : "cc", "memory");
359 *psmid = (((unsigned long long) reg6) << 32) + reg7;
360 return reg1;
361}
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368#if IS_ENABLED(CONFIG_ZCRYPT)
369void ap_bus_cfg_chg(void);
370#else
371static inline void ap_bus_cfg_chg(void){};
372#endif
373
374#endif
375