LXR linux/arch/sh/kernel/cpu/irq/ipr.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Interrupt handling for IPR-based IRQ.
   4 *
   5 * Copyright (C) 1999  Niibe Yutaka & Takeshi Yaegashi
   6 * Copyright (C) 2000  Kazumoto Kojima
   7 * Copyright (C) 2003  Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
   8 * Copyright (C) 2006  Paul Mundt
   9 *
  10 * Supported system:
  11 *      On-chip supporting modules (TMU, RTC, etc.).
  12 *      On-chip supporting modules for SH7709/SH7709A/SH7729.
  13 *      Hitachi SolutionEngine external I/O:
  14 *              MS7709SE01, MS7709ASE01, and MS7750SE01
  15 */
  16#include <linux/init.h>
  17#include <linux/interrupt.h>
  18#include <linux/io.h>
  19#include <linux/irq.h>
  20#include <linux/kernel.h>
  21#include <linux/module.h>
  22#include <linux/topology.h>
  23
  24static inline struct ipr_desc *get_ipr_desc(struct irq_data *data)
  25{
  26        struct irq_chip *chip = irq_data_get_irq_chip(data);
  27        return container_of(chip, struct ipr_desc, chip);
  28}
  29
  30static void disable_ipr_irq(struct irq_data *data)
  31{
  32        struct ipr_data *p = irq_data_get_irq_chip_data(data);
  33        unsigned long addr = get_ipr_desc(data)->ipr_offsets[p->ipr_idx];
  34        /* Set the priority in IPR to 0 */
  35        __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
  36        (void)__raw_readw(addr);        /* Read back to flush write posting */
  37}
  38
  39static void enable_ipr_irq(struct irq_data *data)
  40{
  41        struct ipr_data *p = irq_data_get_irq_chip_data(data);
  42        unsigned long addr = get_ipr_desc(data)->ipr_offsets[p->ipr_idx];
  43        /* Set priority in IPR back to original value */
  44        __raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);
  45}
  46
  47/*
  48 * The shift value is now the number of bits to shift, not the number of
  49 * bits/4. This is to make it easier to read the value directly from the
  50 * datasheets. The IPR address is calculated using the ipr_offset table.
  51 */
  52void register_ipr_controller(struct ipr_desc *desc)
  53{
  54        int i;
  55
  56        desc->chip.irq_mask = disable_ipr_irq;
  57        desc->chip.irq_unmask = enable_ipr_irq;
  58
  59        for (i = 0; i < desc->nr_irqs; i++) {
  60                struct ipr_data *p = desc->ipr_data + i;
  61                int res;
  62
  63                BUG_ON(p->ipr_idx >= desc->nr_offsets);
  64                BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
  65
  66                res = irq_alloc_desc_at(p->irq, numa_node_id());
  67                if (unlikely(res != p->irq && res != -EEXIST)) {
  68                        printk(KERN_INFO "can not get irq_desc for %d\n",
  69                               p->irq);
  70                        continue;
  71                }
  72
  73                disable_irq_nosync(p->irq);
  74                irq_set_chip_and_handler_name(p->irq, &desc->chip,
  75                                              handle_level_irq, "level");
  76                irq_set_chip_data(p->irq, p);
  77                disable_ipr_irq(irq_get_irq_data(p->irq));
  78        }
  79}
  80EXPORT_SYMBOL(register_ipr_controller);
  81