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6#include <linux/completion.h>
7#include <linux/delay.h>
8#include <linux/genalloc.h>
9#include <linux/io.h>
10#include <linux/kfifo.h>
11#include <linux/kthread.h>
12#include <linux/module.h>
13#include <linux/mutex.h>
14#include <linux/of.h>
15#include <linux/of_platform.h>
16#include <linux/platform_device.h>
17#include <linux/slab.h>
18#include <linux/spinlock.h>
19#include <linux/firmware/intel/stratix10-smc.h>
20#include <linux/firmware/intel/stratix10-svc-client.h>
21#include <linux/types.h>
22
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33
34
35
36#define SVC_NUM_DATA_IN_FIFO 32
37#define SVC_NUM_CHANNEL 2
38#define FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS 200
39#define FPGA_CONFIG_STATUS_TIMEOUT_SEC 30
40
41
42#define STRATIX10_RSU "stratix10-rsu"
43
44typedef void (svc_invoke_fn)(unsigned long, unsigned long, unsigned long,
45 unsigned long, unsigned long, unsigned long,
46 unsigned long, unsigned long,
47 struct arm_smccc_res *);
48struct stratix10_svc_chan;
49
50
51
52
53
54struct stratix10_svc {
55 struct platform_device *stratix10_svc_rsu;
56};
57
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70
71
72struct stratix10_svc_sh_memory {
73 struct completion sync_complete;
74 unsigned long addr;
75 unsigned long size;
76 svc_invoke_fn *invoke_fn;
77};
78
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87
88
89
90struct stratix10_svc_data_mem {
91 void *vaddr;
92 phys_addr_t paddr;
93 size_t size;
94 struct list_head node;
95};
96
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106
107
108struct stratix10_svc_data {
109 struct stratix10_svc_chan *chan;
110 phys_addr_t paddr;
111 size_t size;
112 u32 command;
113 u32 flag;
114 u64 arg[3];
115};
116
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132
133
134struct stratix10_svc_controller {
135 struct device *dev;
136 struct stratix10_svc_chan *chans;
137 int num_chans;
138 int num_active_client;
139 struct list_head node;
140 struct gen_pool *genpool;
141 struct task_struct *task;
142 struct kfifo svc_fifo;
143 struct completion complete_status;
144 spinlock_t svc_fifo_lock;
145 svc_invoke_fn *invoke_fn;
146};
147
148
149
150
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152
153
154
155
156
157
158struct stratix10_svc_chan {
159 struct stratix10_svc_controller *ctrl;
160 struct stratix10_svc_client *scl;
161 char *name;
162 spinlock_t lock;
163};
164
165static LIST_HEAD(svc_ctrl);
166static LIST_HEAD(svc_data_mem);
167
168
169
170
171
172
173
174
175static void *svc_pa_to_va(unsigned long addr)
176{
177 struct stratix10_svc_data_mem *pmem;
178
179 pr_debug("claim back P-addr=0x%016x\n", (unsigned int)addr);
180 list_for_each_entry(pmem, &svc_data_mem, node)
181 if (pmem->paddr == addr)
182 return pmem->vaddr;
183
184
185 return NULL;
186}
187
188
189
190
191
192
193
194
195
196
197static void svc_thread_cmd_data_claim(struct stratix10_svc_controller *ctrl,
198 struct stratix10_svc_data *p_data,
199 struct stratix10_svc_cb_data *cb_data)
200{
201 struct arm_smccc_res res;
202 unsigned long timeout;
203
204 reinit_completion(&ctrl->complete_status);
205 timeout = msecs_to_jiffies(FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS);
206
207 pr_debug("%s: claim back the submitted buffer\n", __func__);
208 do {
209 ctrl->invoke_fn(INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE,
210 0, 0, 0, 0, 0, 0, 0, &res);
211
212 if (res.a0 == INTEL_SIP_SMC_STATUS_OK) {
213 if (!res.a1) {
214 complete(&ctrl->complete_status);
215 break;
216 }
217 cb_data->status = BIT(SVC_STATUS_RECONFIG_BUFFER_DONE);
218 cb_data->kaddr1 = svc_pa_to_va(res.a1);
219 cb_data->kaddr2 = (res.a2) ?
220 svc_pa_to_va(res.a2) : NULL;
221 cb_data->kaddr3 = (res.a3) ?
222 svc_pa_to_va(res.a3) : NULL;
223 p_data->chan->scl->receive_cb(p_data->chan->scl,
224 cb_data);
225 } else {
226 pr_debug("%s: secure world busy, polling again\n",
227 __func__);
228 }
229 } while (res.a0 == INTEL_SIP_SMC_STATUS_OK ||
230 res.a0 == INTEL_SIP_SMC_FPGA_CONFIG_STATUS_BUSY ||
231 wait_for_completion_timeout(&ctrl->complete_status, timeout));
232}
233
234
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237
238
239
240
241
242
243static void svc_thread_cmd_config_status(struct stratix10_svc_controller *ctrl,
244 struct stratix10_svc_data *p_data,
245 struct stratix10_svc_cb_data *cb_data)
246{
247 struct arm_smccc_res res;
248 int count_in_sec;
249
250 cb_data->kaddr1 = NULL;
251 cb_data->kaddr2 = NULL;
252 cb_data->kaddr3 = NULL;
253 cb_data->status = BIT(SVC_STATUS_RECONFIG_ERROR);
254
255 pr_debug("%s: polling config status\n", __func__);
256
257 count_in_sec = FPGA_CONFIG_STATUS_TIMEOUT_SEC;
258 while (count_in_sec) {
259 ctrl->invoke_fn(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE,
260 0, 0, 0, 0, 0, 0, 0, &res);
261 if ((res.a0 == INTEL_SIP_SMC_STATUS_OK) ||
262 (res.a0 == INTEL_SIP_SMC_FPGA_CONFIG_STATUS_ERROR))
263 break;
264
265
266
267
268
269 msleep(1000);
270 count_in_sec--;
271 }
272
273 if (res.a0 == INTEL_SIP_SMC_STATUS_OK && count_in_sec)
274 cb_data->status = BIT(SVC_STATUS_RECONFIG_COMPLETED);
275
276 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data);
277}
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284
285
286
287static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data,
288 struct stratix10_svc_cb_data *cb_data,
289 struct arm_smccc_res res)
290{
291 cb_data->kaddr1 = NULL;
292 cb_data->kaddr2 = NULL;
293 cb_data->kaddr3 = NULL;
294
295 switch (p_data->command) {
296 case COMMAND_RECONFIG:
297 cb_data->status = BIT(SVC_STATUS_RECONFIG_REQUEST_OK);
298 break;
299 case COMMAND_RECONFIG_DATA_SUBMIT:
300 cb_data->status = BIT(SVC_STATUS_RECONFIG_BUFFER_SUBMITTED);
301 break;
302 case COMMAND_NOOP:
303 cb_data->status = BIT(SVC_STATUS_RECONFIG_BUFFER_SUBMITTED);
304 cb_data->kaddr1 = svc_pa_to_va(res.a1);
305 break;
306 case COMMAND_RECONFIG_STATUS:
307 cb_data->status = BIT(SVC_STATUS_RECONFIG_COMPLETED);
308 break;
309 case COMMAND_RSU_UPDATE:
310 case COMMAND_RSU_NOTIFY:
311 cb_data->status = BIT(SVC_STATUS_RSU_OK);
312 break;
313 case COMMAND_RSU_RETRY:
314 cb_data->status = BIT(SVC_STATUS_RSU_OK);
315 cb_data->kaddr1 = &res.a1;
316 break;
317 default:
318 pr_warn("it shouldn't happen\n");
319 break;
320 }
321
322 pr_debug("%s: call receive_cb\n", __func__);
323 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data);
324}
325
326
327
328
329
330
331
332
333
334
335
336static int svc_normal_to_secure_thread(void *data)
337{
338 struct stratix10_svc_controller
339 *ctrl = (struct stratix10_svc_controller *)data;
340 struct stratix10_svc_data *pdata;
341 struct stratix10_svc_cb_data *cbdata;
342 struct arm_smccc_res res;
343 unsigned long a0, a1, a2;
344 int ret_fifo = 0;
345
346 pdata = kmalloc(sizeof(*pdata), GFP_KERNEL);
347 if (!pdata)
348 return -ENOMEM;
349
350 cbdata = kmalloc(sizeof(*cbdata), GFP_KERNEL);
351 if (!cbdata) {
352 kfree(pdata);
353 return -ENOMEM;
354 }
355
356
357 a0 = INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK;
358 a1 = 0;
359 a2 = 0;
360
361 pr_debug("smc_hvc_shm_thread is running\n");
362
363 while (!kthread_should_stop()) {
364 ret_fifo = kfifo_out_spinlocked(&ctrl->svc_fifo,
365 pdata, sizeof(*pdata),
366 &ctrl->svc_fifo_lock);
367
368 if (!ret_fifo)
369 continue;
370
371 pr_debug("get from FIFO pa=0x%016x, command=%u, size=%u\n",
372 (unsigned int)pdata->paddr, pdata->command,
373 (unsigned int)pdata->size);
374
375 switch (pdata->command) {
376 case COMMAND_RECONFIG_DATA_CLAIM:
377 svc_thread_cmd_data_claim(ctrl, pdata, cbdata);
378 continue;
379 case COMMAND_RECONFIG:
380 a0 = INTEL_SIP_SMC_FPGA_CONFIG_START;
381 pr_debug("conf_type=%u\n", (unsigned int)pdata->flag);
382 a1 = pdata->flag;
383 a2 = 0;
384 break;
385 case COMMAND_RECONFIG_DATA_SUBMIT:
386 a0 = INTEL_SIP_SMC_FPGA_CONFIG_WRITE;
387 a1 = (unsigned long)pdata->paddr;
388 a2 = (unsigned long)pdata->size;
389 break;
390 case COMMAND_RECONFIG_STATUS:
391 a0 = INTEL_SIP_SMC_FPGA_CONFIG_ISDONE;
392 a1 = 0;
393 a2 = 0;
394 break;
395 case COMMAND_RSU_STATUS:
396 a0 = INTEL_SIP_SMC_RSU_STATUS;
397 a1 = 0;
398 a2 = 0;
399 break;
400 case COMMAND_RSU_UPDATE:
401 a0 = INTEL_SIP_SMC_RSU_UPDATE;
402 a1 = pdata->arg[0];
403 a2 = 0;
404 break;
405 case COMMAND_RSU_NOTIFY:
406 a0 = INTEL_SIP_SMC_RSU_NOTIFY;
407 a1 = pdata->arg[0];
408 a2 = 0;
409 break;
410 case COMMAND_RSU_RETRY:
411 a0 = INTEL_SIP_SMC_RSU_RETRY_COUNTER;
412 a1 = 0;
413 a2 = 0;
414 break;
415 default:
416 pr_warn("it shouldn't happen\n");
417 break;
418 }
419 pr_debug("%s: before SMC call -- a0=0x%016x a1=0x%016x",
420 __func__, (unsigned int)a0, (unsigned int)a1);
421 pr_debug(" a2=0x%016x\n", (unsigned int)a2);
422
423 ctrl->invoke_fn(a0, a1, a2, 0, 0, 0, 0, 0, &res);
424
425 pr_debug("%s: after SMC call -- res.a0=0x%016x",
426 __func__, (unsigned int)res.a0);
427 pr_debug(" res.a1=0x%016x, res.a2=0x%016x",
428 (unsigned int)res.a1, (unsigned int)res.a2);
429 pr_debug(" res.a3=0x%016x\n", (unsigned int)res.a3);
430
431 if (pdata->command == COMMAND_RSU_STATUS) {
432 if (res.a0 == INTEL_SIP_SMC_RSU_ERROR)
433 cbdata->status = BIT(SVC_STATUS_RSU_ERROR);
434 else
435 cbdata->status = BIT(SVC_STATUS_RSU_OK);
436
437 cbdata->kaddr1 = &res;
438 cbdata->kaddr2 = NULL;
439 cbdata->kaddr3 = NULL;
440 pdata->chan->scl->receive_cb(pdata->chan->scl, cbdata);
441 continue;
442 }
443
444 switch (res.a0) {
445 case INTEL_SIP_SMC_STATUS_OK:
446 svc_thread_recv_status_ok(pdata, cbdata, res);
447 break;
448 case INTEL_SIP_SMC_FPGA_CONFIG_STATUS_BUSY:
449 switch (pdata->command) {
450 case COMMAND_RECONFIG_DATA_SUBMIT:
451 svc_thread_cmd_data_claim(ctrl,
452 pdata, cbdata);
453 break;
454 case COMMAND_RECONFIG_STATUS:
455 svc_thread_cmd_config_status(ctrl,
456 pdata, cbdata);
457 break;
458 default:
459 pr_warn("it shouldn't happen\n");
460 break;
461 }
462 break;
463 case INTEL_SIP_SMC_FPGA_CONFIG_STATUS_REJECTED:
464 pr_debug("%s: STATUS_REJECTED\n", __func__);
465 break;
466 case INTEL_SIP_SMC_FPGA_CONFIG_STATUS_ERROR:
467 case INTEL_SIP_SMC_RSU_ERROR:
468 pr_err("%s: STATUS_ERROR\n", __func__);
469 switch (pdata->command) {
470
471 case COMMAND_RECONFIG_DATA_CLAIM:
472 case COMMAND_RECONFIG:
473 case COMMAND_RECONFIG_DATA_SUBMIT:
474 case COMMAND_RECONFIG_STATUS:
475 cbdata->status =
476 BIT(SVC_STATUS_RECONFIG_ERROR);
477 break;
478
479
480 case COMMAND_RSU_STATUS:
481 case COMMAND_RSU_UPDATE:
482 case COMMAND_RSU_NOTIFY:
483 case COMMAND_RSU_RETRY:
484 cbdata->status =
485 BIT(SVC_STATUS_RSU_ERROR);
486 break;
487 }
488
489 cbdata->status = BIT(SVC_STATUS_RECONFIG_ERROR);
490 cbdata->kaddr1 = NULL;
491 cbdata->kaddr2 = NULL;
492 cbdata->kaddr3 = NULL;
493 pdata->chan->scl->receive_cb(pdata->chan->scl, cbdata);
494 break;
495 default:
496 pr_warn("Secure firmware doesn't support...\n");
497
498
499
500
501
502 if ((pdata->command == COMMAND_RSU_RETRY) ||
503 (pdata->command == COMMAND_RSU_NOTIFY)) {
504 cbdata->status =
505 BIT(SVC_STATUS_RSU_NO_SUPPORT);
506 cbdata->kaddr1 = NULL;
507 cbdata->kaddr2 = NULL;
508 cbdata->kaddr3 = NULL;
509 pdata->chan->scl->receive_cb(
510 pdata->chan->scl, cbdata);
511 }
512 break;
513
514 }
515 }
516
517 kfree(cbdata);
518 kfree(pdata);
519
520 return 0;
521}
522
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534
535
536static int svc_normal_to_secure_shm_thread(void *data)
537{
538 struct stratix10_svc_sh_memory
539 *sh_mem = (struct stratix10_svc_sh_memory *)data;
540 struct arm_smccc_res res;
541
542
543 sh_mem->invoke_fn(INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM,
544 0, 0, 0, 0, 0, 0, 0, &res);
545 if (res.a0 == INTEL_SIP_SMC_STATUS_OK) {
546 sh_mem->addr = res.a1;
547 sh_mem->size = res.a2;
548 } else {
549 pr_err("%s: after SMC call -- res.a0=0x%016x", __func__,
550 (unsigned int)res.a0);
551 sh_mem->addr = 0;
552 sh_mem->size = 0;
553 }
554
555 complete(&sh_mem->sync_complete);
556 do_exit(0);
557}
558
559
560
561
562
563
564
565
566
567static int svc_get_sh_memory(struct platform_device *pdev,
568 struct stratix10_svc_sh_memory *sh_memory)
569{
570 struct device *dev = &pdev->dev;
571 struct task_struct *sh_memory_task;
572 unsigned int cpu = 0;
573
574 init_completion(&sh_memory->sync_complete);
575
576
577 sh_memory_task = kthread_create_on_node(svc_normal_to_secure_shm_thread,
578 (void *)sh_memory,
579 cpu_to_node(cpu),
580 "svc_smc_hvc_shm_thread");
581 if (IS_ERR(sh_memory_task)) {
582 dev_err(dev, "fail to create stratix10_svc_smc_shm_thread\n");
583 return -EINVAL;
584 }
585
586 wake_up_process(sh_memory_task);
587
588 if (!wait_for_completion_timeout(&sh_memory->sync_complete, 10 * HZ)) {
589 dev_err(dev,
590 "timeout to get sh-memory paras from secure world\n");
591 return -ETIMEDOUT;
592 }
593
594 if (!sh_memory->addr || !sh_memory->size) {
595 dev_err(dev,
596 "failed to get shared memory info from secure world\n");
597 return -ENOMEM;
598 }
599
600 dev_dbg(dev, "SM software provides paddr: 0x%016x, size: 0x%08x\n",
601 (unsigned int)sh_memory->addr,
602 (unsigned int)sh_memory->size);
603
604 return 0;
605}
606
607
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609
610
611
612
613
614static struct gen_pool *
615svc_create_memory_pool(struct platform_device *pdev,
616 struct stratix10_svc_sh_memory *sh_memory)
617{
618 struct device *dev = &pdev->dev;
619 struct gen_pool *genpool;
620 unsigned long vaddr;
621 phys_addr_t paddr;
622 size_t size;
623 phys_addr_t begin;
624 phys_addr_t end;
625 void *va;
626 size_t page_mask = PAGE_SIZE - 1;
627 int min_alloc_order = 3;
628 int ret;
629
630 begin = roundup(sh_memory->addr, PAGE_SIZE);
631 end = rounddown(sh_memory->addr + sh_memory->size, PAGE_SIZE);
632 paddr = begin;
633 size = end - begin;
634 va = memremap(paddr, size, MEMREMAP_WC);
635 if (!va) {
636 dev_err(dev, "fail to remap shared memory\n");
637 return ERR_PTR(-EINVAL);
638 }
639 vaddr = (unsigned long)va;
640 dev_dbg(dev,
641 "reserved memory vaddr: %p, paddr: 0x%16x size: 0x%8x\n",
642 va, (unsigned int)paddr, (unsigned int)size);
643 if ((vaddr & page_mask) || (paddr & page_mask) ||
644 (size & page_mask)) {
645 dev_err(dev, "page is not aligned\n");
646 return ERR_PTR(-EINVAL);
647 }
648 genpool = gen_pool_create(min_alloc_order, -1);
649 if (!genpool) {
650 dev_err(dev, "fail to create genpool\n");
651 return ERR_PTR(-ENOMEM);
652 }
653 gen_pool_set_algo(genpool, gen_pool_best_fit, NULL);
654 ret = gen_pool_add_virt(genpool, vaddr, paddr, size, -1);
655 if (ret) {
656 dev_err(dev, "fail to add memory chunk to the pool\n");
657 gen_pool_destroy(genpool);
658 return ERR_PTR(ret);
659 }
660
661 return genpool;
662}
663
664
665
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674
675
676static void svc_smccc_smc(unsigned long a0, unsigned long a1,
677 unsigned long a2, unsigned long a3,
678 unsigned long a4, unsigned long a5,
679 unsigned long a6, unsigned long a7,
680 struct arm_smccc_res *res)
681{
682 arm_smccc_smc(a0, a1, a2, a3, a4, a5, a6, a7, res);
683}
684
685
686
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695
696
697static void svc_smccc_hvc(unsigned long a0, unsigned long a1,
698 unsigned long a2, unsigned long a3,
699 unsigned long a4, unsigned long a5,
700 unsigned long a6, unsigned long a7,
701 struct arm_smccc_res *res)
702{
703 arm_smccc_hvc(a0, a1, a2, a3, a4, a5, a6, a7, res);
704}
705
706
707
708
709
710
711
712static svc_invoke_fn *get_invoke_func(struct device *dev)
713{
714 const char *method;
715
716 if (of_property_read_string(dev->of_node, "method", &method)) {
717 dev_warn(dev, "missing \"method\" property\n");
718 return ERR_PTR(-ENXIO);
719 }
720
721 if (!strcmp(method, "smc"))
722 return svc_smccc_smc;
723 if (!strcmp(method, "hvc"))
724 return svc_smccc_hvc;
725
726 dev_warn(dev, "invalid \"method\" property: %s\n", method);
727
728 return ERR_PTR(-EINVAL);
729}
730
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738
739
740
741struct stratix10_svc_chan *stratix10_svc_request_channel_byname(
742 struct stratix10_svc_client *client, const char *name)
743{
744 struct device *dev = client->dev;
745 struct stratix10_svc_controller *controller;
746 struct stratix10_svc_chan *chan = NULL;
747 unsigned long flag;
748 int i;
749
750
751 if (list_empty(&svc_ctrl))
752 return ERR_PTR(-EPROBE_DEFER);
753
754 controller = list_first_entry(&svc_ctrl,
755 struct stratix10_svc_controller, node);
756 for (i = 0; i < SVC_NUM_CHANNEL; i++) {
757 if (!strcmp(controller->chans[i].name, name)) {
758 chan = &controller->chans[i];
759 break;
760 }
761 }
762
763
764 if (i == SVC_NUM_CHANNEL) {
765 dev_err(dev, "%s: channel not allocated\n", __func__);
766 return ERR_PTR(-EINVAL);
767 }
768
769 if (chan->scl || !try_module_get(controller->dev->driver->owner)) {
770 dev_dbg(dev, "%s: svc not free\n", __func__);
771 return ERR_PTR(-EBUSY);
772 }
773
774 spin_lock_irqsave(&chan->lock, flag);
775 chan->scl = client;
776 chan->ctrl->num_active_client++;
777 spin_unlock_irqrestore(&chan->lock, flag);
778
779 return chan;
780}
781EXPORT_SYMBOL_GPL(stratix10_svc_request_channel_byname);
782
783
784
785
786
787
788
789void stratix10_svc_free_channel(struct stratix10_svc_chan *chan)
790{
791 unsigned long flag;
792
793 spin_lock_irqsave(&chan->lock, flag);
794 chan->scl = NULL;
795 chan->ctrl->num_active_client--;
796 module_put(chan->ctrl->dev->driver->owner);
797 spin_unlock_irqrestore(&chan->lock, flag);
798}
799EXPORT_SYMBOL_GPL(stratix10_svc_free_channel);
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810
811
812int stratix10_svc_send(struct stratix10_svc_chan *chan, void *msg)
813{
814 struct stratix10_svc_client_msg
815 *p_msg = (struct stratix10_svc_client_msg *)msg;
816 struct stratix10_svc_data_mem *p_mem;
817 struct stratix10_svc_data *p_data;
818 int ret = 0;
819 unsigned int cpu = 0;
820
821 p_data = kzalloc(sizeof(*p_data), GFP_KERNEL);
822 if (!p_data)
823 return -ENOMEM;
824
825
826 if (!chan->ctrl->task) {
827 chan->ctrl->task =
828 kthread_create_on_node(svc_normal_to_secure_thread,
829 (void *)chan->ctrl,
830 cpu_to_node(cpu),
831 "svc_smc_hvc_thread");
832 if (IS_ERR(chan->ctrl->task)) {
833 dev_err(chan->ctrl->dev,
834 "failed to create svc_smc_hvc_thread\n");
835 kfree(p_data);
836 return -EINVAL;
837 }
838 kthread_bind(chan->ctrl->task, cpu);
839 wake_up_process(chan->ctrl->task);
840 }
841
842 pr_debug("%s: sent P-va=%p, P-com=%x, P-size=%u\n", __func__,
843 p_msg->payload, p_msg->command,
844 (unsigned int)p_msg->payload_length);
845
846 if (list_empty(&svc_data_mem)) {
847 if (p_msg->command == COMMAND_RECONFIG) {
848 struct stratix10_svc_command_config_type *ct =
849 (struct stratix10_svc_command_config_type *)
850 p_msg->payload;
851 p_data->flag = ct->flags;
852 }
853 } else {
854 list_for_each_entry(p_mem, &svc_data_mem, node)
855 if (p_mem->vaddr == p_msg->payload) {
856 p_data->paddr = p_mem->paddr;
857 break;
858 }
859 }
860
861 p_data->command = p_msg->command;
862 p_data->arg[0] = p_msg->arg[0];
863 p_data->arg[1] = p_msg->arg[1];
864 p_data->arg[2] = p_msg->arg[2];
865 p_data->size = p_msg->payload_length;
866 p_data->chan = chan;
867 pr_debug("%s: put to FIFO pa=0x%016x, cmd=%x, size=%u\n", __func__,
868 (unsigned int)p_data->paddr, p_data->command,
869 (unsigned int)p_data->size);
870 ret = kfifo_in_spinlocked(&chan->ctrl->svc_fifo, p_data,
871 sizeof(*p_data),
872 &chan->ctrl->svc_fifo_lock);
873
874 kfree(p_data);
875
876 if (!ret)
877 return -ENOBUFS;
878
879 return 0;
880}
881EXPORT_SYMBOL_GPL(stratix10_svc_send);
882
883
884
885
886
887
888
889
890
891void stratix10_svc_done(struct stratix10_svc_chan *chan)
892{
893
894 if (chan->ctrl->task && chan->ctrl->num_active_client <= 1) {
895 pr_debug("svc_smc_hvc_shm_thread is stopped\n");
896 kthread_stop(chan->ctrl->task);
897 chan->ctrl->task = NULL;
898 }
899}
900EXPORT_SYMBOL_GPL(stratix10_svc_done);
901
902
903
904
905
906
907
908
909
910
911
912void *stratix10_svc_allocate_memory(struct stratix10_svc_chan *chan,
913 size_t size)
914{
915 struct stratix10_svc_data_mem *pmem;
916 unsigned long va;
917 phys_addr_t pa;
918 struct gen_pool *genpool = chan->ctrl->genpool;
919 size_t s = roundup(size, 1 << genpool->min_alloc_order);
920
921 pmem = devm_kzalloc(chan->ctrl->dev, sizeof(*pmem), GFP_KERNEL);
922 if (!pmem)
923 return ERR_PTR(-ENOMEM);
924
925 va = gen_pool_alloc(genpool, s);
926 if (!va)
927 return ERR_PTR(-ENOMEM);
928
929 memset((void *)va, 0, s);
930 pa = gen_pool_virt_to_phys(genpool, va);
931
932 pmem->vaddr = (void *)va;
933 pmem->paddr = pa;
934 pmem->size = s;
935 list_add_tail(&pmem->node, &svc_data_mem);
936 pr_debug("%s: va=%p, pa=0x%016x\n", __func__,
937 pmem->vaddr, (unsigned int)pmem->paddr);
938
939 return (void *)va;
940}
941EXPORT_SYMBOL_GPL(stratix10_svc_allocate_memory);
942
943
944
945
946
947
948
949
950void stratix10_svc_free_memory(struct stratix10_svc_chan *chan, void *kaddr)
951{
952 struct stratix10_svc_data_mem *pmem;
953 size_t size = 0;
954
955 list_for_each_entry(pmem, &svc_data_mem, node)
956 if (pmem->vaddr == kaddr) {
957 size = pmem->size;
958 break;
959 }
960
961 gen_pool_free(chan->ctrl->genpool, (unsigned long)kaddr, size);
962 pmem->vaddr = NULL;
963 list_del(&pmem->node);
964}
965EXPORT_SYMBOL_GPL(stratix10_svc_free_memory);
966
967static const struct of_device_id stratix10_svc_drv_match[] = {
968 {.compatible = "intel,stratix10-svc"},
969 {.compatible = "intel,agilex-svc"},
970 {},
971};
972
973static int stratix10_svc_drv_probe(struct platform_device *pdev)
974{
975 struct device *dev = &pdev->dev;
976 struct stratix10_svc_controller *controller;
977 struct stratix10_svc_chan *chans;
978 struct gen_pool *genpool;
979 struct stratix10_svc_sh_memory *sh_memory;
980 struct stratix10_svc *svc;
981
982 svc_invoke_fn *invoke_fn;
983 size_t fifo_size;
984 int ret;
985
986
987 invoke_fn = get_invoke_func(dev);
988 if (IS_ERR(invoke_fn))
989 return -EINVAL;
990
991 sh_memory = devm_kzalloc(dev, sizeof(*sh_memory), GFP_KERNEL);
992 if (!sh_memory)
993 return -ENOMEM;
994
995 sh_memory->invoke_fn = invoke_fn;
996 ret = svc_get_sh_memory(pdev, sh_memory);
997 if (ret)
998 return ret;
999
1000 genpool = svc_create_memory_pool(pdev, sh_memory);
1001 if (!genpool)
1002 return -ENOMEM;
1003
1004
1005 controller = devm_kzalloc(dev, sizeof(*controller), GFP_KERNEL);
1006 if (!controller)
1007 return -ENOMEM;
1008
1009 chans = devm_kmalloc_array(dev, SVC_NUM_CHANNEL,
1010 sizeof(*chans), GFP_KERNEL | __GFP_ZERO);
1011 if (!chans)
1012 return -ENOMEM;
1013
1014 controller->dev = dev;
1015 controller->num_chans = SVC_NUM_CHANNEL;
1016 controller->num_active_client = 0;
1017 controller->chans = chans;
1018 controller->genpool = genpool;
1019 controller->task = NULL;
1020 controller->invoke_fn = invoke_fn;
1021 init_completion(&controller->complete_status);
1022
1023 fifo_size = sizeof(struct stratix10_svc_data) * SVC_NUM_DATA_IN_FIFO;
1024 ret = kfifo_alloc(&controller->svc_fifo, fifo_size, GFP_KERNEL);
1025 if (ret) {
1026 dev_err(dev, "failed to allocate FIFO\n");
1027 return ret;
1028 }
1029 spin_lock_init(&controller->svc_fifo_lock);
1030
1031 chans[0].scl = NULL;
1032 chans[0].ctrl = controller;
1033 chans[0].name = SVC_CLIENT_FPGA;
1034 spin_lock_init(&chans[0].lock);
1035
1036 chans[1].scl = NULL;
1037 chans[1].ctrl = controller;
1038 chans[1].name = SVC_CLIENT_RSU;
1039 spin_lock_init(&chans[1].lock);
1040
1041 list_add_tail(&controller->node, &svc_ctrl);
1042 platform_set_drvdata(pdev, controller);
1043
1044
1045 svc = devm_kzalloc(dev, sizeof(*svc), GFP_KERNEL);
1046 if (!svc)
1047 return -ENOMEM;
1048
1049 svc->stratix10_svc_rsu = platform_device_alloc(STRATIX10_RSU, 0);
1050 if (!svc->stratix10_svc_rsu) {
1051 dev_err(dev, "failed to allocate %s device\n", STRATIX10_RSU);
1052 return -ENOMEM;
1053 }
1054
1055 ret = platform_device_add(svc->stratix10_svc_rsu);
1056 if (ret) {
1057 platform_device_put(svc->stratix10_svc_rsu);
1058 return ret;
1059 }
1060 dev_set_drvdata(dev, svc);
1061
1062 pr_info("Intel Service Layer Driver Initialized\n");
1063
1064 return ret;
1065}
1066
1067static int stratix10_svc_drv_remove(struct platform_device *pdev)
1068{
1069 struct stratix10_svc *svc = dev_get_drvdata(&pdev->dev);
1070 struct stratix10_svc_controller *ctrl = platform_get_drvdata(pdev);
1071
1072 platform_device_unregister(svc->stratix10_svc_rsu);
1073
1074 kfifo_free(&ctrl->svc_fifo);
1075 if (ctrl->task) {
1076 kthread_stop(ctrl->task);
1077 ctrl->task = NULL;
1078 }
1079 if (ctrl->genpool)
1080 gen_pool_destroy(ctrl->genpool);
1081 list_del(&ctrl->node);
1082
1083 return 0;
1084}
1085
1086static struct platform_driver stratix10_svc_driver = {
1087 .probe = stratix10_svc_drv_probe,
1088 .remove = stratix10_svc_drv_remove,
1089 .driver = {
1090 .name = "stratix10-svc",
1091 .of_match_table = stratix10_svc_drv_match,
1092 },
1093};
1094
1095static int __init stratix10_svc_init(void)
1096{
1097 struct device_node *fw_np;
1098 struct device_node *np;
1099 int ret;
1100
1101 fw_np = of_find_node_by_name(NULL, "firmware");
1102 if (!fw_np)
1103 return -ENODEV;
1104
1105 np = of_find_matching_node(fw_np, stratix10_svc_drv_match);
1106 if (!np)
1107 return -ENODEV;
1108
1109 of_node_put(np);
1110 ret = of_platform_populate(fw_np, stratix10_svc_drv_match, NULL, NULL);
1111 if (ret)
1112 return ret;
1113
1114 return platform_driver_register(&stratix10_svc_driver);
1115}
1116
1117static void __exit stratix10_svc_exit(void)
1118{
1119 return platform_driver_unregister(&stratix10_svc_driver);
1120}
1121
1122subsys_initcall(stratix10_svc_init);
1123module_exit(stratix10_svc_exit);
1124
1125MODULE_LICENSE("GPL v2");
1126MODULE_DESCRIPTION("Intel Stratix10 Service Layer Driver");
1127MODULE_AUTHOR("Richard Gong <richard.gong@intel.com>");
1128MODULE_ALIAS("platform:stratix10-svc");
1129