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25#include "amdgpu.h"
26
27uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
28{
29 uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;
30
31 addr -= AMDGPU_VA_RESERVED_SIZE;
32 addr = amdgpu_gmc_sign_extend(addr);
33
34 return addr;
35}
36
37int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo,
38 u32 domain, uint32_t size)
39{
40 int r;
41 void *ptr;
42
43 r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
44 domain, bo,
45 NULL, &ptr);
46 if (!*bo)
47 return -ENOMEM;
48
49 memset(ptr, 0, size);
50 adev->virt.csa_cpu_addr = ptr;
51 return 0;
52}
53
54void amdgpu_free_static_csa(struct amdgpu_bo **bo)
55{
56 amdgpu_bo_free_kernel(bo, NULL, NULL);
57}
58
59
60
61
62
63
64
65int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
66 struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,
67 uint64_t csa_addr, uint32_t size)
68{
69 struct ww_acquire_ctx ticket;
70 struct list_head list;
71 struct amdgpu_bo_list_entry pd;
72 struct ttm_validate_buffer csa_tv;
73 int r;
74
75 INIT_LIST_HEAD(&list);
76 INIT_LIST_HEAD(&csa_tv.head);
77 csa_tv.bo = &bo->tbo;
78 csa_tv.num_shared = 1;
79
80 list_add(&csa_tv.head, &list);
81 amdgpu_vm_get_pd_bo(vm, &list, &pd);
82
83 r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
84 if (r) {
85 DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
86 return r;
87 }
88
89 *bo_va = amdgpu_vm_bo_add(adev, vm, bo);
90 if (!*bo_va) {
91 ttm_eu_backoff_reservation(&ticket, &list);
92 DRM_ERROR("failed to create bo_va for static CSA\n");
93 return -ENOMEM;
94 }
95
96 r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,
97 AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |
98 AMDGPU_PTE_EXECUTABLE);
99
100 if (r) {
101 DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);
102 amdgpu_vm_bo_rmv(adev, *bo_va);
103 ttm_eu_backoff_reservation(&ticket, &list);
104 return r;
105 }
106
107 ttm_eu_backoff_reservation(&ticket, &list);
108 return 0;
109}
110