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7
8#include "m88ds3103_priv.h"
9
10static const struct dvb_frontend_ops m88ds3103_ops;
11
12
13static int m88ds3103_update_bits(struct m88ds3103_dev *dev,
14 u8 reg, u8 mask, u8 val)
15{
16 int ret;
17 u8 tmp;
18
19
20 if (mask != 0xff) {
21 ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1);
22 if (ret)
23 return ret;
24
25 val &= mask;
26 tmp &= ~mask;
27 val |= tmp;
28 }
29
30 return regmap_bulk_write(dev->regmap, reg, &val, 1);
31}
32
33
34static int m88ds3103_wr_reg_val_tab(struct m88ds3103_dev *dev,
35 const struct m88ds3103_reg_val *tab, int tab_len)
36{
37 struct i2c_client *client = dev->client;
38 int ret, i, j;
39 u8 buf[83];
40
41 dev_dbg(&client->dev, "tab_len=%d\n", tab_len);
42
43 if (tab_len > 86) {
44 ret = -EINVAL;
45 goto err;
46 }
47
48 for (i = 0, j = 0; i < tab_len; i++, j++) {
49 buf[j] = tab[i].val;
50
51 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1 ||
52 !((j + 1) % (dev->cfg->i2c_wr_max - 1))) {
53 ret = regmap_bulk_write(dev->regmap, tab[i].reg - j, buf, j + 1);
54 if (ret)
55 goto err;
56
57 j = -1;
58 }
59 }
60
61 return 0;
62err:
63 dev_dbg(&client->dev, "failed=%d\n", ret);
64 return ret;
65}
66
67
68
69
70
71static int m88ds3103b_dt_write(struct m88ds3103_dev *dev, int reg, int data)
72{
73 struct i2c_client *client = dev->client;
74 u8 buf[] = {reg, data};
75 u8 val;
76 int ret;
77 struct i2c_msg msg = {
78 .addr = dev->dt_addr, .flags = 0, .buf = buf, .len = 2
79 };
80
81 m88ds3103_update_bits(dev, 0x11, 0x01, 0x00);
82
83 val = 0x11;
84 ret = regmap_write(dev->regmap, 0x03, val);
85 if (ret)
86 dev_dbg(&client->dev, "fail=%d\n", ret);
87
88 ret = i2c_transfer(dev->dt_client->adapter, &msg, 1);
89 if (ret != 1) {
90 dev_err(&client->dev, "0x%02x (ret=%i, reg=0x%02x, value=0x%02x)\n",
91 dev->dt_addr, ret, reg, data);
92
93 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);
94 return -EREMOTEIO;
95 }
96 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);
97
98 dev_dbg(&client->dev, "0x%02x reg 0x%02x, value 0x%02x\n",
99 dev->dt_addr, reg, data);
100
101 return 0;
102}
103
104
105
106
107
108static int m88ds3103b_dt_read(struct m88ds3103_dev *dev, u8 reg)
109{
110 struct i2c_client *client = dev->client;
111 int ret;
112 u8 val;
113 u8 b0[] = { reg };
114 u8 b1[] = { 0 };
115 struct i2c_msg msg[] = {
116 {
117 .addr = dev->dt_addr,
118 .flags = 0,
119 .buf = b0,
120 .len = 1
121 },
122 {
123 .addr = dev->dt_addr,
124 .flags = I2C_M_RD,
125 .buf = b1,
126 .len = 1
127 }
128 };
129
130 m88ds3103_update_bits(dev, 0x11, 0x01, 0x00);
131
132 val = 0x12;
133 ret = regmap_write(dev->regmap, 0x03, val);
134 if (ret)
135 dev_dbg(&client->dev, "fail=%d\n", ret);
136
137 ret = i2c_transfer(dev->dt_client->adapter, msg, 2);
138 if (ret != 2) {
139 dev_err(&client->dev, "0x%02x (ret=%d, reg=0x%02x)\n",
140 dev->dt_addr, ret, reg);
141
142 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);
143 return -EREMOTEIO;
144 }
145 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);
146
147 dev_dbg(&client->dev, "0x%02x reg 0x%02x, value 0x%02x\n",
148 dev->dt_addr, reg, b1[0]);
149
150 return b1[0];
151}
152
153
154
155
156int m88ds3103_get_agc_pwm(struct dvb_frontend *fe, u8 *_agc_pwm)
157{
158 struct m88ds3103_dev *dev = fe->demodulator_priv;
159 unsigned tmp;
160 int ret;
161
162 ret = regmap_read(dev->regmap, 0x3f, &tmp);
163 if (ret == 0)
164 *_agc_pwm = tmp;
165 return ret;
166}
167EXPORT_SYMBOL(m88ds3103_get_agc_pwm);
168
169static int m88ds3103_read_status(struct dvb_frontend *fe,
170 enum fe_status *status)
171{
172 struct m88ds3103_dev *dev = fe->demodulator_priv;
173 struct i2c_client *client = dev->client;
174 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
175 int ret, i, itmp;
176 unsigned int utmp;
177 u8 buf[3];
178
179 *status = 0;
180
181 if (!dev->warm) {
182 ret = -EAGAIN;
183 goto err;
184 }
185
186 switch (c->delivery_system) {
187 case SYS_DVBS:
188 ret = regmap_read(dev->regmap, 0xd1, &utmp);
189 if (ret)
190 goto err;
191
192 if ((utmp & 0x07) == 0x07)
193 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
194 FE_HAS_VITERBI | FE_HAS_SYNC |
195 FE_HAS_LOCK;
196 break;
197 case SYS_DVBS2:
198 ret = regmap_read(dev->regmap, 0x0d, &utmp);
199 if (ret)
200 goto err;
201
202 if ((utmp & 0x8f) == 0x8f)
203 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
204 FE_HAS_VITERBI | FE_HAS_SYNC |
205 FE_HAS_LOCK;
206 break;
207 default:
208 dev_dbg(&client->dev, "invalid delivery_system\n");
209 ret = -EINVAL;
210 goto err;
211 }
212
213 dev->fe_status = *status;
214 dev_dbg(&client->dev, "lock=%02x status=%02x\n", utmp, *status);
215
216
217 if (dev->fe_status & FE_HAS_VITERBI) {
218 unsigned int cnr, noise, signal, noise_tot, signal_tot;
219
220 cnr = 0;
221
222 #define M88DS3103_SNR_ITERATIONS 3
223
224 switch (c->delivery_system) {
225 case SYS_DVBS:
226 itmp = 0;
227
228 for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
229 ret = regmap_read(dev->regmap, 0xff, &utmp);
230 if (ret)
231 goto err;
232
233 itmp += utmp;
234 }
235
236
237
238 itmp = DIV_ROUND_CLOSEST(itmp, 8 * M88DS3103_SNR_ITERATIONS);
239 if (itmp)
240 cnr = div_u64((u64) 10000 * intlog2(itmp), intlog2(10));
241 break;
242 case SYS_DVBS2:
243 noise_tot = 0;
244 signal_tot = 0;
245
246 for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
247 ret = regmap_bulk_read(dev->regmap, 0x8c, buf, 3);
248 if (ret)
249 goto err;
250
251 noise = buf[1] << 6;
252 noise |= buf[0] & 0x3f;
253 noise >>= 2;
254 signal = buf[2] * buf[2];
255 signal >>= 1;
256
257 noise_tot += noise;
258 signal_tot += signal;
259 }
260
261 noise = noise_tot / M88DS3103_SNR_ITERATIONS;
262 signal = signal_tot / M88DS3103_SNR_ITERATIONS;
263
264
265 if (signal > noise) {
266 itmp = signal / noise;
267 cnr = div_u64((u64) 10000 * intlog10(itmp), (1 << 24));
268 }
269 break;
270 default:
271 dev_dbg(&client->dev, "invalid delivery_system\n");
272 ret = -EINVAL;
273 goto err;
274 }
275
276 if (cnr) {
277 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
278 c->cnr.stat[0].svalue = cnr;
279 } else {
280 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
281 }
282 } else {
283 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
284 }
285
286
287 if (dev->fe_status & FE_HAS_LOCK) {
288 unsigned int utmp, post_bit_error, post_bit_count;
289
290 switch (c->delivery_system) {
291 case SYS_DVBS:
292 ret = regmap_write(dev->regmap, 0xf9, 0x04);
293 if (ret)
294 goto err;
295
296 ret = regmap_read(dev->regmap, 0xf8, &utmp);
297 if (ret)
298 goto err;
299
300
301 if (!(utmp & 0x10)) {
302 ret = regmap_bulk_read(dev->regmap, 0xf6, buf, 2);
303 if (ret)
304 goto err;
305
306 post_bit_error = buf[1] << 8 | buf[0] << 0;
307 post_bit_count = 0x800000;
308 dev->post_bit_error += post_bit_error;
309 dev->post_bit_count += post_bit_count;
310 dev->dvbv3_ber = post_bit_error;
311
312
313 utmp |= 0x10;
314 ret = regmap_write(dev->regmap, 0xf8, utmp);
315 if (ret)
316 goto err;
317 }
318 break;
319 case SYS_DVBS2:
320 ret = regmap_bulk_read(dev->regmap, 0xd5, buf, 3);
321 if (ret)
322 goto err;
323
324 utmp = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
325
326
327 if (utmp > 4000) {
328 ret = regmap_bulk_read(dev->regmap, 0xf7, buf, 2);
329 if (ret)
330 goto err;
331
332 post_bit_error = buf[1] << 8 | buf[0] << 0;
333 post_bit_count = 32 * utmp;
334 dev->post_bit_error += post_bit_error;
335 dev->post_bit_count += post_bit_count;
336 dev->dvbv3_ber = post_bit_error;
337
338
339 ret = regmap_write(dev->regmap, 0xd1, 0x01);
340 if (ret)
341 goto err;
342
343 ret = regmap_write(dev->regmap, 0xf9, 0x01);
344 if (ret)
345 goto err;
346
347 ret = regmap_write(dev->regmap, 0xf9, 0x00);
348 if (ret)
349 goto err;
350
351 ret = regmap_write(dev->regmap, 0xd1, 0x00);
352 if (ret)
353 goto err;
354 }
355 break;
356 default:
357 dev_dbg(&client->dev, "invalid delivery_system\n");
358 ret = -EINVAL;
359 goto err;
360 }
361
362 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
363 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
364 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
365 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
366 } else {
367 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
368 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
369 }
370
371 return 0;
372err:
373 dev_dbg(&client->dev, "failed=%d\n", ret);
374 return ret;
375}
376
377static int m88ds3103b_select_mclk(struct m88ds3103_dev *dev)
378{
379 struct i2c_client *client = dev->client;
380 struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
381 u32 adc_Freq_MHz[3] = {96, 93, 99};
382 u8 reg16_list[3] = {96, 92, 100}, reg16, reg15;
383 u32 offset_MHz[3];
384 u32 max_offset = 0;
385 u32 old_setting = dev->mclk;
386 u32 tuner_freq_MHz = c->frequency / 1000;
387 u8 i;
388 char big_symbol = 0;
389
390 big_symbol = (c->symbol_rate > 45010000) ? 1 : 0;
391
392 if (big_symbol) {
393 reg16 = 115;
394 } else {
395 reg16 = 96;
396
397
398 for (i = 0; i < 3; i++) {
399 offset_MHz[i] = tuner_freq_MHz % adc_Freq_MHz[i];
400
401 if (offset_MHz[i] > (adc_Freq_MHz[i] / 2))
402 offset_MHz[i] = adc_Freq_MHz[i] - offset_MHz[i];
403
404 if (offset_MHz[i] > max_offset) {
405 max_offset = offset_MHz[i];
406 reg16 = reg16_list[i];
407 dev->mclk = adc_Freq_MHz[i] * 1000 * 1000;
408
409 if (big_symbol)
410 dev->mclk /= 2;
411
412 dev_dbg(&client->dev, "modifying mclk %u -> %u\n",
413 old_setting, dev->mclk);
414 }
415 }
416 }
417
418 if (dev->mclk == 93000000)
419 regmap_write(dev->regmap, 0xA0, 0x42);
420 else if (dev->mclk == 96000000)
421 regmap_write(dev->regmap, 0xA0, 0x44);
422 else if (dev->mclk == 99000000)
423 regmap_write(dev->regmap, 0xA0, 0x46);
424 else if (dev->mclk == 110250000)
425 regmap_write(dev->regmap, 0xA0, 0x4E);
426 else
427 regmap_write(dev->regmap, 0xA0, 0x44);
428
429 reg15 = m88ds3103b_dt_read(dev, 0x15);
430
431 m88ds3103b_dt_write(dev, 0x05, 0x40);
432 m88ds3103b_dt_write(dev, 0x11, 0x08);
433
434 if (big_symbol)
435 reg15 |= 0x02;
436 else
437 reg15 &= ~0x02;
438
439 m88ds3103b_dt_write(dev, 0x15, reg15);
440 m88ds3103b_dt_write(dev, 0x16, reg16);
441
442 usleep_range(5000, 5500);
443
444 m88ds3103b_dt_write(dev, 0x05, 0x00);
445 m88ds3103b_dt_write(dev, 0x11, (u8)(big_symbol ? 0x0E : 0x0A));
446
447 usleep_range(5000, 5500);
448
449 return 0;
450}
451
452static int m88ds3103b_set_mclk(struct m88ds3103_dev *dev, u32 mclk_khz)
453{
454 u8 reg11 = 0x0A, reg15, reg16, reg1D, reg1E, reg1F, tmp;
455 u8 sm, f0 = 0, f1 = 0, f2 = 0, f3 = 0;
456 u16 pll_div_fb, N;
457 u32 div;
458
459 reg15 = m88ds3103b_dt_read(dev, 0x15);
460 reg16 = m88ds3103b_dt_read(dev, 0x16);
461 reg1D = m88ds3103b_dt_read(dev, 0x1D);
462
463 if (dev->cfg->ts_mode != M88DS3103_TS_SERIAL) {
464 if (reg16 == 92)
465 tmp = 93;
466 else if (reg16 == 100)
467 tmp = 99;
468 else
469 tmp = 96;
470
471 mclk_khz *= tmp;
472 mclk_khz /= 96;
473 }
474
475 pll_div_fb = (reg15 & 0x01) << 8;
476 pll_div_fb += reg16;
477 pll_div_fb += 32;
478
479 div = 9000 * pll_div_fb * 4;
480 div /= mclk_khz;
481
482 if (dev->cfg->ts_mode == M88DS3103_TS_SERIAL) {
483 reg11 |= 0x02;
484
485 if (div <= 32) {
486 N = 2;
487
488 f0 = 0;
489 f1 = div / N;
490 f2 = div - f1;
491 f3 = 0;
492 } else if (div <= 34) {
493 N = 3;
494
495 f0 = div / N;
496 f1 = (div - f0) / (N - 1);
497 f2 = div - f0 - f1;
498 f3 = 0;
499 } else if (div <= 64) {
500 N = 4;
501
502 f0 = div / N;
503 f1 = (div - f0) / (N - 1);
504 f2 = (div - f0 - f1) / (N - 2);
505 f3 = div - f0 - f1 - f2;
506 } else {
507 N = 4;
508
509 f0 = 16;
510 f1 = 16;
511 f2 = 16;
512 f3 = 16;
513 }
514
515 if (f0 == 16)
516 f0 = 0;
517 else if ((f0 < 8) && (f0 != 0))
518 f0 = 8;
519
520 if (f1 == 16)
521 f1 = 0;
522 else if ((f1 < 8) && (f1 != 0))
523 f1 = 8;
524
525 if (f2 == 16)
526 f2 = 0;
527 else if ((f2 < 8) && (f2 != 0))
528 f2 = 8;
529
530 if (f3 == 16)
531 f3 = 0;
532 else if ((f3 < 8) && (f3 != 0))
533 f3 = 8;
534 } else {
535 reg11 &= ~0x02;
536
537 if (div <= 32) {
538 N = 2;
539
540 f0 = 0;
541 f1 = div / N;
542 f2 = div - f1;
543 f3 = 0;
544 } else if (div <= 48) {
545 N = 3;
546
547 f0 = div / N;
548 f1 = (div - f0) / (N - 1);
549 f2 = div - f0 - f1;
550 f3 = 0;
551 } else if (div <= 64) {
552 N = 4;
553
554 f0 = div / N;
555 f1 = (div - f0) / (N - 1);
556 f2 = (div - f0 - f1) / (N - 2);
557 f3 = div - f0 - f1 - f2;
558 } else {
559 N = 4;
560
561 f0 = 16;
562 f1 = 16;
563 f2 = 16;
564 f3 = 16;
565 }
566
567 if (f0 == 16)
568 f0 = 0;
569 else if ((f0 < 9) && (f0 != 0))
570 f0 = 9;
571
572 if (f1 == 16)
573 f1 = 0;
574 else if ((f1 < 9) && (f1 != 0))
575 f1 = 9;
576
577 if (f2 == 16)
578 f2 = 0;
579 else if ((f2 < 9) && (f2 != 0))
580 f2 = 9;
581
582 if (f3 == 16)
583 f3 = 0;
584 else if ((f3 < 9) && (f3 != 0))
585 f3 = 9;
586 }
587
588 sm = N - 1;
589
590
591
592
593
594
595
596 reg1D &= ~0x03;
597 reg1D |= sm;
598 reg1D |= 0x80;
599
600 reg1E = ((f3 << 4) + f2) & 0xFF;
601 reg1F = ((f1 << 4) + f0) & 0xFF;
602
603 m88ds3103b_dt_write(dev, 0x05, 0x40);
604 m88ds3103b_dt_write(dev, 0x11, 0x08);
605 m88ds3103b_dt_write(dev, 0x1D, reg1D);
606 m88ds3103b_dt_write(dev, 0x1E, reg1E);
607 m88ds3103b_dt_write(dev, 0x1F, reg1F);
608
609 m88ds3103b_dt_write(dev, 0x17, 0xc1);
610 m88ds3103b_dt_write(dev, 0x17, 0x81);
611
612 usleep_range(5000, 5500);
613
614 m88ds3103b_dt_write(dev, 0x05, 0x00);
615 m88ds3103b_dt_write(dev, 0x11, 0x0A);
616
617 usleep_range(5000, 5500);
618
619 return 0;
620}
621
622static int m88ds3103_set_frontend(struct dvb_frontend *fe)
623{
624 struct m88ds3103_dev *dev = fe->demodulator_priv;
625 struct i2c_client *client = dev->client;
626 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
627 int ret, len;
628 const struct m88ds3103_reg_val *init;
629 u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0;
630 u8 buf[3];
631 u16 u16tmp;
632 u32 tuner_frequency_khz, target_mclk, u32tmp;
633 s32 s32tmp;
634 static const struct reg_sequence reset_buf[] = {
635 {0x07, 0x80}, {0x07, 0x00}
636 };
637
638 dev_dbg(&client->dev,
639 "delivery_system=%d modulation=%d frequency=%u symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
640 c->delivery_system, c->modulation, c->frequency, c->symbol_rate,
641 c->inversion, c->pilot, c->rolloff);
642
643 if (!dev->warm) {
644 ret = -EAGAIN;
645 goto err;
646 }
647
648
649 ret = regmap_multi_reg_write(dev->regmap, reset_buf, 2);
650 if (ret)
651 goto err;
652
653
654 if (dev->chip_id == M88RS6000_CHIP_ID) {
655 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {
656 ret = regmap_read(dev->regmap, 0xb2, &u32tmp);
657 if (ret)
658 goto err;
659 if (u32tmp == 0x01) {
660 ret = regmap_write(dev->regmap, 0x00, 0x00);
661 if (ret)
662 goto err;
663 ret = regmap_write(dev->regmap, 0xb2, 0x00);
664 if (ret)
665 goto err;
666 }
667 }
668
669 ret = regmap_write(dev->regmap, 0x06, 0xe0);
670 if (ret)
671 goto err;
672 }
673
674
675 if (fe->ops.tuner_ops.set_params) {
676 ret = fe->ops.tuner_ops.set_params(fe);
677 if (ret)
678 goto err;
679 }
680
681 if (fe->ops.tuner_ops.get_frequency) {
682 ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency_khz);
683 if (ret)
684 goto err;
685 } else {
686
687
688
689
690
691 tuner_frequency_khz = c->frequency;
692 }
693
694
695 if (dev->chip_id == M88RS6000_CHIP_ID) {
696 if (c->symbol_rate > 45010000)
697 dev->mclk = 110250000;
698 else
699 dev->mclk = 96000000;
700
701 if (c->delivery_system == SYS_DVBS)
702 target_mclk = 96000000;
703 else
704 target_mclk = 144000000;
705
706 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {
707 m88ds3103b_select_mclk(dev);
708 m88ds3103b_set_mclk(dev, target_mclk / 1000);
709 }
710
711
712 ret = regmap_write(dev->regmap, 0x06, 0x00);
713 if (ret)
714 goto err;
715 usleep_range(10000, 20000);
716 } else {
717
718 dev->mclk = 96000000;
719
720 switch (dev->cfg->ts_mode) {
721 case M88DS3103_TS_SERIAL:
722 case M88DS3103_TS_SERIAL_D7:
723 target_mclk = dev->cfg->ts_clk;
724 break;
725 case M88DS3103_TS_PARALLEL:
726 case M88DS3103_TS_CI:
727 if (c->delivery_system == SYS_DVBS)
728 target_mclk = 96000000;
729 else {
730 if (c->symbol_rate < 18000000)
731 target_mclk = 96000000;
732 else if (c->symbol_rate < 28000000)
733 target_mclk = 144000000;
734 else
735 target_mclk = 192000000;
736 }
737 break;
738 default:
739 dev_dbg(&client->dev, "invalid ts_mode\n");
740 ret = -EINVAL;
741 goto err;
742 }
743
744 switch (target_mclk) {
745 case 96000000:
746 u8tmp1 = 0x02;
747 u8tmp2 = 0x01;
748 break;
749 case 144000000:
750 u8tmp1 = 0x00;
751 u8tmp2 = 0x01;
752 break;
753 case 192000000:
754 u8tmp1 = 0x03;
755 u8tmp2 = 0x00;
756 break;
757 }
758 ret = m88ds3103_update_bits(dev, 0x22, 0xc0, u8tmp1 << 6);
759 if (ret)
760 goto err;
761 ret = m88ds3103_update_bits(dev, 0x24, 0xc0, u8tmp2 << 6);
762 if (ret)
763 goto err;
764 }
765
766 ret = regmap_write(dev->regmap, 0xb2, 0x01);
767 if (ret)
768 goto err;
769
770 ret = regmap_write(dev->regmap, 0x00, 0x01);
771 if (ret)
772 goto err;
773
774 switch (c->delivery_system) {
775 case SYS_DVBS:
776 if (dev->chip_id == M88RS6000_CHIP_ID) {
777 len = ARRAY_SIZE(m88rs6000_dvbs_init_reg_vals);
778 init = m88rs6000_dvbs_init_reg_vals;
779 } else {
780 len = ARRAY_SIZE(m88ds3103_dvbs_init_reg_vals);
781 init = m88ds3103_dvbs_init_reg_vals;
782 }
783 break;
784 case SYS_DVBS2:
785 if (dev->chip_id == M88RS6000_CHIP_ID) {
786 len = ARRAY_SIZE(m88rs6000_dvbs2_init_reg_vals);
787 init = m88rs6000_dvbs2_init_reg_vals;
788 } else {
789 len = ARRAY_SIZE(m88ds3103_dvbs2_init_reg_vals);
790 init = m88ds3103_dvbs2_init_reg_vals;
791 }
792 break;
793 default:
794 dev_dbg(&client->dev, "invalid delivery_system\n");
795 ret = -EINVAL;
796 goto err;
797 }
798
799
800 if (c->delivery_system != dev->delivery_system) {
801 ret = m88ds3103_wr_reg_val_tab(dev, init, len);
802 if (ret)
803 goto err;
804 }
805
806 if (dev->chip_id == M88RS6000_CHIP_ID) {
807 if (c->delivery_system == SYS_DVBS2 &&
808 c->symbol_rate <= 5000000) {
809 ret = regmap_write(dev->regmap, 0xc0, 0x04);
810 if (ret)
811 goto err;
812 buf[0] = 0x09;
813 buf[1] = 0x22;
814 buf[2] = 0x88;
815 ret = regmap_bulk_write(dev->regmap, 0x8a, buf, 3);
816 if (ret)
817 goto err;
818 }
819 ret = m88ds3103_update_bits(dev, 0x9d, 0x08, 0x08);
820 if (ret)
821 goto err;
822
823 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {
824 buf[0] = m88ds3103b_dt_read(dev, 0x15);
825 buf[1] = m88ds3103b_dt_read(dev, 0x16);
826
827 if (c->symbol_rate > 45010000) {
828 buf[0] &= ~0x03;
829 buf[0] |= 0x02;
830 buf[0] |= ((147 - 32) >> 8) & 0x01;
831 buf[1] = (147 - 32) & 0xFF;
832
833 dev->mclk = 110250 * 1000;
834 } else {
835 buf[0] &= ~0x03;
836 buf[0] |= ((128 - 32) >> 8) & 0x01;
837 buf[1] = (128 - 32) & 0xFF;
838
839 dev->mclk = 96000 * 1000;
840 }
841 m88ds3103b_dt_write(dev, 0x15, buf[0]);
842 m88ds3103b_dt_write(dev, 0x16, buf[1]);
843
844 regmap_read(dev->regmap, 0x30, &u32tmp);
845 u32tmp &= ~0x80;
846 regmap_write(dev->regmap, 0x30, u32tmp & 0xff);
847 }
848
849 ret = regmap_write(dev->regmap, 0xf1, 0x01);
850 if (ret)
851 goto err;
852
853 if (dev->chiptype != M88DS3103_CHIPTYPE_3103B) {
854 ret = m88ds3103_update_bits(dev, 0x30, 0x80, 0x80);
855 if (ret)
856 goto err;
857 }
858 }
859
860 switch (dev->cfg->ts_mode) {
861 case M88DS3103_TS_SERIAL:
862 u8tmp1 = 0x00;
863 u8tmp = 0x06;
864 break;
865 case M88DS3103_TS_SERIAL_D7:
866 u8tmp1 = 0x20;
867 u8tmp = 0x06;
868 break;
869 case M88DS3103_TS_PARALLEL:
870 u8tmp = 0x02;
871 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {
872 u8tmp = 0x01;
873 u8tmp1 = 0x01;
874 }
875 break;
876 case M88DS3103_TS_CI:
877 u8tmp = 0x03;
878 break;
879 default:
880 dev_dbg(&client->dev, "invalid ts_mode\n");
881 ret = -EINVAL;
882 goto err;
883 }
884
885 if (dev->cfg->ts_clk_pol)
886 u8tmp |= 0x40;
887
888
889 ret = regmap_write(dev->regmap, 0xfd, u8tmp);
890 if (ret)
891 goto err;
892
893 switch (dev->cfg->ts_mode) {
894 case M88DS3103_TS_SERIAL:
895 case M88DS3103_TS_SERIAL_D7:
896 ret = m88ds3103_update_bits(dev, 0x29, 0x20, u8tmp1);
897 if (ret)
898 goto err;
899 u16tmp = 0;
900 u8tmp1 = 0x3f;
901 u8tmp2 = 0x3f;
902 break;
903 case M88DS3103_TS_PARALLEL:
904 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {
905 ret = m88ds3103_update_bits(dev, 0x29, 0x01, u8tmp1);
906 if (ret)
907 goto err;
908 }
909
910 default:
911 u16tmp = DIV_ROUND_UP(target_mclk, dev->cfg->ts_clk);
912 u8tmp1 = u16tmp / 2 - 1;
913 u8tmp2 = DIV_ROUND_UP(u16tmp, 2) - 1;
914 }
915
916 dev_dbg(&client->dev, "target_mclk=%u ts_clk=%u ts_clk_divide_ratio=%u\n",
917 target_mclk, dev->cfg->ts_clk, u16tmp);
918
919
920
921 u8tmp = (u8tmp1 >> 2) & 0x0f;
922 ret = regmap_update_bits(dev->regmap, 0xfe, 0x0f, u8tmp);
923 if (ret)
924 goto err;
925 u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0;
926 ret = regmap_write(dev->regmap, 0xea, u8tmp);
927 if (ret)
928 goto err;
929
930 if (c->symbol_rate <= 3000000)
931 u8tmp = 0x20;
932 else if (c->symbol_rate <= 10000000)
933 u8tmp = 0x10;
934 else
935 u8tmp = 0x06;
936
937 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B)
938 m88ds3103b_set_mclk(dev, target_mclk / 1000);
939
940 ret = regmap_write(dev->regmap, 0xc3, 0x08);
941 if (ret)
942 goto err;
943
944 ret = regmap_write(dev->regmap, 0xc8, u8tmp);
945 if (ret)
946 goto err;
947
948 ret = regmap_write(dev->regmap, 0xc4, 0x08);
949 if (ret)
950 goto err;
951
952 ret = regmap_write(dev->regmap, 0xc7, 0x00);
953 if (ret)
954 goto err;
955
956 u16tmp = DIV_ROUND_CLOSEST_ULL((u64)c->symbol_rate * 0x10000, dev->mclk);
957 buf[0] = (u16tmp >> 0) & 0xff;
958 buf[1] = (u16tmp >> 8) & 0xff;
959 ret = regmap_bulk_write(dev->regmap, 0x61, buf, 2);
960 if (ret)
961 goto err;
962
963 ret = m88ds3103_update_bits(dev, 0x4d, 0x02, dev->cfg->spec_inv << 1);
964 if (ret)
965 goto err;
966
967 ret = m88ds3103_update_bits(dev, 0x30, 0x10, dev->cfg->agc_inv << 4);
968 if (ret)
969 goto err;
970
971 ret = regmap_write(dev->regmap, 0x33, dev->cfg->agc);
972 if (ret)
973 goto err;
974
975 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {
976
977 ret = m88ds3103_update_bits(dev, 0x29, 0x10,
978 (c->delivery_system == SYS_DVBS) ? 0x10 : 0x0);
979 if (ret)
980 goto err;
981
982 ret = m88ds3103_update_bits(dev, 0xc9, 0x08, 0x08);
983 }
984
985 dev_dbg(&client->dev, "carrier offset=%d\n",
986 (tuner_frequency_khz - c->frequency));
987
988
989 s32tmp = 0x10000 * (tuner_frequency_khz - c->frequency);
990 s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk / 1000);
991 buf[0] = (s32tmp >> 0) & 0xff;
992 buf[1] = (s32tmp >> 8) & 0xff;
993 ret = regmap_bulk_write(dev->regmap, 0x5e, buf, 2);
994 if (ret)
995 goto err;
996
997 ret = regmap_write(dev->regmap, 0x00, 0x00);
998 if (ret)
999 goto err;
1000
1001 ret = regmap_write(dev->regmap, 0xb2, 0x00);
1002 if (ret)
1003 goto err;
1004
1005 dev->delivery_system = c->delivery_system;
1006
1007 return 0;
1008err:
1009 dev_dbg(&client->dev, "failed=%d\n", ret);
1010 return ret;
1011}
1012
1013static int m88ds3103_init(struct dvb_frontend *fe)
1014{
1015 struct m88ds3103_dev *dev = fe->demodulator_priv;
1016 struct i2c_client *client = dev->client;
1017 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1018 int ret, len, rem;
1019 unsigned int utmp;
1020 const struct firmware *firmware;
1021 const char *name;
1022
1023 dev_dbg(&client->dev, "\n");
1024
1025
1026 dev->warm = false;
1027
1028
1029 ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x01);
1030 if (ret)
1031 goto err;
1032 ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x00);
1033 if (ret)
1034 goto err;
1035 ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x00);
1036 if (ret)
1037 goto err;
1038
1039
1040 ret = regmap_read(dev->regmap, 0xb9, &utmp);
1041 if (ret)
1042 goto err;
1043
1044 dev_dbg(&client->dev, "firmware=%02x\n", utmp);
1045
1046 if (utmp)
1047 goto warm;
1048
1049
1050 ret = regmap_write(dev->regmap, 0x07, 0xe0);
1051 if (ret)
1052 goto err;
1053 ret = regmap_write(dev->regmap, 0x07, 0x00);
1054 if (ret)
1055 goto err;
1056
1057
1058 dev_info(&client->dev, "found a '%s' in cold state\n",
1059 dev->fe.ops.info.name);
1060
1061 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B)
1062 name = M88DS3103B_FIRMWARE;
1063 else if (dev->chip_id == M88RS6000_CHIP_ID)
1064 name = M88RS6000_FIRMWARE;
1065 else
1066 name = M88DS3103_FIRMWARE;
1067
1068
1069 ret = request_firmware(&firmware, name, &client->dev);
1070 if (ret) {
1071 dev_err(&client->dev, "firmware file '%s' not found\n", name);
1072 goto err;
1073 }
1074
1075 dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
1076
1077 ret = regmap_write(dev->regmap, 0xb2, 0x01);
1078 if (ret)
1079 goto err_release_firmware;
1080
1081 for (rem = firmware->size; rem > 0; rem -= (dev->cfg->i2c_wr_max - 1)) {
1082 len = min(dev->cfg->i2c_wr_max - 1, rem);
1083 ret = regmap_bulk_write(dev->regmap, 0xb0,
1084 &firmware->data[firmware->size - rem],
1085 len);
1086 if (ret) {
1087 dev_err(&client->dev, "firmware download failed %d\n",
1088 ret);
1089 goto err_release_firmware;
1090 }
1091 }
1092
1093 ret = regmap_write(dev->regmap, 0xb2, 0x00);
1094 if (ret)
1095 goto err_release_firmware;
1096
1097 release_firmware(firmware);
1098
1099 ret = regmap_read(dev->regmap, 0xb9, &utmp);
1100 if (ret)
1101 goto err;
1102
1103 if (!utmp) {
1104 ret = -EINVAL;
1105 dev_info(&client->dev, "firmware did not run\n");
1106 goto err;
1107 }
1108
1109 dev_info(&client->dev, "found a '%s' in warm state\n",
1110 dev->fe.ops.info.name);
1111 dev_info(&client->dev, "firmware version: %X.%X\n",
1112 (utmp >> 4) & 0xf, (utmp >> 0 & 0xf));
1113
1114 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {
1115 m88ds3103b_dt_write(dev, 0x21, 0x92);
1116 m88ds3103b_dt_write(dev, 0x15, 0x6C);
1117 m88ds3103b_dt_write(dev, 0x17, 0xC1);
1118 m88ds3103b_dt_write(dev, 0x17, 0x81);
1119 }
1120warm:
1121
1122 dev->warm = true;
1123
1124
1125 c->cnr.len = 1;
1126 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1127 c->post_bit_error.len = 1;
1128 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1129 c->post_bit_count.len = 1;
1130 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1131
1132 return 0;
1133err_release_firmware:
1134 release_firmware(firmware);
1135err:
1136 dev_dbg(&client->dev, "failed=%d\n", ret);
1137 return ret;
1138}
1139
1140static int m88ds3103_sleep(struct dvb_frontend *fe)
1141{
1142 struct m88ds3103_dev *dev = fe->demodulator_priv;
1143 struct i2c_client *client = dev->client;
1144 int ret;
1145 unsigned int utmp;
1146
1147 dev_dbg(&client->dev, "\n");
1148
1149 dev->fe_status = 0;
1150 dev->delivery_system = SYS_UNDEFINED;
1151
1152
1153 if (dev->chip_id == M88RS6000_CHIP_ID)
1154 utmp = 0x29;
1155 else
1156 utmp = 0x27;
1157 ret = m88ds3103_update_bits(dev, utmp, 0x01, 0x00);
1158 if (ret)
1159 goto err;
1160
1161
1162 ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
1163 if (ret)
1164 goto err;
1165 ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
1166 if (ret)
1167 goto err;
1168 ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
1169 if (ret)
1170 goto err;
1171
1172 return 0;
1173err:
1174 dev_dbg(&client->dev, "failed=%d\n", ret);
1175 return ret;
1176}
1177
1178static int m88ds3103_get_frontend(struct dvb_frontend *fe,
1179 struct dtv_frontend_properties *c)
1180{
1181 struct m88ds3103_dev *dev = fe->demodulator_priv;
1182 struct i2c_client *client = dev->client;
1183 int ret;
1184 u8 buf[3];
1185
1186 dev_dbg(&client->dev, "\n");
1187
1188 if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) {
1189 ret = 0;
1190 goto err;
1191 }
1192
1193 switch (c->delivery_system) {
1194 case SYS_DVBS:
1195 ret = regmap_bulk_read(dev->regmap, 0xe0, &buf[0], 1);
1196 if (ret)
1197 goto err;
1198
1199 ret = regmap_bulk_read(dev->regmap, 0xe6, &buf[1], 1);
1200 if (ret)
1201 goto err;
1202
1203 switch ((buf[0] >> 2) & 0x01) {
1204 case 0:
1205 c->inversion = INVERSION_OFF;
1206 break;
1207 case 1:
1208 c->inversion = INVERSION_ON;
1209 break;
1210 }
1211
1212 switch ((buf[1] >> 5) & 0x07) {
1213 case 0:
1214 c->fec_inner = FEC_7_8;
1215 break;
1216 case 1:
1217 c->fec_inner = FEC_5_6;
1218 break;
1219 case 2:
1220 c->fec_inner = FEC_3_4;
1221 break;
1222 case 3:
1223 c->fec_inner = FEC_2_3;
1224 break;
1225 case 4:
1226 c->fec_inner = FEC_1_2;
1227 break;
1228 default:
1229 dev_dbg(&client->dev, "invalid fec_inner\n");
1230 }
1231
1232 c->modulation = QPSK;
1233
1234 break;
1235 case SYS_DVBS2:
1236 ret = regmap_bulk_read(dev->regmap, 0x7e, &buf[0], 1);
1237 if (ret)
1238 goto err;
1239
1240 ret = regmap_bulk_read(dev->regmap, 0x89, &buf[1], 1);
1241 if (ret)
1242 goto err;
1243
1244 ret = regmap_bulk_read(dev->regmap, 0xf2, &buf[2], 1);
1245 if (ret)
1246 goto err;
1247
1248 switch ((buf[0] >> 0) & 0x0f) {
1249 case 2:
1250 c->fec_inner = FEC_2_5;
1251 break;
1252 case 3:
1253 c->fec_inner = FEC_1_2;
1254 break;
1255 case 4:
1256 c->fec_inner = FEC_3_5;
1257 break;
1258 case 5:
1259 c->fec_inner = FEC_2_3;
1260 break;
1261 case 6:
1262 c->fec_inner = FEC_3_4;
1263 break;
1264 case 7:
1265 c->fec_inner = FEC_4_5;
1266 break;
1267 case 8:
1268 c->fec_inner = FEC_5_6;
1269 break;
1270 case 9:
1271 c->fec_inner = FEC_8_9;
1272 break;
1273 case 10:
1274 c->fec_inner = FEC_9_10;
1275 break;
1276 default:
1277 dev_dbg(&client->dev, "invalid fec_inner\n");
1278 }
1279
1280 switch ((buf[0] >> 5) & 0x01) {
1281 case 0:
1282 c->pilot = PILOT_OFF;
1283 break;
1284 case 1:
1285 c->pilot = PILOT_ON;
1286 break;
1287 }
1288
1289 switch ((buf[0] >> 6) & 0x07) {
1290 case 0:
1291 c->modulation = QPSK;
1292 break;
1293 case 1:
1294 c->modulation = PSK_8;
1295 break;
1296 case 2:
1297 c->modulation = APSK_16;
1298 break;
1299 case 3:
1300 c->modulation = APSK_32;
1301 break;
1302 default:
1303 dev_dbg(&client->dev, "invalid modulation\n");
1304 }
1305
1306 switch ((buf[1] >> 7) & 0x01) {
1307 case 0:
1308 c->inversion = INVERSION_OFF;
1309 break;
1310 case 1:
1311 c->inversion = INVERSION_ON;
1312 break;
1313 }
1314
1315 switch ((buf[2] >> 0) & 0x03) {
1316 case 0:
1317 c->rolloff = ROLLOFF_35;
1318 break;
1319 case 1:
1320 c->rolloff = ROLLOFF_25;
1321 break;
1322 case 2:
1323 c->rolloff = ROLLOFF_20;
1324 break;
1325 default:
1326 dev_dbg(&client->dev, "invalid rolloff\n");
1327 }
1328 break;
1329 default:
1330 dev_dbg(&client->dev, "invalid delivery_system\n");
1331 ret = -EINVAL;
1332 goto err;
1333 }
1334
1335 ret = regmap_bulk_read(dev->regmap, 0x6d, buf, 2);
1336 if (ret)
1337 goto err;
1338
1339 c->symbol_rate = DIV_ROUND_CLOSEST_ULL((u64)(buf[1] << 8 | buf[0] << 0) * dev->mclk, 0x10000);
1340
1341 return 0;
1342err:
1343 dev_dbg(&client->dev, "failed=%d\n", ret);
1344 return ret;
1345}
1346
1347static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *snr)
1348{
1349 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1350
1351 if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
1352 *snr = div_s64(c->cnr.stat[0].svalue, 100);
1353 else
1354 *snr = 0;
1355
1356 return 0;
1357}
1358
1359static int m88ds3103_read_ber(struct dvb_frontend *fe, u32 *ber)
1360{
1361 struct m88ds3103_dev *dev = fe->demodulator_priv;
1362
1363 *ber = dev->dvbv3_ber;
1364
1365 return 0;
1366}
1367
1368static int m88ds3103_set_tone(struct dvb_frontend *fe,
1369 enum fe_sec_tone_mode fe_sec_tone_mode)
1370{
1371 struct m88ds3103_dev *dev = fe->demodulator_priv;
1372 struct i2c_client *client = dev->client;
1373 int ret;
1374 unsigned int utmp, tone, reg_a1_mask;
1375
1376 dev_dbg(&client->dev, "fe_sec_tone_mode=%d\n", fe_sec_tone_mode);
1377
1378 if (!dev->warm) {
1379 ret = -EAGAIN;
1380 goto err;
1381 }
1382
1383 switch (fe_sec_tone_mode) {
1384 case SEC_TONE_ON:
1385 tone = 0;
1386 reg_a1_mask = 0x47;
1387 break;
1388 case SEC_TONE_OFF:
1389 tone = 1;
1390 reg_a1_mask = 0x00;
1391 break;
1392 default:
1393 dev_dbg(&client->dev, "invalid fe_sec_tone_mode\n");
1394 ret = -EINVAL;
1395 goto err;
1396 }
1397
1398 utmp = tone << 7 | dev->cfg->envelope_mode << 5;
1399 ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1400 if (ret)
1401 goto err;
1402
1403 utmp = 1 << 2;
1404 ret = m88ds3103_update_bits(dev, 0xa1, reg_a1_mask, utmp);
1405 if (ret)
1406 goto err;
1407
1408 return 0;
1409err:
1410 dev_dbg(&client->dev, "failed=%d\n", ret);
1411 return ret;
1412}
1413
1414static int m88ds3103_set_voltage(struct dvb_frontend *fe,
1415 enum fe_sec_voltage fe_sec_voltage)
1416{
1417 struct m88ds3103_dev *dev = fe->demodulator_priv;
1418 struct i2c_client *client = dev->client;
1419 int ret;
1420 unsigned int utmp;
1421 bool voltage_sel, voltage_dis;
1422
1423 dev_dbg(&client->dev, "fe_sec_voltage=%d\n", fe_sec_voltage);
1424
1425 if (!dev->warm) {
1426 ret = -EAGAIN;
1427 goto err;
1428 }
1429
1430 switch (fe_sec_voltage) {
1431 case SEC_VOLTAGE_18:
1432 voltage_sel = true;
1433 voltage_dis = false;
1434 break;
1435 case SEC_VOLTAGE_13:
1436 voltage_sel = false;
1437 voltage_dis = false;
1438 break;
1439 case SEC_VOLTAGE_OFF:
1440 voltage_sel = false;
1441 voltage_dis = true;
1442 break;
1443 default:
1444 dev_dbg(&client->dev, "invalid fe_sec_voltage\n");
1445 ret = -EINVAL;
1446 goto err;
1447 }
1448
1449
1450 voltage_sel ^= dev->cfg->lnb_hv_pol;
1451 voltage_dis ^= dev->cfg->lnb_en_pol;
1452
1453 utmp = voltage_dis << 1 | voltage_sel << 0;
1454 ret = m88ds3103_update_bits(dev, 0xa2, 0x03, utmp);
1455 if (ret)
1456 goto err;
1457
1458 return 0;
1459err:
1460 dev_dbg(&client->dev, "failed=%d\n", ret);
1461 return ret;
1462}
1463
1464static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,
1465 struct dvb_diseqc_master_cmd *diseqc_cmd)
1466{
1467 struct m88ds3103_dev *dev = fe->demodulator_priv;
1468 struct i2c_client *client = dev->client;
1469 int ret;
1470 unsigned int utmp;
1471 unsigned long timeout;
1472
1473 dev_dbg(&client->dev, "msg=%*ph\n",
1474 diseqc_cmd->msg_len, diseqc_cmd->msg);
1475
1476 if (!dev->warm) {
1477 ret = -EAGAIN;
1478 goto err;
1479 }
1480
1481 if (diseqc_cmd->msg_len < 3 || diseqc_cmd->msg_len > 6) {
1482 ret = -EINVAL;
1483 goto err;
1484 }
1485
1486 utmp = dev->cfg->envelope_mode << 5;
1487 ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1488 if (ret)
1489 goto err;
1490
1491 ret = regmap_bulk_write(dev->regmap, 0xa3, diseqc_cmd->msg,
1492 diseqc_cmd->msg_len);
1493 if (ret)
1494 goto err;
1495
1496 ret = regmap_write(dev->regmap, 0xa1,
1497 (diseqc_cmd->msg_len - 1) << 3 | 0x07);
1498 if (ret)
1499 goto err;
1500
1501
1502 #define SEND_MASTER_CMD_TIMEOUT 120
1503 timeout = jiffies + msecs_to_jiffies(SEND_MASTER_CMD_TIMEOUT);
1504
1505
1506 utmp = diseqc_cmd->msg_len * 13500;
1507 usleep_range(utmp - 4000, utmp);
1508
1509 for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1510 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1511 if (ret)
1512 goto err;
1513 utmp = (utmp >> 6) & 0x1;
1514 }
1515
1516 if (utmp == 0) {
1517 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1518 jiffies_to_msecs(jiffies) -
1519 (jiffies_to_msecs(timeout) - SEND_MASTER_CMD_TIMEOUT));
1520 } else {
1521 dev_dbg(&client->dev, "diseqc tx timeout\n");
1522
1523 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
1524 if (ret)
1525 goto err;
1526 }
1527
1528 ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
1529 if (ret)
1530 goto err;
1531
1532 if (utmp == 1) {
1533 ret = -ETIMEDOUT;
1534 goto err;
1535 }
1536
1537 return 0;
1538err:
1539 dev_dbg(&client->dev, "failed=%d\n", ret);
1540 return ret;
1541}
1542
1543static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,
1544 enum fe_sec_mini_cmd fe_sec_mini_cmd)
1545{
1546 struct m88ds3103_dev *dev = fe->demodulator_priv;
1547 struct i2c_client *client = dev->client;
1548 int ret;
1549 unsigned int utmp, burst;
1550 unsigned long timeout;
1551
1552 dev_dbg(&client->dev, "fe_sec_mini_cmd=%d\n", fe_sec_mini_cmd);
1553
1554 if (!dev->warm) {
1555 ret = -EAGAIN;
1556 goto err;
1557 }
1558
1559 utmp = dev->cfg->envelope_mode << 5;
1560 ret = m88ds3103_update_bits(dev, 0xa2, 0xe0, utmp);
1561 if (ret)
1562 goto err;
1563
1564 switch (fe_sec_mini_cmd) {
1565 case SEC_MINI_A:
1566 burst = 0x02;
1567 break;
1568 case SEC_MINI_B:
1569 burst = 0x01;
1570 break;
1571 default:
1572 dev_dbg(&client->dev, "invalid fe_sec_mini_cmd\n");
1573 ret = -EINVAL;
1574 goto err;
1575 }
1576
1577 ret = regmap_write(dev->regmap, 0xa1, burst);
1578 if (ret)
1579 goto err;
1580
1581
1582 #define SEND_BURST_TIMEOUT 40
1583 timeout = jiffies + msecs_to_jiffies(SEND_BURST_TIMEOUT);
1584
1585
1586 usleep_range(8500, 12500);
1587
1588 for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1589 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1590 if (ret)
1591 goto err;
1592 utmp = (utmp >> 6) & 0x1;
1593 }
1594
1595 if (utmp == 0) {
1596 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1597 jiffies_to_msecs(jiffies) -
1598 (jiffies_to_msecs(timeout) - SEND_BURST_TIMEOUT));
1599 } else {
1600 dev_dbg(&client->dev, "diseqc tx timeout\n");
1601
1602 ret = m88ds3103_update_bits(dev, 0xa1, 0xc0, 0x40);
1603 if (ret)
1604 goto err;
1605 }
1606
1607 ret = m88ds3103_update_bits(dev, 0xa2, 0xc0, 0x80);
1608 if (ret)
1609 goto err;
1610
1611 if (utmp == 1) {
1612 ret = -ETIMEDOUT;
1613 goto err;
1614 }
1615
1616 return 0;
1617err:
1618 dev_dbg(&client->dev, "failed=%d\n", ret);
1619 return ret;
1620}
1621
1622static int m88ds3103_get_tune_settings(struct dvb_frontend *fe,
1623 struct dvb_frontend_tune_settings *s)
1624{
1625 s->min_delay_ms = 3000;
1626
1627 return 0;
1628}
1629
1630static void m88ds3103_release(struct dvb_frontend *fe)
1631{
1632 struct m88ds3103_dev *dev = fe->demodulator_priv;
1633 struct i2c_client *client = dev->client;
1634
1635 i2c_unregister_device(client);
1636}
1637
1638static int m88ds3103_select(struct i2c_mux_core *muxc, u32 chan)
1639{
1640 struct m88ds3103_dev *dev = i2c_mux_priv(muxc);
1641 struct i2c_client *client = dev->client;
1642 int ret;
1643 struct i2c_msg msg = {
1644 .addr = client->addr,
1645 .flags = 0,
1646 .len = 2,
1647 .buf = "\x03\x11",
1648 };
1649
1650
1651 ret = __i2c_transfer(client->adapter, &msg, 1);
1652 if (ret != 1) {
1653 dev_warn(&client->dev, "i2c wr failed=%d\n", ret);
1654 if (ret >= 0)
1655 ret = -EREMOTEIO;
1656 return ret;
1657 }
1658
1659 return 0;
1660}
1661
1662
1663
1664
1665
1666
1667struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *cfg,
1668 struct i2c_adapter *i2c,
1669 struct i2c_adapter **tuner_i2c_adapter)
1670{
1671 struct i2c_client *client;
1672 struct i2c_board_info board_info;
1673 struct m88ds3103_platform_data pdata = {};
1674
1675 pdata.clk = cfg->clock;
1676 pdata.i2c_wr_max = cfg->i2c_wr_max;
1677 pdata.ts_mode = cfg->ts_mode;
1678 pdata.ts_clk = cfg->ts_clk;
1679 pdata.ts_clk_pol = cfg->ts_clk_pol;
1680 pdata.spec_inv = cfg->spec_inv;
1681 pdata.agc = cfg->agc;
1682 pdata.agc_inv = cfg->agc_inv;
1683 pdata.clk_out = cfg->clock_out;
1684 pdata.envelope_mode = cfg->envelope_mode;
1685 pdata.lnb_hv_pol = cfg->lnb_hv_pol;
1686 pdata.lnb_en_pol = cfg->lnb_en_pol;
1687 pdata.attach_in_use = true;
1688
1689 memset(&board_info, 0, sizeof(board_info));
1690 strscpy(board_info.type, "m88ds3103", I2C_NAME_SIZE);
1691 board_info.addr = cfg->i2c_addr;
1692 board_info.platform_data = &pdata;
1693 client = i2c_new_client_device(i2c, &board_info);
1694 if (!i2c_client_has_driver(client))
1695 return NULL;
1696
1697 *tuner_i2c_adapter = pdata.get_i2c_adapter(client);
1698 return pdata.get_dvb_frontend(client);
1699}
1700EXPORT_SYMBOL(m88ds3103_attach);
1701
1702static const struct dvb_frontend_ops m88ds3103_ops = {
1703 .delsys = {SYS_DVBS, SYS_DVBS2},
1704 .info = {
1705 .name = "Montage Technology M88DS3103",
1706 .frequency_min_hz = 950 * MHz,
1707 .frequency_max_hz = 2150 * MHz,
1708 .frequency_tolerance_hz = 5 * MHz,
1709 .symbol_rate_min = 1000000,
1710 .symbol_rate_max = 45000000,
1711 .caps = FE_CAN_INVERSION_AUTO |
1712 FE_CAN_FEC_1_2 |
1713 FE_CAN_FEC_2_3 |
1714 FE_CAN_FEC_3_4 |
1715 FE_CAN_FEC_4_5 |
1716 FE_CAN_FEC_5_6 |
1717 FE_CAN_FEC_6_7 |
1718 FE_CAN_FEC_7_8 |
1719 FE_CAN_FEC_8_9 |
1720 FE_CAN_FEC_AUTO |
1721 FE_CAN_QPSK |
1722 FE_CAN_RECOVER |
1723 FE_CAN_2G_MODULATION
1724 },
1725
1726 .release = m88ds3103_release,
1727
1728 .get_tune_settings = m88ds3103_get_tune_settings,
1729
1730 .init = m88ds3103_init,
1731 .sleep = m88ds3103_sleep,
1732
1733 .set_frontend = m88ds3103_set_frontend,
1734 .get_frontend = m88ds3103_get_frontend,
1735
1736 .read_status = m88ds3103_read_status,
1737 .read_snr = m88ds3103_read_snr,
1738 .read_ber = m88ds3103_read_ber,
1739
1740 .diseqc_send_master_cmd = m88ds3103_diseqc_send_master_cmd,
1741 .diseqc_send_burst = m88ds3103_diseqc_send_burst,
1742
1743 .set_tone = m88ds3103_set_tone,
1744 .set_voltage = m88ds3103_set_voltage,
1745};
1746
1747static struct dvb_frontend *m88ds3103_get_dvb_frontend(struct i2c_client *client)
1748{
1749 struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1750
1751 dev_dbg(&client->dev, "\n");
1752
1753 return &dev->fe;
1754}
1755
1756static struct i2c_adapter *m88ds3103_get_i2c_adapter(struct i2c_client *client)
1757{
1758 struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1759
1760 dev_dbg(&client->dev, "\n");
1761
1762 return dev->muxc->adapter[0];
1763}
1764
1765static int m88ds3103_probe(struct i2c_client *client,
1766 const struct i2c_device_id *id)
1767{
1768 struct m88ds3103_dev *dev;
1769 struct m88ds3103_platform_data *pdata = client->dev.platform_data;
1770 int ret;
1771 unsigned int utmp;
1772
1773 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1774 if (!dev) {
1775 ret = -ENOMEM;
1776 goto err;
1777 }
1778
1779 dev->client = client;
1780 dev->config.clock = pdata->clk;
1781 dev->config.i2c_wr_max = pdata->i2c_wr_max;
1782 dev->config.ts_mode = pdata->ts_mode;
1783 dev->config.ts_clk = pdata->ts_clk * 1000;
1784 dev->config.ts_clk_pol = pdata->ts_clk_pol;
1785 dev->config.spec_inv = pdata->spec_inv;
1786 dev->config.agc_inv = pdata->agc_inv;
1787 dev->config.clock_out = pdata->clk_out;
1788 dev->config.envelope_mode = pdata->envelope_mode;
1789 dev->config.agc = pdata->agc;
1790 dev->config.lnb_hv_pol = pdata->lnb_hv_pol;
1791 dev->config.lnb_en_pol = pdata->lnb_en_pol;
1792 dev->cfg = &dev->config;
1793
1794 dev->regmap_config.reg_bits = 8,
1795 dev->regmap_config.val_bits = 8,
1796 dev->regmap_config.lock_arg = dev,
1797 dev->regmap = devm_regmap_init_i2c(client, &dev->regmap_config);
1798 if (IS_ERR(dev->regmap)) {
1799 ret = PTR_ERR(dev->regmap);
1800 goto err_kfree;
1801 }
1802
1803
1804 ret = regmap_read(dev->regmap, 0x00, &utmp);
1805 if (ret)
1806 goto err_kfree;
1807
1808 dev->chip_id = utmp >> 1;
1809 dev->chiptype = (u8)id->driver_data;
1810
1811 dev_dbg(&client->dev, "chip_id=%02x\n", dev->chip_id);
1812
1813 switch (dev->chip_id) {
1814 case M88RS6000_CHIP_ID:
1815 case M88DS3103_CHIP_ID:
1816 break;
1817 default:
1818 ret = -ENODEV;
1819 dev_err(&client->dev, "Unknown device. Chip_id=%02x\n", dev->chip_id);
1820 goto err_kfree;
1821 }
1822
1823 switch (dev->cfg->clock_out) {
1824 case M88DS3103_CLOCK_OUT_DISABLED:
1825 utmp = 0x80;
1826 break;
1827 case M88DS3103_CLOCK_OUT_ENABLED:
1828 utmp = 0x00;
1829 break;
1830 case M88DS3103_CLOCK_OUT_ENABLED_DIV2:
1831 utmp = 0x10;
1832 break;
1833 default:
1834 ret = -EINVAL;
1835 goto err_kfree;
1836 }
1837
1838 if (!pdata->ts_clk) {
1839 ret = -EINVAL;
1840 goto err_kfree;
1841 }
1842
1843
1844
1845 if (dev->chip_id == M88RS6000_CHIP_ID)
1846 utmp = 0x00;
1847
1848 ret = regmap_write(dev->regmap, 0x29, utmp);
1849 if (ret)
1850 goto err_kfree;
1851
1852
1853 ret = m88ds3103_update_bits(dev, 0x08, 0x01, 0x00);
1854 if (ret)
1855 goto err_kfree;
1856 ret = m88ds3103_update_bits(dev, 0x04, 0x01, 0x01);
1857 if (ret)
1858 goto err_kfree;
1859 ret = m88ds3103_update_bits(dev, 0x23, 0x10, 0x10);
1860 if (ret)
1861 goto err_kfree;
1862
1863
1864 dev->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, 0,
1865 m88ds3103_select, NULL);
1866 if (!dev->muxc) {
1867 ret = -ENOMEM;
1868 goto err_kfree;
1869 }
1870 dev->muxc->priv = dev;
1871 ret = i2c_mux_add_adapter(dev->muxc, 0, 0, 0);
1872 if (ret)
1873 goto err_kfree;
1874
1875
1876 memcpy(&dev->fe.ops, &m88ds3103_ops, sizeof(struct dvb_frontend_ops));
1877 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B)
1878 strscpy(dev->fe.ops.info.name, "Montage Technology M88DS3103B",
1879 sizeof(dev->fe.ops.info.name));
1880 else if (dev->chip_id == M88RS6000_CHIP_ID)
1881 strscpy(dev->fe.ops.info.name, "Montage Technology M88RS6000",
1882 sizeof(dev->fe.ops.info.name));
1883 if (!pdata->attach_in_use)
1884 dev->fe.ops.release = NULL;
1885 dev->fe.demodulator_priv = dev;
1886 i2c_set_clientdata(client, dev);
1887
1888
1889 pdata->get_dvb_frontend = m88ds3103_get_dvb_frontend;
1890 pdata->get_i2c_adapter = m88ds3103_get_i2c_adapter;
1891
1892 if (dev->chiptype == M88DS3103_CHIPTYPE_3103B) {
1893
1894 m88ds3103_update_bits(dev, 0x11, 0x01, 0x01);
1895
1896
1897 ret = regmap_read(dev->regmap, 0x29, &utmp);
1898 if (ret)
1899 goto err_kfree;
1900 dev->dt_addr = ((utmp & 0x80) == 0) ? 0x42 >> 1 : 0x40 >> 1;
1901 dev_err(&client->dev, "dt addr is 0x%02x", dev->dt_addr);
1902
1903 dev->dt_client = i2c_new_dummy_device(client->adapter,
1904 dev->dt_addr);
1905 if (!dev->dt_client) {
1906 ret = -ENODEV;
1907 goto err_kfree;
1908 }
1909 }
1910
1911 return 0;
1912err_kfree:
1913 kfree(dev);
1914err:
1915 dev_dbg(&client->dev, "failed=%d\n", ret);
1916 return ret;
1917}
1918
1919static int m88ds3103_remove(struct i2c_client *client)
1920{
1921 struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1922
1923 dev_dbg(&client->dev, "\n");
1924
1925 if (dev->dt_client)
1926 i2c_unregister_device(dev->dt_client);
1927
1928 i2c_mux_del_adapters(dev->muxc);
1929
1930 kfree(dev);
1931 return 0;
1932}
1933
1934static const struct i2c_device_id m88ds3103_id_table[] = {
1935 {"m88ds3103", M88DS3103_CHIPTYPE_3103},
1936 {"m88rs6000", M88DS3103_CHIPTYPE_RS6000},
1937 {"m88ds3103b", M88DS3103_CHIPTYPE_3103B},
1938 {}
1939};
1940MODULE_DEVICE_TABLE(i2c, m88ds3103_id_table);
1941
1942static struct i2c_driver m88ds3103_driver = {
1943 .driver = {
1944 .name = "m88ds3103",
1945 .suppress_bind_attrs = true,
1946 },
1947 .probe = m88ds3103_probe,
1948 .remove = m88ds3103_remove,
1949 .id_table = m88ds3103_id_table,
1950};
1951
1952module_i2c_driver(m88ds3103_driver);
1953
1954MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1955MODULE_DESCRIPTION("Montage Technology M88DS3103 DVB-S/S2 demodulator driver");
1956MODULE_LICENSE("GPL");
1957MODULE_FIRMWARE(M88DS3103_FIRMWARE);
1958MODULE_FIRMWARE(M88RS6000_FIRMWARE);
1959MODULE_FIRMWARE(M88DS3103B_FIRMWARE);
1960
