linux/drivers/net/wireless/intel/iwlwifi/dvm/commands.h
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   1/******************************************************************************
   2 *
   3 * This file is provided under a dual BSD/GPLv2 license.  When using or
   4 * redistributing this file, you may do so under either license.
   5 *
   6 * GPL LICENSE SUMMARY
   7 *
   8 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of version 2 of the GNU General Public License as
  12 * published by the Free Software Foundation.
  13 *
  14 * This program is distributed in the hope that it will be useful, but
  15 * WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17 * General Public License for more details.
  18 *
  19 * The full GNU General Public License is included in this distribution
  20 * in the file called COPYING.
  21 *
  22 * Contact Information:
  23 *  Intel Linux Wireless <linuxwifi@intel.com>
  24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25 *
  26 * BSD LICENSE
  27 *
  28 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  29 * All rights reserved.
  30 *
  31 * Redistribution and use in source and binary forms, with or without
  32 * modification, are permitted provided that the following conditions
  33 * are met:
  34 *
  35 *  * Redistributions of source code must retain the above copyright
  36 *    notice, this list of conditions and the following disclaimer.
  37 *  * Redistributions in binary form must reproduce the above copyright
  38 *    notice, this list of conditions and the following disclaimer in
  39 *    the documentation and/or other materials provided with the
  40 *    distribution.
  41 *  * Neither the name Intel Corporation nor the names of its
  42 *    contributors may be used to endorse or promote products derived
  43 *    from this software without specific prior written permission.
  44 *
  45 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  46 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  47 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  48 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  49 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  51 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  52 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  53 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  54 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  55 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  56 *
  57 *****************************************************************************/
  58/*
  59 * Please use this file (commands.h) only for uCode API definitions.
  60 * Please use iwl-xxxx-hw.h for hardware-related definitions.
  61 * Please use dev.h for driver implementation definitions.
  62 */
  63
  64#ifndef __iwl_commands_h__
  65#define __iwl_commands_h__
  66
  67#include <linux/ieee80211.h>
  68#include <linux/types.h>
  69
  70
  71enum {
  72        REPLY_ALIVE = 0x1,
  73        REPLY_ERROR = 0x2,
  74        REPLY_ECHO = 0x3,               /* test command */
  75
  76        /* RXON and QOS commands */
  77        REPLY_RXON = 0x10,
  78        REPLY_RXON_ASSOC = 0x11,
  79        REPLY_QOS_PARAM = 0x13,
  80        REPLY_RXON_TIMING = 0x14,
  81
  82        /* Multi-Station support */
  83        REPLY_ADD_STA = 0x18,
  84        REPLY_REMOVE_STA = 0x19,
  85        REPLY_REMOVE_ALL_STA = 0x1a,    /* not used */
  86        REPLY_TXFIFO_FLUSH = 0x1e,
  87
  88        /* Security */
  89        REPLY_WEPKEY = 0x20,
  90
  91        /* RX, TX, LEDs */
  92        REPLY_TX = 0x1c,
  93        REPLY_LEDS_CMD = 0x48,
  94        REPLY_TX_LINK_QUALITY_CMD = 0x4e,
  95
  96        /* WiMAX coexistence */
  97        COEX_PRIORITY_TABLE_CMD = 0x5a,
  98        COEX_MEDIUM_NOTIFICATION = 0x5b,
  99        COEX_EVENT_CMD = 0x5c,
 100
 101        /* Calibration */
 102        TEMPERATURE_NOTIFICATION = 0x62,
 103        CALIBRATION_CFG_CMD = 0x65,
 104        CALIBRATION_RES_NOTIFICATION = 0x66,
 105        CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
 106
 107        /* 802.11h related */
 108        REPLY_QUIET_CMD = 0x71,         /* not used */
 109        REPLY_CHANNEL_SWITCH = 0x72,
 110        CHANNEL_SWITCH_NOTIFICATION = 0x73,
 111        REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
 112        SPECTRUM_MEASURE_NOTIFICATION = 0x75,
 113
 114        /* Power Management */
 115        POWER_TABLE_CMD = 0x77,
 116        PM_SLEEP_NOTIFICATION = 0x7A,
 117        PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
 118
 119        /* Scan commands and notifications */
 120        REPLY_SCAN_CMD = 0x80,
 121        REPLY_SCAN_ABORT_CMD = 0x81,
 122        SCAN_START_NOTIFICATION = 0x82,
 123        SCAN_RESULTS_NOTIFICATION = 0x83,
 124        SCAN_COMPLETE_NOTIFICATION = 0x84,
 125
 126        /* IBSS/AP commands */
 127        BEACON_NOTIFICATION = 0x90,
 128        REPLY_TX_BEACON = 0x91,
 129        WHO_IS_AWAKE_NOTIFICATION = 0x94,       /* not used */
 130
 131        /* Miscellaneous commands */
 132        REPLY_TX_POWER_DBM_CMD = 0x95,
 133        QUIET_NOTIFICATION = 0x96,              /* not used */
 134        REPLY_TX_PWR_TABLE_CMD = 0x97,
 135        REPLY_TX_POWER_DBM_CMD_V1 = 0x98,       /* old version of API */
 136        TX_ANT_CONFIGURATION_CMD = 0x98,
 137        MEASURE_ABORT_NOTIFICATION = 0x99,      /* not used */
 138
 139        /* Bluetooth device coexistence config command */
 140        REPLY_BT_CONFIG = 0x9b,
 141
 142        /* Statistics */
 143        REPLY_STATISTICS_CMD = 0x9c,
 144        STATISTICS_NOTIFICATION = 0x9d,
 145
 146        /* RF-KILL commands and notifications */
 147        REPLY_CARD_STATE_CMD = 0xa0,
 148        CARD_STATE_NOTIFICATION = 0xa1,
 149
 150        /* Missed beacons notification */
 151        MISSED_BEACONS_NOTIFICATION = 0xa2,
 152
 153        REPLY_CT_KILL_CONFIG_CMD = 0xa4,
 154        SENSITIVITY_CMD = 0xa8,
 155        REPLY_PHY_CALIBRATION_CMD = 0xb0,
 156        REPLY_RX_PHY_CMD = 0xc0,
 157        REPLY_RX_MPDU_CMD = 0xc1,
 158        REPLY_RX = 0xc3,
 159        REPLY_COMPRESSED_BA = 0xc5,
 160
 161        /* BT Coex */
 162        REPLY_BT_COEX_PRIO_TABLE = 0xcc,
 163        REPLY_BT_COEX_PROT_ENV = 0xcd,
 164        REPLY_BT_COEX_PROFILE_NOTIF = 0xce,
 165
 166        /* PAN commands */
 167        REPLY_WIPAN_PARAMS = 0xb2,
 168        REPLY_WIPAN_RXON = 0xb3,        /* use REPLY_RXON structure */
 169        REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
 170        REPLY_WIPAN_RXON_ASSOC = 0xb6,  /* use REPLY_RXON_ASSOC structure */
 171        REPLY_WIPAN_QOS_PARAM = 0xb7,   /* use REPLY_QOS_PARAM structure */
 172        REPLY_WIPAN_WEPKEY = 0xb8,      /* use REPLY_WEPKEY structure */
 173        REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9,
 174        REPLY_WIPAN_NOA_NOTIFICATION = 0xbc,
 175        REPLY_WIPAN_DEACTIVATION_COMPLETE = 0xbd,
 176
 177        REPLY_WOWLAN_PATTERNS = 0xe0,
 178        REPLY_WOWLAN_WAKEUP_FILTER = 0xe1,
 179        REPLY_WOWLAN_TSC_RSC_PARAMS = 0xe2,
 180        REPLY_WOWLAN_TKIP_PARAMS = 0xe3,
 181        REPLY_WOWLAN_KEK_KCK_MATERIAL = 0xe4,
 182        REPLY_WOWLAN_GET_STATUS = 0xe5,
 183        REPLY_D3_CONFIG = 0xd3,
 184
 185        REPLY_MAX = 0xff
 186};
 187
 188/*
 189 * Minimum number of queues. MAX_NUM is defined in hw specific files.
 190 * Set the minimum to accommodate
 191 *  - 4 standard TX queues
 192 *  - the command queue
 193 *  - 4 PAN TX queues
 194 *  - the PAN multicast queue, and
 195 *  - the AUX (TX during scan dwell) queue.
 196 */
 197#define IWL_MIN_NUM_QUEUES      11
 198
 199/*
 200 * Command queue depends on iPAN support.
 201 */
 202#define IWL_DEFAULT_CMD_QUEUE_NUM       4
 203#define IWL_IPAN_CMD_QUEUE_NUM          9
 204
 205#define IWL_TX_FIFO_BK          0       /* shared */
 206#define IWL_TX_FIFO_BE          1
 207#define IWL_TX_FIFO_VI          2       /* shared */
 208#define IWL_TX_FIFO_VO          3
 209#define IWL_TX_FIFO_BK_IPAN     IWL_TX_FIFO_BK
 210#define IWL_TX_FIFO_BE_IPAN     4
 211#define IWL_TX_FIFO_VI_IPAN     IWL_TX_FIFO_VI
 212#define IWL_TX_FIFO_VO_IPAN     5
 213/* re-uses the VO FIFO, uCode will properly flush/schedule */
 214#define IWL_TX_FIFO_AUX         5
 215#define IWL_TX_FIFO_UNUSED      255
 216
 217#define IWLAGN_CMD_FIFO_NUM     7
 218
 219/*
 220 * This queue number is required for proper operation
 221 * because the ucode will stop/start the scheduler as
 222 * required.
 223 */
 224#define IWL_IPAN_MCAST_QUEUE    8
 225
 226/******************************************************************************
 227 * (0)
 228 * Commonly used structures and definitions:
 229 * Command header, rate_n_flags, txpower
 230 *
 231 *****************************************************************************/
 232
 233/**
 234 * iwlagn rate_n_flags bit fields
 235 *
 236 * rate_n_flags format is used in following iwlagn commands:
 237 *  REPLY_RX (response only)
 238 *  REPLY_RX_MPDU (response only)
 239 *  REPLY_TX (both command and response)
 240 *  REPLY_TX_LINK_QUALITY_CMD
 241 *
 242 * High-throughput (HT) rate format for bits 7:0 (bit 8 must be "1"):
 243 *  2-0:  0)   6 Mbps
 244 *        1)  12 Mbps
 245 *        2)  18 Mbps
 246 *        3)  24 Mbps
 247 *        4)  36 Mbps
 248 *        5)  48 Mbps
 249 *        6)  54 Mbps
 250 *        7)  60 Mbps
 251 *
 252 *  4-3:  0)  Single stream (SISO)
 253 *        1)  Dual stream (MIMO)
 254 *        2)  Triple stream (MIMO)
 255 *
 256 *    5:  Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
 257 *
 258 * Legacy OFDM rate format for bits 7:0 (bit 8 must be "0", bit 9 "0"):
 259 *  3-0:  0xD)   6 Mbps
 260 *        0xF)   9 Mbps
 261 *        0x5)  12 Mbps
 262 *        0x7)  18 Mbps
 263 *        0x9)  24 Mbps
 264 *        0xB)  36 Mbps
 265 *        0x1)  48 Mbps
 266 *        0x3)  54 Mbps
 267 *
 268 * Legacy CCK rate format for bits 7:0 (bit 8 must be "0", bit 9 "1"):
 269 *  6-0:   10)  1 Mbps
 270 *         20)  2 Mbps
 271 *         55)  5.5 Mbps
 272 *        110)  11 Mbps
 273 */
 274#define RATE_MCS_CODE_MSK 0x7
 275#define RATE_MCS_SPATIAL_POS 3
 276#define RATE_MCS_SPATIAL_MSK 0x18
 277#define RATE_MCS_HT_DUP_POS 5
 278#define RATE_MCS_HT_DUP_MSK 0x20
 279/* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
 280#define RATE_MCS_RATE_MSK 0xff
 281
 282/* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
 283#define RATE_MCS_FLAGS_POS 8
 284#define RATE_MCS_HT_POS 8
 285#define RATE_MCS_HT_MSK 0x100
 286
 287/* Bit 9: (1) CCK, (0) OFDM.  HT (bit 8) must be "0" for this bit to be valid */
 288#define RATE_MCS_CCK_POS 9
 289#define RATE_MCS_CCK_MSK 0x200
 290
 291/* Bit 10: (1) Use Green Field preamble */
 292#define RATE_MCS_GF_POS 10
 293#define RATE_MCS_GF_MSK 0x400
 294
 295/* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
 296#define RATE_MCS_HT40_POS 11
 297#define RATE_MCS_HT40_MSK 0x800
 298
 299/* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
 300#define RATE_MCS_DUP_POS 12
 301#define RATE_MCS_DUP_MSK 0x1000
 302
 303/* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
 304#define RATE_MCS_SGI_POS 13
 305#define RATE_MCS_SGI_MSK 0x2000
 306
 307/**
 308 * rate_n_flags Tx antenna masks
 309 * bit14:16
 310 */
 311#define RATE_MCS_ANT_POS        14
 312#define RATE_MCS_ANT_A_MSK      0x04000
 313#define RATE_MCS_ANT_B_MSK      0x08000
 314#define RATE_MCS_ANT_C_MSK      0x10000
 315#define RATE_MCS_ANT_AB_MSK     (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
 316#define RATE_MCS_ANT_ABC_MSK    (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
 317#define RATE_ANT_NUM 3
 318
 319#define POWER_TABLE_NUM_ENTRIES                 33
 320#define POWER_TABLE_NUM_HT_OFDM_ENTRIES         32
 321#define POWER_TABLE_CCK_ENTRY                   32
 322
 323#define IWL_PWR_NUM_HT_OFDM_ENTRIES             24
 324#define IWL_PWR_CCK_ENTRIES                     2
 325
 326/**
 327 * struct tx_power_dual_stream
 328 *
 329 * Table entries in REPLY_TX_PWR_TABLE_CMD, REPLY_CHANNEL_SWITCH
 330 *
 331 * Same format as iwl_tx_power_dual_stream, but __le32
 332 */
 333struct tx_power_dual_stream {
 334        __le32 dw;
 335} __packed;
 336
 337/**
 338 * Command REPLY_TX_POWER_DBM_CMD = 0x98
 339 * struct iwlagn_tx_power_dbm_cmd
 340 */
 341#define IWLAGN_TX_POWER_AUTO 0x7f
 342#define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
 343
 344struct iwlagn_tx_power_dbm_cmd {
 345        s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
 346        u8 flags;
 347        s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
 348        u8 reserved;
 349} __packed;
 350
 351/**
 352 * Command TX_ANT_CONFIGURATION_CMD = 0x98
 353 * This command is used to configure valid Tx antenna.
 354 * By default uCode concludes the valid antenna according to the radio flavor.
 355 * This command enables the driver to override/modify this conclusion.
 356 */
 357struct iwl_tx_ant_config_cmd {
 358        __le32 valid;
 359} __packed;
 360
 361/******************************************************************************
 362 * (0a)
 363 * Alive and Error Commands & Responses:
 364 *
 365 *****************************************************************************/
 366
 367#define UCODE_VALID_OK  cpu_to_le32(0x1)
 368
 369/**
 370 * REPLY_ALIVE = 0x1 (response only, not a command)
 371 *
 372 * uCode issues this "alive" notification once the runtime image is ready
 373 * to receive commands from the driver.  This is the *second* "alive"
 374 * notification that the driver will receive after rebooting uCode;
 375 * this "alive" is indicated by subtype field != 9.
 376 *
 377 * See comments documenting "BSM" (bootstrap state machine).
 378 *
 379 * This response includes two pointers to structures within the device's
 380 * data SRAM (access via HBUS_TARG_MEM_* regs) that are useful for debugging:
 381 *
 382 * 1)  log_event_table_ptr indicates base of the event log.  This traces
 383 *     a 256-entry history of uCode execution within a circular buffer.
 384 *     Its header format is:
 385 *
 386 *      __le32 log_size;     log capacity (in number of entries)
 387 *      __le32 type;         (1) timestamp with each entry, (0) no timestamp
 388 *      __le32 wraps;        # times uCode has wrapped to top of circular buffer
 389 *      __le32 write_index;  next circular buffer entry that uCode would fill
 390 *
 391 *     The header is followed by the circular buffer of log entries.  Entries
 392 *     with timestamps have the following format:
 393 *
 394 *      __le32 event_id;     range 0 - 1500
 395 *      __le32 timestamp;    low 32 bits of TSF (of network, if associated)
 396 *      __le32 data;         event_id-specific data value
 397 *
 398 *     Entries without timestamps contain only event_id and data.
 399 *
 400 *
 401 * 2)  error_event_table_ptr indicates base of the error log.  This contains
 402 *     information about any uCode error that occurs.  For agn, the format
 403 *     of the error log is defined by struct iwl_error_event_table.
 404 *
 405 * The Linux driver can print both logs to the system log when a uCode error
 406 * occurs.
 407 */
 408
 409/*
 410 * Note: This structure is read from the device with IO accesses,
 411 * and the reading already does the endian conversion. As it is
 412 * read with u32-sized accesses, any members with a different size
 413 * need to be ordered correctly though!
 414 */
 415struct iwl_error_event_table {
 416        u32 valid;              /* (nonzero) valid, (0) log is empty */
 417        u32 error_id;           /* type of error */
 418        u32 pc;                 /* program counter */
 419        u32 blink1;             /* branch link */
 420        u32 blink2;             /* branch link */
 421        u32 ilink1;             /* interrupt link */
 422        u32 ilink2;             /* interrupt link */
 423        u32 data1;              /* error-specific data */
 424        u32 data2;              /* error-specific data */
 425        u32 line;               /* source code line of error */
 426        u32 bcon_time;          /* beacon timer */
 427        u32 tsf_low;            /* network timestamp function timer */
 428        u32 tsf_hi;             /* network timestamp function timer */
 429        u32 gp1;                /* GP1 timer register */
 430        u32 gp2;                /* GP2 timer register */
 431        u32 gp3;                /* GP3 timer register */
 432        u32 ucode_ver;          /* uCode version */
 433        u32 hw_ver;             /* HW Silicon version */
 434        u32 brd_ver;            /* HW board version */
 435        u32 log_pc;             /* log program counter */
 436        u32 frame_ptr;          /* frame pointer */
 437        u32 stack_ptr;          /* stack pointer */
 438        u32 hcmd;               /* last host command header */
 439        u32 isr0;               /* isr status register LMPM_NIC_ISR0:
 440                                 * rxtx_flag */
 441        u32 isr1;               /* isr status register LMPM_NIC_ISR1:
 442                                 * host_flag */
 443        u32 isr2;               /* isr status register LMPM_NIC_ISR2:
 444                                 * enc_flag */
 445        u32 isr3;               /* isr status register LMPM_NIC_ISR3:
 446                                 * time_flag */
 447        u32 isr4;               /* isr status register LMPM_NIC_ISR4:
 448                                 * wico interrupt */
 449        u32 isr_pref;           /* isr status register LMPM_NIC_PREF_STAT */
 450        u32 wait_event;         /* wait event() caller address */
 451        u32 l2p_control;        /* L2pControlField */
 452        u32 l2p_duration;       /* L2pDurationField */
 453        u32 l2p_mhvalid;        /* L2pMhValidBits */
 454        u32 l2p_addr_match;     /* L2pAddrMatchStat */
 455        u32 lmpm_pmg_sel;       /* indicate which clocks are turned on
 456                                 * (LMPM_PMG_SEL) */
 457        u32 u_timestamp;        /* indicate when the date and time of the
 458                                 * compilation */
 459        u32 flow_handler;       /* FH read/write pointers, RX credit */
 460} __packed;
 461
 462struct iwl_alive_resp {
 463        u8 ucode_minor;
 464        u8 ucode_major;
 465        __le16 reserved1;
 466        u8 sw_rev[8];
 467        u8 ver_type;
 468        u8 ver_subtype;                 /* not "9" for runtime alive */
 469        __le16 reserved2;
 470        __le32 log_event_table_ptr;     /* SRAM address for event log */
 471        __le32 error_event_table_ptr;   /* SRAM address for error log */
 472        __le32 timestamp;
 473        __le32 is_valid;
 474} __packed;
 475
 476/*
 477 * REPLY_ERROR = 0x2 (response only, not a command)
 478 */
 479struct iwl_error_resp {
 480        __le32 error_type;
 481        u8 cmd_id;
 482        u8 reserved1;
 483        __le16 bad_cmd_seq_num;
 484        __le32 error_info;
 485        __le64 timestamp;
 486} __packed;
 487
 488/******************************************************************************
 489 * (1)
 490 * RXON Commands & Responses:
 491 *
 492 *****************************************************************************/
 493
 494/*
 495 * Rx config defines & structure
 496 */
 497/* rx_config device types  */
 498enum {
 499        RXON_DEV_TYPE_AP = 1,
 500        RXON_DEV_TYPE_ESS = 3,
 501        RXON_DEV_TYPE_IBSS = 4,
 502        RXON_DEV_TYPE_SNIFFER = 6,
 503        RXON_DEV_TYPE_CP = 7,
 504        RXON_DEV_TYPE_2STA = 8,
 505        RXON_DEV_TYPE_P2P = 9,
 506};
 507
 508
 509#define RXON_RX_CHAIN_DRIVER_FORCE_MSK          cpu_to_le16(0x1 << 0)
 510#define RXON_RX_CHAIN_DRIVER_FORCE_POS          (0)
 511#define RXON_RX_CHAIN_VALID_MSK                 cpu_to_le16(0x7 << 1)
 512#define RXON_RX_CHAIN_VALID_POS                 (1)
 513#define RXON_RX_CHAIN_FORCE_SEL_MSK             cpu_to_le16(0x7 << 4)
 514#define RXON_RX_CHAIN_FORCE_SEL_POS             (4)
 515#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK        cpu_to_le16(0x7 << 7)
 516#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS        (7)
 517#define RXON_RX_CHAIN_CNT_MSK                   cpu_to_le16(0x3 << 10)
 518#define RXON_RX_CHAIN_CNT_POS                   (10)
 519#define RXON_RX_CHAIN_MIMO_CNT_MSK              cpu_to_le16(0x3 << 12)
 520#define RXON_RX_CHAIN_MIMO_CNT_POS              (12)
 521#define RXON_RX_CHAIN_MIMO_FORCE_MSK            cpu_to_le16(0x1 << 14)
 522#define RXON_RX_CHAIN_MIMO_FORCE_POS            (14)
 523
 524/* rx_config flags */
 525/* band & modulation selection */
 526#define RXON_FLG_BAND_24G_MSK           cpu_to_le32(1 << 0)
 527#define RXON_FLG_CCK_MSK                cpu_to_le32(1 << 1)
 528/* auto detection enable */
 529#define RXON_FLG_AUTO_DETECT_MSK        cpu_to_le32(1 << 2)
 530/* TGg protection when tx */
 531#define RXON_FLG_TGG_PROTECT_MSK        cpu_to_le32(1 << 3)
 532/* cck short slot & preamble */
 533#define RXON_FLG_SHORT_SLOT_MSK          cpu_to_le32(1 << 4)
 534#define RXON_FLG_SHORT_PREAMBLE_MSK     cpu_to_le32(1 << 5)
 535/* antenna selection */
 536#define RXON_FLG_DIS_DIV_MSK            cpu_to_le32(1 << 7)
 537#define RXON_FLG_ANT_SEL_MSK            cpu_to_le32(0x0f00)
 538#define RXON_FLG_ANT_A_MSK              cpu_to_le32(1 << 8)
 539#define RXON_FLG_ANT_B_MSK              cpu_to_le32(1 << 9)
 540/* radar detection enable */
 541#define RXON_FLG_RADAR_DETECT_MSK       cpu_to_le32(1 << 12)
 542#define RXON_FLG_TGJ_NARROW_BAND_MSK    cpu_to_le32(1 << 13)
 543/* rx response to host with 8-byte TSF
 544* (according to ON_AIR deassertion) */
 545#define RXON_FLG_TSF2HOST_MSK           cpu_to_le32(1 << 15)
 546
 547
 548/* HT flags */
 549#define RXON_FLG_CTRL_CHANNEL_LOC_POS           (22)
 550#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK        cpu_to_le32(0x1 << 22)
 551
 552#define RXON_FLG_HT_OPERATING_MODE_POS          (23)
 553
 554#define RXON_FLG_HT_PROT_MSK                    cpu_to_le32(0x1 << 23)
 555#define RXON_FLG_HT40_PROT_MSK                  cpu_to_le32(0x2 << 23)
 556
 557#define RXON_FLG_CHANNEL_MODE_POS               (25)
 558#define RXON_FLG_CHANNEL_MODE_MSK               cpu_to_le32(0x3 << 25)
 559
 560/* channel mode */
 561enum {
 562        CHANNEL_MODE_LEGACY = 0,
 563        CHANNEL_MODE_PURE_40 = 1,
 564        CHANNEL_MODE_MIXED = 2,
 565        CHANNEL_MODE_RESERVED = 3,
 566};
 567#define RXON_FLG_CHANNEL_MODE_LEGACY    cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
 568#define RXON_FLG_CHANNEL_MODE_PURE_40   cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
 569#define RXON_FLG_CHANNEL_MODE_MIXED     cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
 570
 571/* CTS to self (if spec allows) flag */
 572#define RXON_FLG_SELF_CTS_EN                    cpu_to_le32(0x1<<30)
 573
 574/* rx_config filter flags */
 575/* accept all data frames */
 576#define RXON_FILTER_PROMISC_MSK         cpu_to_le32(1 << 0)
 577/* pass control & management to host */
 578#define RXON_FILTER_CTL2HOST_MSK        cpu_to_le32(1 << 1)
 579/* accept multi-cast */
 580#define RXON_FILTER_ACCEPT_GRP_MSK      cpu_to_le32(1 << 2)
 581/* don't decrypt uni-cast frames */
 582#define RXON_FILTER_DIS_DECRYPT_MSK     cpu_to_le32(1 << 3)
 583/* don't decrypt multi-cast frames */
 584#define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
 585/* STA is associated */
 586#define RXON_FILTER_ASSOC_MSK           cpu_to_le32(1 << 5)
 587/* transfer to host non bssid beacons in associated state */
 588#define RXON_FILTER_BCON_AWARE_MSK      cpu_to_le32(1 << 6)
 589
 590/**
 591 * REPLY_RXON = 0x10 (command, has simple generic response)
 592 *
 593 * RXON tunes the radio tuner to a service channel, and sets up a number
 594 * of parameters that are used primarily for Rx, but also for Tx operations.
 595 *
 596 * NOTE:  When tuning to a new channel, driver must set the
 597 *        RXON_FILTER_ASSOC_MSK to 0.  This will clear station-dependent
 598 *        info within the device, including the station tables, tx retry
 599 *        rate tables, and txpower tables.  Driver must build a new station
 600 *        table and txpower table before transmitting anything on the RXON
 601 *        channel.
 602 *
 603 * NOTE:  All RXONs wipe clean the internal txpower table.  Driver must
 604 *        issue a new REPLY_TX_PWR_TABLE_CMD after each REPLY_RXON (0x10),
 605 *        regardless of whether RXON_FILTER_ASSOC_MSK is set.
 606 */
 607
 608struct iwl_rxon_cmd {
 609        u8 node_addr[6];
 610        __le16 reserved1;
 611        u8 bssid_addr[6];
 612        __le16 reserved2;
 613        u8 wlap_bssid_addr[6];
 614        __le16 reserved3;
 615        u8 dev_type;
 616        u8 air_propagation;
 617        __le16 rx_chain;
 618        u8 ofdm_basic_rates;
 619        u8 cck_basic_rates;
 620        __le16 assoc_id;
 621        __le32 flags;
 622        __le32 filter_flags;
 623        __le16 channel;
 624        u8 ofdm_ht_single_stream_basic_rates;
 625        u8 ofdm_ht_dual_stream_basic_rates;
 626        u8 ofdm_ht_triple_stream_basic_rates;
 627        u8 reserved5;
 628        __le16 acquisition_data;
 629        __le16 reserved6;
 630} __packed;
 631
 632/*
 633 * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
 634 */
 635struct iwl_rxon_assoc_cmd {
 636        __le32 flags;
 637        __le32 filter_flags;
 638        u8 ofdm_basic_rates;
 639        u8 cck_basic_rates;
 640        __le16 reserved1;
 641        u8 ofdm_ht_single_stream_basic_rates;
 642        u8 ofdm_ht_dual_stream_basic_rates;
 643        u8 ofdm_ht_triple_stream_basic_rates;
 644        u8 reserved2;
 645        __le16 rx_chain_select_flags;
 646        __le16 acquisition_data;
 647        __le32 reserved3;
 648} __packed;
 649
 650#define IWL_CONN_MAX_LISTEN_INTERVAL    10
 651#define IWL_MAX_UCODE_BEACON_INTERVAL   4 /* 4096 */
 652
 653/*
 654 * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
 655 */
 656struct iwl_rxon_time_cmd {
 657        __le64 timestamp;
 658        __le16 beacon_interval;
 659        __le16 atim_window;
 660        __le32 beacon_init_val;
 661        __le16 listen_interval;
 662        u8 dtim_period;
 663        u8 delta_cp_bss_tbtts;
 664} __packed;
 665
 666/*
 667 * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
 668 */
 669/**
 670 * struct iwl5000_channel_switch_cmd
 671 * @band: 0- 5.2GHz, 1- 2.4GHz
 672 * @expect_beacon: 0- resume transmits after channel switch
 673 *                 1- wait for beacon to resume transmits
 674 * @channel: new channel number
 675 * @rxon_flags: Rx on flags
 676 * @rxon_filter_flags: filtering parameters
 677 * @switch_time: switch time in extended beacon format
 678 * @reserved: reserved bytes
 679 */
 680struct iwl5000_channel_switch_cmd {
 681        u8 band;
 682        u8 expect_beacon;
 683        __le16 channel;
 684        __le32 rxon_flags;
 685        __le32 rxon_filter_flags;
 686        __le32 switch_time;
 687        __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
 688} __packed;
 689
 690/**
 691 * struct iwl6000_channel_switch_cmd
 692 * @band: 0- 5.2GHz, 1- 2.4GHz
 693 * @expect_beacon: 0- resume transmits after channel switch
 694 *                 1- wait for beacon to resume transmits
 695 * @channel: new channel number
 696 * @rxon_flags: Rx on flags
 697 * @rxon_filter_flags: filtering parameters
 698 * @switch_time: switch time in extended beacon format
 699 * @reserved: reserved bytes
 700 */
 701struct iwl6000_channel_switch_cmd {
 702        u8 band;
 703        u8 expect_beacon;
 704        __le16 channel;
 705        __le32 rxon_flags;
 706        __le32 rxon_filter_flags;
 707        __le32 switch_time;
 708        __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
 709} __packed;
 710
 711/*
 712 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
 713 */
 714struct iwl_csa_notification {
 715        __le16 band;
 716        __le16 channel;
 717        __le32 status;          /* 0 - OK, 1 - fail */
 718} __packed;
 719
 720/******************************************************************************
 721 * (2)
 722 * Quality-of-Service (QOS) Commands & Responses:
 723 *
 724 *****************************************************************************/
 725
 726/**
 727 * struct iwl_ac_qos -- QOS timing params for REPLY_QOS_PARAM
 728 * One for each of 4 EDCA access categories in struct iwl_qosparam_cmd
 729 *
 730 * @cw_min: Contention window, start value in numbers of slots.
 731 *          Should be a power-of-2, minus 1.  Device's default is 0x0f.
 732 * @cw_max: Contention window, max value in numbers of slots.
 733 *          Should be a power-of-2, minus 1.  Device's default is 0x3f.
 734 * @aifsn:  Number of slots in Arbitration Interframe Space (before
 735 *          performing random backoff timing prior to Tx).  Device default 1.
 736 * @edca_txop:  Length of Tx opportunity, in uSecs.  Device default is 0.
 737 *
 738 * Device will automatically increase contention window by (2*CW) + 1 for each
 739 * transmission retry.  Device uses cw_max as a bit mask, ANDed with new CW
 740 * value, to cap the CW value.
 741 */
 742struct iwl_ac_qos {
 743        __le16 cw_min;
 744        __le16 cw_max;
 745        u8 aifsn;
 746        u8 reserved1;
 747        __le16 edca_txop;
 748} __packed;
 749
 750/* QoS flags defines */
 751#define QOS_PARAM_FLG_UPDATE_EDCA_MSK   cpu_to_le32(0x01)
 752#define QOS_PARAM_FLG_TGN_MSK           cpu_to_le32(0x02)
 753#define QOS_PARAM_FLG_TXOP_TYPE_MSK     cpu_to_le32(0x10)
 754
 755/* Number of Access Categories (AC) (EDCA), queues 0..3 */
 756#define AC_NUM                4
 757
 758/*
 759 * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
 760 *
 761 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
 762 * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
 763 */
 764struct iwl_qosparam_cmd {
 765        __le32 qos_flags;
 766        struct iwl_ac_qos ac[AC_NUM];
 767} __packed;
 768
 769/******************************************************************************
 770 * (3)
 771 * Add/Modify Stations Commands & Responses:
 772 *
 773 *****************************************************************************/
 774/*
 775 * Multi station support
 776 */
 777
 778/* Special, dedicated locations within device's station table */
 779#define IWL_AP_ID               0
 780#define IWL_AP_ID_PAN           1
 781#define IWL_STA_ID              2
 782#define IWLAGN_PAN_BCAST_ID     14
 783#define IWLAGN_BROADCAST_ID     15
 784#define IWLAGN_STATION_COUNT    16
 785
 786#define IWL_TID_NON_QOS IWL_MAX_TID_COUNT
 787
 788#define STA_FLG_TX_RATE_MSK             cpu_to_le32(1 << 2)
 789#define STA_FLG_PWR_SAVE_MSK            cpu_to_le32(1 << 8)
 790#define STA_FLG_PAN_STATION             cpu_to_le32(1 << 13)
 791#define STA_FLG_RTS_MIMO_PROT_MSK       cpu_to_le32(1 << 17)
 792#define STA_FLG_AGG_MPDU_8US_MSK        cpu_to_le32(1 << 18)
 793#define STA_FLG_MAX_AGG_SIZE_POS        (19)
 794#define STA_FLG_MAX_AGG_SIZE_MSK        cpu_to_le32(3 << 19)
 795#define STA_FLG_HT40_EN_MSK             cpu_to_le32(1 << 21)
 796#define STA_FLG_MIMO_DIS_MSK            cpu_to_le32(1 << 22)
 797#define STA_FLG_AGG_MPDU_DENSITY_POS    (23)
 798#define STA_FLG_AGG_MPDU_DENSITY_MSK    cpu_to_le32(7 << 23)
 799
 800/* Use in mode field.  1: modify existing entry, 0: add new station entry */
 801#define STA_CONTROL_MODIFY_MSK          0x01
 802
 803/* key flags __le16*/
 804#define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
 805#define STA_KEY_FLG_NO_ENC      cpu_to_le16(0x0000)
 806#define STA_KEY_FLG_WEP         cpu_to_le16(0x0001)
 807#define STA_KEY_FLG_CCMP        cpu_to_le16(0x0002)
 808#define STA_KEY_FLG_TKIP        cpu_to_le16(0x0003)
 809
 810#define STA_KEY_FLG_KEYID_POS   8
 811#define STA_KEY_FLG_INVALID     cpu_to_le16(0x0800)
 812/* wep key is either from global key (0) or from station info array (1) */
 813#define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
 814
 815/* wep key in STA: 5-bytes (0) or 13-bytes (1) */
 816#define STA_KEY_FLG_KEY_SIZE_MSK     cpu_to_le16(0x1000)
 817#define STA_KEY_MULTICAST_MSK        cpu_to_le16(0x4000)
 818#define STA_KEY_MAX_NUM         8
 819#define STA_KEY_MAX_NUM_PAN     16
 820/* must not match WEP_INVALID_OFFSET */
 821#define IWLAGN_HW_KEY_DEFAULT   0xfe
 822
 823/* Flags indicate whether to modify vs. don't change various station params */
 824#define STA_MODIFY_KEY_MASK             0x01
 825#define STA_MODIFY_TID_DISABLE_TX       0x02
 826#define STA_MODIFY_TX_RATE_MSK          0x04
 827#define STA_MODIFY_ADDBA_TID_MSK        0x08
 828#define STA_MODIFY_DELBA_TID_MSK        0x10
 829#define STA_MODIFY_SLEEP_TX_COUNT_MSK   0x20
 830
 831/* agn */
 832struct iwl_keyinfo {
 833        __le16 key_flags;
 834        u8 tkip_rx_tsc_byte2;   /* TSC[2] for key mix ph1 detection */
 835        u8 reserved1;
 836        __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
 837        u8 key_offset;
 838        u8 reserved2;
 839        u8 key[16];             /* 16-byte unicast decryption key */
 840        __le64 tx_secur_seq_cnt;
 841        __le64 hw_tkip_mic_rx_key;
 842        __le64 hw_tkip_mic_tx_key;
 843} __packed;
 844
 845/**
 846 * struct sta_id_modify
 847 * @addr[ETH_ALEN]: station's MAC address
 848 * @sta_id: index of station in uCode's station table
 849 * @modify_mask: STA_MODIFY_*, 1: modify, 0: don't change
 850 *
 851 * Driver selects unused table index when adding new station,
 852 * or the index to a pre-existing station entry when modifying that station.
 853 * Some indexes have special purposes (IWL_AP_ID, index 0, is for AP).
 854 *
 855 * modify_mask flags select which parameters to modify vs. leave alone.
 856 */
 857struct sta_id_modify {
 858        u8 addr[ETH_ALEN];
 859        __le16 reserved1;
 860        u8 sta_id;
 861        u8 modify_mask;
 862        __le16 reserved2;
 863} __packed;
 864
 865/*
 866 * REPLY_ADD_STA = 0x18 (command)
 867 *
 868 * The device contains an internal table of per-station information,
 869 * with info on security keys, aggregation parameters, and Tx rates for
 870 * initial Tx attempt and any retries (agn devices uses
 871 * REPLY_TX_LINK_QUALITY_CMD,
 872 *
 873 * REPLY_ADD_STA sets up the table entry for one station, either creating
 874 * a new entry, or modifying a pre-existing one.
 875 *
 876 * NOTE:  RXON command (without "associated" bit set) wipes the station table
 877 *        clean.  Moving into RF_KILL state does this also.  Driver must set up
 878 *        new station table before transmitting anything on the RXON channel
 879 *        (except active scans or active measurements; those commands carry
 880 *        their own txpower/rate setup data).
 881 *
 882 *        When getting started on a new channel, driver must set up the
 883 *        IWL_BROADCAST_ID entry (last entry in the table).  For a client
 884 *        station in a BSS, once an AP is selected, driver sets up the AP STA
 885 *        in the IWL_AP_ID entry (1st entry in the table).  BROADCAST and AP
 886 *        are all that are needed for a BSS client station.  If the device is
 887 *        used as AP, or in an IBSS network, driver must set up station table
 888 *        entries for all STAs in network, starting with index IWL_STA_ID.
 889 */
 890
 891struct iwl_addsta_cmd {
 892        u8 mode;                /* 1: modify existing, 0: add new station */
 893        u8 reserved[3];
 894        struct sta_id_modify sta;
 895        struct iwl_keyinfo key;
 896        __le32 station_flags;           /* STA_FLG_* */
 897        __le32 station_flags_msk;       /* STA_FLG_* */
 898
 899        /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
 900         * corresponding to bit (e.g. bit 5 controls TID 5).
 901         * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
 902        __le16 tid_disable_tx;
 903        __le16 legacy_reserved;
 904
 905        /* TID for which to add block-ack support.
 906         * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
 907        u8 add_immediate_ba_tid;
 908
 909        /* TID for which to remove block-ack support.
 910         * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
 911        u8 remove_immediate_ba_tid;
 912
 913        /* Starting Sequence Number for added block-ack support.
 914         * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
 915        __le16 add_immediate_ba_ssn;
 916
 917        /*
 918         * Number of packets OK to transmit to station even though
 919         * it is asleep -- used to synchronise PS-poll and u-APSD
 920         * responses while ucode keeps track of STA sleep state.
 921         */
 922        __le16 sleep_tx_count;
 923
 924        __le16 reserved2;
 925} __packed;
 926
 927
 928#define ADD_STA_SUCCESS_MSK             0x1
 929#define ADD_STA_NO_ROOM_IN_TABLE        0x2
 930#define ADD_STA_NO_BLOCK_ACK_RESOURCE   0x4
 931#define ADD_STA_MODIFY_NON_EXIST_STA    0x8
 932/*
 933 * REPLY_ADD_STA = 0x18 (response)
 934 */
 935struct iwl_add_sta_resp {
 936        u8 status;      /* ADD_STA_* */
 937} __packed;
 938
 939#define REM_STA_SUCCESS_MSK              0x1
 940/*
 941 *  REPLY_REM_STA = 0x19 (response)
 942 */
 943struct iwl_rem_sta_resp {
 944        u8 status;
 945} __packed;
 946
 947/*
 948 *  REPLY_REM_STA = 0x19 (command)
 949 */
 950struct iwl_rem_sta_cmd {
 951        u8 num_sta;     /* number of removed stations */
 952        u8 reserved[3];
 953        u8 addr[ETH_ALEN]; /* MAC addr of the first station */
 954        u8 reserved2[2];
 955} __packed;
 956
 957
 958/* WiFi queues mask */
 959#define IWL_SCD_BK_MSK                  BIT(0)
 960#define IWL_SCD_BE_MSK                  BIT(1)
 961#define IWL_SCD_VI_MSK                  BIT(2)
 962#define IWL_SCD_VO_MSK                  BIT(3)
 963#define IWL_SCD_MGMT_MSK                BIT(3)
 964
 965/* PAN queues mask */
 966#define IWL_PAN_SCD_BK_MSK              BIT(4)
 967#define IWL_PAN_SCD_BE_MSK              BIT(5)
 968#define IWL_PAN_SCD_VI_MSK              BIT(6)
 969#define IWL_PAN_SCD_VO_MSK              BIT(7)
 970#define IWL_PAN_SCD_MGMT_MSK            BIT(7)
 971#define IWL_PAN_SCD_MULTICAST_MSK       BIT(8)
 972
 973#define IWL_AGG_TX_QUEUE_MSK            0xffc00
 974
 975#define IWL_DROP_ALL                    BIT(1)
 976
 977/*
 978 * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
 979 *
 980 * When using full FIFO flush this command checks the scheduler HW block WR/RD
 981 * pointers to check if all the frames were transferred by DMA into the
 982 * relevant TX FIFO queue. Only when the DMA is finished and the queue is
 983 * empty the command can finish.
 984 * This command is used to flush the TXFIFO from transmit commands, it may
 985 * operate on single or multiple queues, the command queue can't be flushed by
 986 * this command. The command response is returned when all the queue flush
 987 * operations are done. Each TX command flushed return response with the FLUSH
 988 * status set in the TX response status. When FIFO flush operation is used,
 989 * the flush operation ends when both the scheduler DMA done and TXFIFO empty
 990 * are set.
 991 *
 992 * @queue_control: bit mask for which queues to flush
 993 * @flush_control: flush controls
 994 *      0: Dump single MSDU
 995 *      1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
 996 *      2: Dump all FIFO
 997 */
 998struct iwl_txfifo_flush_cmd_v3 {
 999        __le32 queue_control;
1000        __le16 flush_control;
1001        __le16 reserved;
1002} __packed;
1003
1004struct iwl_txfifo_flush_cmd_v2 {
1005        __le16 queue_control;
1006        __le16 flush_control;
1007} __packed;
1008
1009/*
1010 * REPLY_WEP_KEY = 0x20
1011 */
1012struct iwl_wep_key {
1013        u8 key_index;
1014        u8 key_offset;
1015        u8 reserved1[2];
1016        u8 key_size;
1017        u8 reserved2[3];
1018        u8 key[16];
1019} __packed;
1020
1021struct iwl_wep_cmd {
1022        u8 num_keys;
1023        u8 global_key_type;
1024        u8 flags;
1025        u8 reserved;
1026        struct iwl_wep_key key[0];
1027} __packed;
1028
1029#define WEP_KEY_WEP_TYPE 1
1030#define WEP_KEYS_MAX 4
1031#define WEP_INVALID_OFFSET 0xff
1032#define WEP_KEY_LEN_64 5
1033#define WEP_KEY_LEN_128 13
1034
1035/******************************************************************************
1036 * (4)
1037 * Rx Responses:
1038 *
1039 *****************************************************************************/
1040
1041#define RX_RES_STATUS_NO_CRC32_ERROR    cpu_to_le32(1 << 0)
1042#define RX_RES_STATUS_NO_RXE_OVERFLOW   cpu_to_le32(1 << 1)
1043
1044#define RX_RES_PHY_FLAGS_BAND_24_MSK    cpu_to_le16(1 << 0)
1045#define RX_RES_PHY_FLAGS_MOD_CCK_MSK            cpu_to_le16(1 << 1)
1046#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK     cpu_to_le16(1 << 2)
1047#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK        cpu_to_le16(1 << 3)
1048#define RX_RES_PHY_FLAGS_ANTENNA_MSK            0x70
1049#define RX_RES_PHY_FLAGS_ANTENNA_POS            4
1050#define RX_RES_PHY_FLAGS_AGG_MSK                cpu_to_le16(1 << 7)
1051
1052#define RX_RES_STATUS_SEC_TYPE_MSK      (0x7 << 8)
1053#define RX_RES_STATUS_SEC_TYPE_NONE     (0x0 << 8)
1054#define RX_RES_STATUS_SEC_TYPE_WEP      (0x1 << 8)
1055#define RX_RES_STATUS_SEC_TYPE_CCMP     (0x2 << 8)
1056#define RX_RES_STATUS_SEC_TYPE_TKIP     (0x3 << 8)
1057#define RX_RES_STATUS_SEC_TYPE_ERR      (0x7 << 8)
1058
1059#define RX_RES_STATUS_STATION_FOUND     (1<<6)
1060#define RX_RES_STATUS_NO_STATION_INFO_MISMATCH  (1<<7)
1061
1062#define RX_RES_STATUS_DECRYPT_TYPE_MSK  (0x3 << 11)
1063#define RX_RES_STATUS_NOT_DECRYPT       (0x0 << 11)
1064#define RX_RES_STATUS_DECRYPT_OK        (0x3 << 11)
1065#define RX_RES_STATUS_BAD_ICV_MIC       (0x1 << 11)
1066#define RX_RES_STATUS_BAD_KEY_TTAK      (0x2 << 11)
1067
1068#define RX_MPDU_RES_STATUS_ICV_OK       (0x20)
1069#define RX_MPDU_RES_STATUS_MIC_OK       (0x40)
1070#define RX_MPDU_RES_STATUS_TTAK_OK      (1 << 7)
1071#define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1072
1073
1074#define IWLAGN_RX_RES_PHY_CNT 8
1075#define IWLAGN_RX_RES_AGC_IDX     1
1076#define IWLAGN_RX_RES_RSSI_AB_IDX 2
1077#define IWLAGN_RX_RES_RSSI_C_IDX  3
1078#define IWLAGN_OFDM_AGC_MSK 0xfe00
1079#define IWLAGN_OFDM_AGC_BIT_POS 9
1080#define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1081#define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1082#define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1083#define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1084#define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1085#define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1086#define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1087#define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1088#define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1089
1090struct iwlagn_non_cfg_phy {
1091        __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT];  /* up to 8 phy entries */
1092} __packed;
1093
1094
1095/*
1096 * REPLY_RX = 0xc3 (response only, not a command)
1097 * Used only for legacy (non 11n) frames.
1098 */
1099struct iwl_rx_phy_res {
1100        u8 non_cfg_phy_cnt;     /* non configurable DSP phy data byte count */
1101        u8 cfg_phy_cnt;         /* configurable DSP phy data byte count */
1102        u8 stat_id;             /* configurable DSP phy data set ID */
1103        u8 reserved1;
1104        __le64 timestamp;       /* TSF at on air rise */
1105        __le32 beacon_time_stamp; /* beacon at on-air rise */
1106        __le16 phy_flags;       /* general phy flags: band, modulation, ... */
1107        __le16 channel;         /* channel number */
1108        u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
1109        __le32 rate_n_flags;    /* RATE_MCS_* */
1110        __le16 byte_count;      /* frame's byte-count */
1111        __le16 frame_time;      /* frame's time on the air */
1112} __packed;
1113
1114struct iwl_rx_mpdu_res_start {
1115        __le16 byte_count;
1116        __le16 reserved;
1117} __packed;
1118
1119
1120/******************************************************************************
1121 * (5)
1122 * Tx Commands & Responses:
1123 *
1124 * Driver must place each REPLY_TX command into one of the prioritized Tx
1125 * queues in host DRAM, shared between driver and device (see comments for
1126 * SCD registers and Tx/Rx Queues).  When the device's Tx scheduler and uCode
1127 * are preparing to transmit, the device pulls the Tx command over the PCI
1128 * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1129 * from which data will be transmitted.
1130 *
1131 * uCode handles all timing and protocol related to control frames
1132 * (RTS/CTS/ACK), based on flags in the Tx command.  uCode and Tx scheduler
1133 * handle reception of block-acks; uCode updates the host driver via
1134 * REPLY_COMPRESSED_BA.
1135 *
1136 * uCode handles retrying Tx when an ACK is expected but not received.
1137 * This includes trying lower data rates than the one requested in the Tx
1138 * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn).
1139 *
1140 * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1141 * This command must be executed after every RXON command, before Tx can occur.
1142 *****************************************************************************/
1143
1144/* REPLY_TX Tx flags field */
1145
1146/*
1147 * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
1148 * before this frame. if CTS-to-self required check
1149 * RXON_FLG_SELF_CTS_EN status.
1150 */
1151#define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
1152
1153/* 1: Expect ACK from receiving station
1154 * 0: Don't expect ACK (MAC header's duration field s/b 0)
1155 * Set this for unicast frames, but not broadcast/multicast. */
1156#define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
1157
1158/* For agn devices:
1159 * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1160 *    Tx command's initial_rate_index indicates first rate to try;
1161 *    uCode walks through table for additional Tx attempts.
1162 * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1163 *    This rate will be used for all Tx attempts; it will not be scaled. */
1164#define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
1165
1166/* 1: Expect immediate block-ack.
1167 * Set when Txing a block-ack request frame.  Also set TX_CMD_FLG_ACK_MSK. */
1168#define TX_CMD_FLG_IMM_BA_RSP_MASK  cpu_to_le32(1 << 6)
1169
1170/* Tx antenna selection field; reserved (0) for agn devices. */
1171#define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1172
1173/* 1: Ignore Bluetooth priority for this frame.
1174 * 0: Delay Tx until Bluetooth device is done (normal usage). */
1175#define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
1176
1177/* 1: uCode overrides sequence control field in MAC header.
1178 * 0: Driver provides sequence control field in MAC header.
1179 * Set this for management frames, non-QOS data frames, non-unicast frames,
1180 * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
1181#define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
1182
1183/* 1: This frame is non-last MPDU; more fragments are coming.
1184 * 0: Last fragment, or not using fragmentation. */
1185#define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
1186
1187/* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1188 * 0: No TSF required in outgoing frame.
1189 * Set this for transmitting beacons and probe responses. */
1190#define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
1191
1192/* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1193 *    alignment of frame's payload data field.
1194 * 0: No pad
1195 * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1196 * field (but not both).  Driver must align frame data (i.e. data following
1197 * MAC header) to DWORD boundary. */
1198#define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
1199
1200/* accelerate aggregation support
1201 * 0 - no CCMP encryption; 1 - CCMP encryption */
1202#define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
1203
1204/* HCCA-AP - disable duration overwriting. */
1205#define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
1206
1207
1208/*
1209 * TX command security control
1210 */
1211#define TX_CMD_SEC_WEP          0x01
1212#define TX_CMD_SEC_CCM          0x02
1213#define TX_CMD_SEC_TKIP         0x03
1214#define TX_CMD_SEC_MSK          0x03
1215#define TX_CMD_SEC_SHIFT        6
1216#define TX_CMD_SEC_KEY128       0x08
1217
1218/*
1219 * REPLY_TX = 0x1c (command)
1220 */
1221
1222/*
1223 * Used for managing Tx retries when expecting block-acks.
1224 * Driver should set these fields to 0.
1225 */
1226struct iwl_dram_scratch {
1227        u8 try_cnt;             /* Tx attempts */
1228        u8 bt_kill_cnt;         /* Tx attempts blocked by Bluetooth device */
1229        __le16 reserved;
1230} __packed;
1231
1232struct iwl_tx_cmd {
1233        /*
1234         * MPDU byte count:
1235         * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1236         * + 8 byte IV for CCM or TKIP (not used for WEP)
1237         * + Data payload
1238         * + 8-byte MIC (not used for CCM/WEP)
1239         * NOTE:  Does not include Tx command bytes, post-MAC pad bytes,
1240         *        MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1241         * Range: 14-2342 bytes.
1242         */
1243        __le16 len;
1244
1245        /*
1246         * MPDU or MSDU byte count for next frame.
1247         * Used for fragmentation and bursting, but not 11n aggregation.
1248         * Same as "len", but for next frame.  Set to 0 if not applicable.
1249         */
1250        __le16 next_frame_len;
1251
1252        __le32 tx_flags;        /* TX_CMD_FLG_* */
1253
1254        /* uCode may modify this field of the Tx command (in host DRAM!).
1255         * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
1256        struct iwl_dram_scratch scratch;
1257
1258        /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1259        __le32 rate_n_flags;    /* RATE_MCS_* */
1260
1261        /* Index of destination station in uCode's station table */
1262        u8 sta_id;
1263
1264        /* Type of security encryption:  CCM or TKIP */
1265        u8 sec_ctl;             /* TX_CMD_SEC_* */
1266
1267        /*
1268         * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1269         * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set.  Normally "0" for
1270         * data frames, this field may be used to selectively reduce initial
1271         * rate (via non-0 value) for special frames (e.g. management), while
1272         * still supporting rate scaling for all frames.
1273         */
1274        u8 initial_rate_index;
1275        u8 reserved;
1276        u8 key[16];
1277        __le16 next_frame_flags;
1278        __le16 reserved2;
1279        union {
1280                __le32 life_time;
1281                __le32 attempt;
1282        } stop_time;
1283
1284        /* Host DRAM physical address pointer to "scratch" in this command.
1285         * Must be dword aligned.  "0" in dram_lsb_ptr disables usage. */
1286        __le32 dram_lsb_ptr;
1287        u8 dram_msb_ptr;
1288
1289        u8 rts_retry_limit;     /*byte 50 */
1290        u8 data_retry_limit;    /*byte 51 */
1291        u8 tid_tspec;
1292        union {
1293                __le16 pm_frame_timeout;
1294                __le16 attempt_duration;
1295        } timeout;
1296
1297        /*
1298         * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1299         * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1300         */
1301        __le16 driver_txop;
1302
1303        /*
1304         * MAC header goes here, followed by 2 bytes padding if MAC header
1305         * length is 26 or 30 bytes, followed by payload data
1306         */
1307        u8 payload[0];
1308        struct ieee80211_hdr hdr[0];
1309} __packed;
1310
1311/*
1312 * TX command response is sent after *agn* transmission attempts.
1313 *
1314 * both postpone and abort status are expected behavior from uCode. there is
1315 * no special operation required from driver; except for RFKILL_FLUSH,
1316 * which required tx flush host command to flush all the tx frames in queues
1317 */
1318enum {
1319        TX_STATUS_SUCCESS = 0x01,
1320        TX_STATUS_DIRECT_DONE = 0x02,
1321        /* postpone TX */
1322        TX_STATUS_POSTPONE_DELAY = 0x40,
1323        TX_STATUS_POSTPONE_FEW_BYTES = 0x41,
1324        TX_STATUS_POSTPONE_BT_PRIO = 0x42,
1325        TX_STATUS_POSTPONE_QUIET_PERIOD = 0x43,
1326        TX_STATUS_POSTPONE_CALC_TTAK = 0x44,
1327        /* abort TX */
1328        TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY = 0x81,
1329        TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
1330        TX_STATUS_FAIL_LONG_LIMIT = 0x83,
1331        TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
1332        TX_STATUS_FAIL_DRAIN_FLOW = 0x85,
1333        TX_STATUS_FAIL_RFKILL_FLUSH = 0x86,
1334        TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
1335        TX_STATUS_FAIL_DEST_PS = 0x88,
1336        TX_STATUS_FAIL_HOST_ABORTED = 0x89,
1337        TX_STATUS_FAIL_BT_RETRY = 0x8a,
1338        TX_STATUS_FAIL_STA_INVALID = 0x8b,
1339        TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
1340        TX_STATUS_FAIL_TID_DISABLE = 0x8d,
1341        TX_STATUS_FAIL_FIFO_FLUSHED = 0x8e,
1342        TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
1343        TX_STATUS_FAIL_PASSIVE_NO_RX = 0x90,
1344        TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
1345};
1346
1347#define TX_PACKET_MODE_REGULAR          0x0000
1348#define TX_PACKET_MODE_BURST_SEQ        0x0100
1349#define TX_PACKET_MODE_BURST_FIRST      0x0200
1350
1351enum {
1352        TX_POWER_PA_NOT_ACTIVE = 0x0,
1353};
1354
1355enum {
1356        TX_STATUS_MSK = 0x000000ff,             /* bits 0:7 */
1357        TX_STATUS_DELAY_MSK = 0x00000040,
1358        TX_STATUS_ABORT_MSK = 0x00000080,
1359        TX_PACKET_MODE_MSK = 0x0000ff00,        /* bits 8:15 */
1360        TX_FIFO_NUMBER_MSK = 0x00070000,        /* bits 16:18 */
1361        TX_RESERVED = 0x00780000,               /* bits 19:22 */
1362        TX_POWER_PA_DETECT_MSK = 0x7f800000,    /* bits 23:30 */
1363        TX_ABORT_REQUIRED_MSK = 0x80000000,     /* bits 31:31 */
1364};
1365
1366/* *******************************
1367 * TX aggregation status
1368 ******************************* */
1369
1370enum {
1371        AGG_TX_STATE_TRANSMITTED = 0x00,
1372        AGG_TX_STATE_UNDERRUN_MSK = 0x01,
1373        AGG_TX_STATE_BT_PRIO_MSK = 0x02,
1374        AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
1375        AGG_TX_STATE_ABORT_MSK = 0x08,
1376        AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
1377        AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
1378        AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
1379        AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
1380        AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
1381        AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
1382        AGG_TX_STATE_DUMP_TX_MSK = 0x200,
1383        AGG_TX_STATE_DELAY_TX_MSK = 0x400
1384};
1385
1386#define AGG_TX_STATUS_MSK       0x00000fff      /* bits 0:11 */
1387#define AGG_TX_TRY_MSK          0x0000f000      /* bits 12:15 */
1388#define AGG_TX_TRY_POS          12
1389
1390#define AGG_TX_STATE_LAST_SENT_MSK  (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1391                                     AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1392                                     AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
1393
1394/* # tx attempts for first frame in aggregation */
1395#define AGG_TX_STATE_TRY_CNT_POS 12
1396#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1397
1398/* Command ID and sequence number of Tx command for this frame */
1399#define AGG_TX_STATE_SEQ_NUM_POS 16
1400#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1401
1402/*
1403 * REPLY_TX = 0x1c (response)
1404 *
1405 * This response may be in one of two slightly different formats, indicated
1406 * by the frame_count field:
1407 *
1408 * 1)  No aggregation (frame_count == 1).  This reports Tx results for
1409 *     a single frame.  Multiple attempts, at various bit rates, may have
1410 *     been made for this frame.
1411 *
1412 * 2)  Aggregation (frame_count > 1).  This reports Tx results for
1413 *     2 or more frames that used block-acknowledge.  All frames were
1414 *     transmitted at same rate.  Rate scaling may have been used if first
1415 *     frame in this new agg block failed in previous agg block(s).
1416 *
1417 *     Note that, for aggregation, ACK (block-ack) status is not delivered here;
1418 *     block-ack has not been received by the time the agn device records
1419 *     this status.
1420 *     This status relates to reasons the tx might have been blocked or aborted
1421 *     within the sending station (this agn device), rather than whether it was
1422 *     received successfully by the destination station.
1423 */
1424struct agg_tx_status {
1425        __le16 status;
1426        __le16 sequence;
1427} __packed;
1428
1429/* refer to ra_tid */
1430#define IWLAGN_TX_RES_TID_POS   0
1431#define IWLAGN_TX_RES_TID_MSK   0x0f
1432#define IWLAGN_TX_RES_RA_POS    4
1433#define IWLAGN_TX_RES_RA_MSK    0xf0
1434
1435struct iwlagn_tx_resp {
1436        u8 frame_count;         /* 1 no aggregation, >1 aggregation */
1437        u8 bt_kill_count;       /* # blocked by bluetooth (unused for agg) */
1438        u8 failure_rts;         /* # failures due to unsuccessful RTS */
1439        u8 failure_frame;       /* # failures due to no ACK (unused for agg) */
1440
1441        /* For non-agg:  Rate at which frame was successful.
1442         * For agg:  Rate at which all frames were transmitted. */
1443        __le32 rate_n_flags;    /* RATE_MCS_*  */
1444
1445        /* For non-agg:  RTS + CTS + frame tx attempts time + ACK.
1446         * For agg:  RTS + CTS + aggregation tx time + block-ack time. */
1447        __le16 wireless_media_time;     /* uSecs */
1448
1449        u8 pa_status;           /* RF power amplifier measurement (not used) */
1450        u8 pa_integ_res_a[3];
1451        u8 pa_integ_res_b[3];
1452        u8 pa_integ_res_C[3];
1453
1454        __le32 tfd_info;
1455        __le16 seq_ctl;
1456        __le16 byte_cnt;
1457        u8 tlc_info;
1458        u8 ra_tid;              /* tid (0:3), sta_id (4:7) */
1459        __le16 frame_ctrl;
1460        /*
1461         * For non-agg:  frame status TX_STATUS_*
1462         * For agg:  status of 1st frame, AGG_TX_STATE_*; other frame status
1463         *           fields follow this one, up to frame_count.
1464         *           Bit fields:
1465         *           11- 0:  AGG_TX_STATE_* status code
1466         *           15-12:  Retry count for 1st frame in aggregation (retries
1467         *                   occur if tx failed for this frame when it was a
1468         *                   member of a previous aggregation block).  If rate
1469         *                   scaling is used, retry count indicates the rate
1470         *                   table entry used for all frames in the new agg.
1471         *           31-16:  Sequence # for this frame's Tx cmd (not SSN!)
1472         */
1473        struct agg_tx_status status;    /* TX status (in aggregation -
1474                                         * status of 1st frame) */
1475} __packed;
1476/*
1477 * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
1478 *
1479 * Reports Block-Acknowledge from recipient station
1480 */
1481struct iwl_compressed_ba_resp {
1482        __le32 sta_addr_lo32;
1483        __le16 sta_addr_hi16;
1484        __le16 reserved;
1485
1486        /* Index of recipient (BA-sending) station in uCode's station table */
1487        u8 sta_id;
1488        u8 tid;
1489        __le16 seq_ctl;
1490        __le64 bitmap;
1491        __le16 scd_flow;
1492        __le16 scd_ssn;
1493        u8 txed;        /* number of frames sent */
1494        u8 txed_2_done; /* number of frames acked */
1495        __le16 reserved1;
1496} __packed;
1497
1498/*
1499 * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
1500 *
1501 */
1502
1503/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1504#define  LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK    (1 << 0)
1505
1506/* # of EDCA prioritized tx fifos */
1507#define  LINK_QUAL_AC_NUM AC_NUM
1508
1509/* # entries in rate scale table to support Tx retries */
1510#define  LINK_QUAL_MAX_RETRY_NUM 16
1511
1512/* Tx antenna selection values */
1513#define  LINK_QUAL_ANT_A_MSK (1 << 0)
1514#define  LINK_QUAL_ANT_B_MSK (1 << 1)
1515#define  LINK_QUAL_ANT_MSK   (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1516
1517
1518/**
1519 * struct iwl_link_qual_general_params
1520 *
1521 * Used in REPLY_TX_LINK_QUALITY_CMD
1522 */
1523struct iwl_link_qual_general_params {
1524        u8 flags;
1525
1526        /* No entries at or above this (driver chosen) index contain MIMO */
1527        u8 mimo_delimiter;
1528
1529        /* Best single antenna to use for single stream (legacy, SISO). */
1530        u8 single_stream_ant_msk;       /* LINK_QUAL_ANT_* */
1531
1532        /* Best antennas to use for MIMO */
1533        u8 dual_stream_ant_msk;         /* LINK_QUAL_ANT_* */
1534
1535        /*
1536         * If driver needs to use different initial rates for different
1537         * EDCA QOS access categories (as implemented by tx fifos 0-3),
1538         * this table will set that up, by indicating the indexes in the
1539         * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1540         * Otherwise, driver should set all entries to 0.
1541         *
1542         * Entry usage:
1543         * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1544         * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1545         */
1546        u8 start_rate_index[LINK_QUAL_AC_NUM];
1547} __packed;
1548
1549#define LINK_QUAL_AGG_TIME_LIMIT_DEF    (4000) /* 4 milliseconds */
1550#define LINK_QUAL_AGG_TIME_LIMIT_MAX    (8000)
1551#define LINK_QUAL_AGG_TIME_LIMIT_MIN    (100)
1552
1553#define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1554#define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1555#define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1556
1557#define LINK_QUAL_AGG_FRAME_LIMIT_DEF   (63)
1558#define LINK_QUAL_AGG_FRAME_LIMIT_MAX   (63)
1559#define LINK_QUAL_AGG_FRAME_LIMIT_MIN   (0)
1560
1561/**
1562 * struct iwl_link_qual_agg_params
1563 *
1564 * Used in REPLY_TX_LINK_QUALITY_CMD
1565 */
1566struct iwl_link_qual_agg_params {
1567
1568        /*
1569         *Maximum number of uSec in aggregation.
1570         * default set to 4000 (4 milliseconds) if not configured in .cfg
1571         */
1572        __le16 agg_time_limit;
1573
1574        /*
1575         * Number of Tx retries allowed for a frame, before that frame will
1576         * no longer be considered for the start of an aggregation sequence
1577         * (scheduler will then try to tx it as single frame).
1578         * Driver should set this to 3.
1579         */
1580        u8 agg_dis_start_th;
1581
1582        /*
1583         * Maximum number of frames in aggregation.
1584         * 0 = no limit (default).  1 = no aggregation.
1585         * Other values = max # frames in aggregation.
1586         */
1587        u8 agg_frame_cnt_limit;
1588
1589        __le32 reserved;
1590} __packed;
1591
1592/*
1593 * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
1594 *
1595 * For agn devices
1596 *
1597 * Each station in the agn device's internal station table has its own table
1598 * of 16
1599 * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1600 * an ACK is not received.  This command replaces the entire table for
1601 * one station.
1602 *
1603 * NOTE:  Station must already be in agn device's station table.
1604 *        Use REPLY_ADD_STA.
1605 *
1606 * The rate scaling procedures described below work well.  Of course, other
1607 * procedures are possible, and may work better for particular environments.
1608 *
1609 *
1610 * FILLING THE RATE TABLE
1611 *
1612 * Given a particular initial rate and mode, as determined by the rate
1613 * scaling algorithm described below, the Linux driver uses the following
1614 * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1615 * Link Quality command:
1616 *
1617 *
1618 * 1)  If using High-throughput (HT) (SISO or MIMO) initial rate:
1619 *     a) Use this same initial rate for first 3 entries.
1620 *     b) Find next lower available rate using same mode (SISO or MIMO),
1621 *        use for next 3 entries.  If no lower rate available, switch to
1622 *        legacy mode (no HT40 channel, no MIMO, no short guard interval).
1623 *     c) If using MIMO, set command's mimo_delimiter to number of entries
1624 *        using MIMO (3 or 6).
1625 *     d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
1626 *        no MIMO, no short guard interval), at the next lower bit rate
1627 *        (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1628 *        legacy procedure for remaining table entries.
1629 *
1630 * 2)  If using legacy initial rate:
1631 *     a) Use the initial rate for only one entry.
1632 *     b) For each following entry, reduce the rate to next lower available
1633 *        rate, until reaching the lowest available rate.
1634 *     c) When reducing rate, also switch antenna selection.
1635 *     d) Once lowest available rate is reached, repeat this rate until
1636 *        rate table is filled (16 entries), switching antenna each entry.
1637 *
1638 *
1639 * ACCUMULATING HISTORY
1640 *
1641 * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1642 * uses two sets of frame Tx success history:  One for the current/active
1643 * modulation mode, and one for a speculative/search mode that is being
1644 * attempted. If the speculative mode turns out to be more effective (i.e.
1645 * actual transfer rate is better), then the driver continues to use the
1646 * speculative mode as the new current active mode.
1647 *
1648 * Each history set contains, separately for each possible rate, data for a
1649 * sliding window of the 62 most recent tx attempts at that rate.  The data
1650 * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1651 * and attempted frames, from which the driver can additionally calculate a
1652 * success ratio (success / attempted) and number of failures
1653 * (attempted - success), and control the size of the window (attempted).
1654 * The driver uses the bit map to remove successes from the success sum, as
1655 * the oldest tx attempts fall out of the window.
1656 *
1657 * When the agn device makes multiple tx attempts for a given frame, each
1658 * attempt might be at a different rate, and have different modulation
1659 * characteristics (e.g. antenna, fat channel, short guard interval), as set
1660 * up in the rate scaling table in the Link Quality command.  The driver must
1661 * determine which rate table entry was used for each tx attempt, to determine
1662 * which rate-specific history to update, and record only those attempts that
1663 * match the modulation characteristics of the history set.
1664 *
1665 * When using block-ack (aggregation), all frames are transmitted at the same
1666 * rate, since there is no per-attempt acknowledgment from the destination
1667 * station.  The Tx response struct iwl_tx_resp indicates the Tx rate in
1668 * rate_n_flags field.  After receiving a block-ack, the driver can update
1669 * history for the entire block all at once.
1670 *
1671 *
1672 * FINDING BEST STARTING RATE:
1673 *
1674 * When working with a selected initial modulation mode (see below), the
1675 * driver attempts to find a best initial rate.  The initial rate is the
1676 * first entry in the Link Quality command's rate table.
1677 *
1678 * 1)  Calculate actual throughput (success ratio * expected throughput, see
1679 *     table below) for current initial rate.  Do this only if enough frames
1680 *     have been attempted to make the value meaningful:  at least 6 failed
1681 *     tx attempts, or at least 8 successes.  If not enough, don't try rate
1682 *     scaling yet.
1683 *
1684 * 2)  Find available rates adjacent to current initial rate.  Available means:
1685 *     a)  supported by hardware &&
1686 *     b)  supported by association &&
1687 *     c)  within any constraints selected by user
1688 *
1689 * 3)  Gather measured throughputs for adjacent rates.  These might not have
1690 *     enough history to calculate a throughput.  That's okay, we might try
1691 *     using one of them anyway!
1692 *
1693 * 4)  Try decreasing rate if, for current rate:
1694 *     a)  success ratio is < 15% ||
1695 *     b)  lower adjacent rate has better measured throughput ||
1696 *     c)  higher adjacent rate has worse throughput, and lower is unmeasured
1697 *
1698 *     As a sanity check, if decrease was determined above, leave rate
1699 *     unchanged if:
1700 *     a)  lower rate unavailable
1701 *     b)  success ratio at current rate > 85% (very good)
1702 *     c)  current measured throughput is better than expected throughput
1703 *         of lower rate (under perfect 100% tx conditions, see table below)
1704 *
1705 * 5)  Try increasing rate if, for current rate:
1706 *     a)  success ratio is < 15% ||
1707 *     b)  both adjacent rates' throughputs are unmeasured (try it!) ||
1708 *     b)  higher adjacent rate has better measured throughput ||
1709 *     c)  lower adjacent rate has worse throughput, and higher is unmeasured
1710 *
1711 *     As a sanity check, if increase was determined above, leave rate
1712 *     unchanged if:
1713 *     a)  success ratio at current rate < 70%.  This is not particularly
1714 *         good performance; higher rate is sure to have poorer success.
1715 *
1716 * 6)  Re-evaluate the rate after each tx frame.  If working with block-
1717 *     acknowledge, history and statistics may be calculated for the entire
1718 *     block (including prior history that fits within the history windows),
1719 *     before re-evaluation.
1720 *
1721 * FINDING BEST STARTING MODULATION MODE:
1722 *
1723 * After working with a modulation mode for a "while" (and doing rate scaling),
1724 * the driver searches for a new initial mode in an attempt to improve
1725 * throughput.  The "while" is measured by numbers of attempted frames:
1726 *
1727 * For legacy mode, search for new mode after:
1728 *   480 successful frames, or 160 failed frames
1729 * For high-throughput modes (SISO or MIMO), search for new mode after:
1730 *   4500 successful frames, or 400 failed frames
1731 *
1732 * Mode switch possibilities are (3 for each mode):
1733 *
1734 * For legacy:
1735 *   Change antenna, try SISO (if HT association), try MIMO (if HT association)
1736 * For SISO:
1737 *   Change antenna, try MIMO, try shortened guard interval (SGI)
1738 * For MIMO:
1739 *   Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1740 *
1741 * When trying a new mode, use the same bit rate as the old/current mode when
1742 * trying antenna switches and shortened guard interval.  When switching to
1743 * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1744 * for which the expected throughput (under perfect conditions) is about the
1745 * same or slightly better than the actual measured throughput delivered by
1746 * the old/current mode.
1747 *
1748 * Actual throughput can be estimated by multiplying the expected throughput
1749 * by the success ratio (successful / attempted tx frames).  Frame size is
1750 * not considered in this calculation; it assumes that frame size will average
1751 * out to be fairly consistent over several samples.  The following are
1752 * metric values for expected throughput assuming 100% success ratio.
1753 * Only G band has support for CCK rates:
1754 *
1755 *           RATE:  1    2    5   11    6   9   12   18   24   36   48   54   60
1756 *
1757 *              G:  7   13   35   58   40  57   72   98  121  154  177  186  186
1758 *              A:  0    0    0    0   40  57   72   98  121  154  177  186  186
1759 *     SISO 20MHz:  0    0    0    0   42  42   76  102  124  159  183  193  202
1760 * SGI SISO 20MHz:  0    0    0    0   46  46   82  110  132  168  192  202  211
1761 *     MIMO 20MHz:  0    0    0    0   74  74  123  155  179  214  236  244  251
1762 * SGI MIMO 20MHz:  0    0    0    0   81  81  131  164  188  222  243  251  257
1763 *     SISO 40MHz:  0    0    0    0   77  77  127  160  184  220  242  250  257
1764 * SGI SISO 40MHz:  0    0    0    0   83  83  135  169  193  229  250  257  264
1765 *     MIMO 40MHz:  0    0    0    0  123 123  182  214  235  264  279  285  289
1766 * SGI MIMO 40MHz:  0    0    0    0  131 131  191  222  242  270  284  289  293
1767 *
1768 * After the new mode has been tried for a short while (minimum of 6 failed
1769 * frames or 8 successful frames), compare success ratio and actual throughput
1770 * estimate of the new mode with the old.  If either is better with the new
1771 * mode, continue to use the new mode.
1772 *
1773 * Continue comparing modes until all 3 possibilities have been tried.
1774 * If moving from legacy to HT, try all 3 possibilities from the new HT
1775 * mode.  After trying all 3, a best mode is found.  Continue to use this mode
1776 * for the longer "while" described above (e.g. 480 successful frames for
1777 * legacy), and then repeat the search process.
1778 *
1779 */
1780struct iwl_link_quality_cmd {
1781
1782        /* Index of destination/recipient station in uCode's station table */
1783        u8 sta_id;
1784        u8 reserved1;
1785        __le16 control;         /* not used */
1786        struct iwl_link_qual_general_params general_params;
1787        struct iwl_link_qual_agg_params agg_params;
1788
1789        /*
1790         * Rate info; when using rate-scaling, Tx command's initial_rate_index
1791         * specifies 1st Tx rate attempted, via index into this table.
1792         * agn devices works its way through table when retrying Tx.
1793         */
1794        struct {
1795                __le32 rate_n_flags;    /* RATE_MCS_*, IWL_RATE_* */
1796        } rs_table[LINK_QUAL_MAX_RETRY_NUM];
1797        __le32 reserved2;
1798} __packed;
1799
1800/*
1801 * BT configuration enable flags:
1802 *   bit 0 - 1: BT channel announcement enabled
1803 *           0: disable
1804 *   bit 1 - 1: priority of BT device enabled
1805 *           0: disable
1806 *   bit 2 - 1: BT 2 wire support enabled
1807 *           0: disable
1808 */
1809#define BT_COEX_DISABLE (0x0)
1810#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1811#define BT_ENABLE_PRIORITY         BIT(1)
1812#define BT_ENABLE_2_WIRE           BIT(2)
1813
1814#define BT_COEX_DISABLE (0x0)
1815#define BT_COEX_ENABLE  (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1816
1817#define BT_LEAD_TIME_MIN (0x0)
1818#define BT_LEAD_TIME_DEF (0x1E)
1819#define BT_LEAD_TIME_MAX (0xFF)
1820
1821#define BT_MAX_KILL_MIN (0x1)
1822#define BT_MAX_KILL_DEF (0x5)
1823#define BT_MAX_KILL_MAX (0xFF)
1824
1825#define BT_DURATION_LIMIT_DEF   625
1826#define BT_DURATION_LIMIT_MAX   1250
1827#define BT_DURATION_LIMIT_MIN   625
1828
1829#define BT_ON_THRESHOLD_DEF     4
1830#define BT_ON_THRESHOLD_MAX     1000
1831#define BT_ON_THRESHOLD_MIN     1
1832
1833#define BT_FRAG_THRESHOLD_DEF   0
1834#define BT_FRAG_THRESHOLD_MAX   0
1835#define BT_FRAG_THRESHOLD_MIN   0
1836
1837#define BT_AGG_THRESHOLD_DEF    1200
1838#define BT_AGG_THRESHOLD_MAX    8000
1839#define BT_AGG_THRESHOLD_MIN    400
1840
1841/*
1842 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
1843 *
1844 * agn devices support hardware handshake with Bluetooth device on
1845 * same platform.  Bluetooth device alerts wireless device when it will Tx;
1846 * wireless device can delay or kill its own Tx to accommodate.
1847 */
1848struct iwl_bt_cmd {
1849        u8 flags;
1850        u8 lead_time;
1851        u8 max_kill;
1852        u8 reserved;
1853        __le32 kill_ack_mask;
1854        __le32 kill_cts_mask;
1855} __packed;
1856
1857#define IWLAGN_BT_FLAG_CHANNEL_INHIBITION       BIT(0)
1858
1859#define IWLAGN_BT_FLAG_COEX_MODE_MASK           (BIT(3)|BIT(4)|BIT(5))
1860#define IWLAGN_BT_FLAG_COEX_MODE_SHIFT          3
1861#define IWLAGN_BT_FLAG_COEX_MODE_DISABLED       0
1862#define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W      1
1863#define IWLAGN_BT_FLAG_COEX_MODE_3W             2
1864#define IWLAGN_BT_FLAG_COEX_MODE_4W             3
1865
1866#define IWLAGN_BT_FLAG_UCODE_DEFAULT            BIT(6)
1867/* Disable Sync PSPoll on SCO/eSCO */
1868#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE        BIT(7)
1869
1870#define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD        -75 /* dBm */
1871#define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD        -65 /* dBm */
1872
1873#define IWLAGN_BT_PRIO_BOOST_MAX        0xFF
1874#define IWLAGN_BT_PRIO_BOOST_MIN        0x00
1875#define IWLAGN_BT_PRIO_BOOST_DEFAULT    0xF0
1876#define IWLAGN_BT_PRIO_BOOST_DEFAULT32  0xF0F0F0F0
1877
1878#define IWLAGN_BT_MAX_KILL_DEFAULT      5
1879
1880#define IWLAGN_BT3_T7_DEFAULT           1
1881
1882enum iwl_bt_kill_idx {
1883        IWL_BT_KILL_DEFAULT = 0,
1884        IWL_BT_KILL_OVERRIDE = 1,
1885        IWL_BT_KILL_REDUCE = 2,
1886};
1887
1888#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1889#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
1890#define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
1891#define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE      cpu_to_le32(0)
1892
1893#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT  2
1894
1895#define IWLAGN_BT3_T2_DEFAULT           0xc
1896
1897#define IWLAGN_BT_VALID_ENABLE_FLAGS    cpu_to_le16(BIT(0))
1898#define IWLAGN_BT_VALID_BOOST           cpu_to_le16(BIT(1))
1899#define IWLAGN_BT_VALID_MAX_KILL        cpu_to_le16(BIT(2))
1900#define IWLAGN_BT_VALID_3W_TIMERS       cpu_to_le16(BIT(3))
1901#define IWLAGN_BT_VALID_KILL_ACK_MASK   cpu_to_le16(BIT(4))
1902#define IWLAGN_BT_VALID_KILL_CTS_MASK   cpu_to_le16(BIT(5))
1903#define IWLAGN_BT_VALID_REDUCED_TX_PWR  cpu_to_le16(BIT(6))
1904#define IWLAGN_BT_VALID_3W_LUT          cpu_to_le16(BIT(7))
1905
1906#define IWLAGN_BT_ALL_VALID_MSK         (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1907                                        IWLAGN_BT_VALID_BOOST | \
1908                                        IWLAGN_BT_VALID_MAX_KILL | \
1909                                        IWLAGN_BT_VALID_3W_TIMERS | \
1910                                        IWLAGN_BT_VALID_KILL_ACK_MASK | \
1911                                        IWLAGN_BT_VALID_KILL_CTS_MASK | \
1912                                        IWLAGN_BT_VALID_REDUCED_TX_PWR | \
1913                                        IWLAGN_BT_VALID_3W_LUT)
1914
1915#define IWLAGN_BT_REDUCED_TX_PWR        BIT(0)
1916
1917#define IWLAGN_BT_DECISION_LUT_SIZE     12
1918
1919struct iwl_basic_bt_cmd {
1920        u8 flags;
1921        u8 ledtime; /* unused */
1922        u8 max_kill;
1923        u8 bt3_timer_t7_value;
1924        __le32 kill_ack_mask;
1925        __le32 kill_cts_mask;
1926        u8 bt3_prio_sample_time;
1927        u8 bt3_timer_t2_value;
1928        __le16 bt4_reaction_time; /* unused */
1929        __le32 bt3_lookup_table[IWLAGN_BT_DECISION_LUT_SIZE];
1930        /*
1931         * bit 0: use reduced tx power for control frame
1932         * bit 1 - 7: reserved
1933         */
1934        u8 reduce_txpower;
1935        u8 reserved;
1936        __le16 valid;
1937};
1938
1939struct iwl_bt_cmd_v1 {
1940        struct iwl_basic_bt_cmd basic;
1941        u8 prio_boost;
1942        /*
1943         * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1944         * if configure the following patterns
1945         */
1946        u8 tx_prio_boost;       /* SW boost of WiFi tx priority */
1947        __le16 rx_prio_boost;   /* SW boost of WiFi rx priority */
1948};
1949
1950struct iwl_bt_cmd_v2 {
1951        struct iwl_basic_bt_cmd basic;
1952        __le32 prio_boost;
1953        /*
1954         * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1955         * if configure the following patterns
1956         */
1957        u8 reserved;
1958        u8 tx_prio_boost;       /* SW boost of WiFi tx priority */
1959        __le16 rx_prio_boost;   /* SW boost of WiFi rx priority */
1960};
1961
1962#define IWLAGN_BT_SCO_ACTIVE    cpu_to_le32(BIT(0))
1963
1964struct iwlagn_bt_sco_cmd {
1965        __le32 flags;
1966};
1967
1968/******************************************************************************
1969 * (6)
1970 * Spectrum Management (802.11h) Commands, Responses, Notifications:
1971 *
1972 *****************************************************************************/
1973
1974/*
1975 * Spectrum Management
1976 */
1977#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK         | \
1978                                 RXON_FILTER_CTL2HOST_MSK        | \
1979                                 RXON_FILTER_ACCEPT_GRP_MSK      | \
1980                                 RXON_FILTER_DIS_DECRYPT_MSK     | \
1981                                 RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
1982                                 RXON_FILTER_ASSOC_MSK           | \
1983                                 RXON_FILTER_BCON_AWARE_MSK)
1984
1985struct iwl_measure_channel {
1986        __le32 duration;        /* measurement duration in extended beacon
1987                                 * format */
1988        u8 channel;             /* channel to measure */
1989        u8 type;                /* see enum iwl_measure_type */
1990        __le16 reserved;
1991} __packed;
1992
1993/*
1994 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
1995 */
1996struct iwl_spectrum_cmd {
1997        __le16 len;             /* number of bytes starting from token */
1998        u8 token;               /* token id */
1999        u8 id;                  /* measurement id -- 0 or 1 */
2000        u8 origin;              /* 0 = TGh, 1 = other, 2 = TGk */
2001        u8 periodic;            /* 1 = periodic */
2002        __le16 path_loss_timeout;
2003        __le32 start_time;      /* start time in extended beacon format */
2004        __le32 reserved2;
2005        __le32 flags;           /* rxon flags */
2006        __le32 filter_flags;    /* rxon filter flags */
2007        __le16 channel_count;   /* minimum 1, maximum 10 */
2008        __le16 reserved3;
2009        struct iwl_measure_channel channels[10];
2010} __packed;
2011
2012/*
2013 * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2014 */
2015struct iwl_spectrum_resp {
2016        u8 token;
2017        u8 id;                  /* id of the prior command replaced, or 0xff */
2018        __le16 status;          /* 0 - command will be handled
2019                                 * 1 - cannot handle (conflicts with another
2020                                 *     measurement) */
2021} __packed;
2022
2023enum iwl_measurement_state {
2024        IWL_MEASUREMENT_START = 0,
2025        IWL_MEASUREMENT_STOP = 1,
2026};
2027
2028enum iwl_measurement_status {
2029        IWL_MEASUREMENT_OK = 0,
2030        IWL_MEASUREMENT_CONCURRENT = 1,
2031        IWL_MEASUREMENT_CSA_CONFLICT = 2,
2032        IWL_MEASUREMENT_TGH_CONFLICT = 3,
2033        /* 4-5 reserved */
2034        IWL_MEASUREMENT_STOPPED = 6,
2035        IWL_MEASUREMENT_TIMEOUT = 7,
2036        IWL_MEASUREMENT_PERIODIC_FAILED = 8,
2037};
2038
2039#define NUM_ELEMENTS_IN_HISTOGRAM 8
2040
2041struct iwl_measurement_histogram {
2042        __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2043        __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM];  /* in 1usec counts */
2044} __packed;
2045
2046/* clear channel availability counters */
2047struct iwl_measurement_cca_counters {
2048        __le32 ofdm;
2049        __le32 cck;
2050} __packed;
2051
2052enum iwl_measure_type {
2053        IWL_MEASURE_BASIC = (1 << 0),
2054        IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
2055        IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
2056        IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
2057        IWL_MEASURE_FRAME = (1 << 4),
2058        /* bits 5:6 are reserved */
2059        IWL_MEASURE_IDLE = (1 << 7),
2060};
2061
2062/*
2063 * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2064 */
2065struct iwl_spectrum_notification {
2066        u8 id;                  /* measurement id -- 0 or 1 */
2067        u8 token;
2068        u8 channel_index;       /* index in measurement channel list */
2069        u8 state;               /* 0 - start, 1 - stop */
2070        __le32 start_time;      /* lower 32-bits of TSF */
2071        u8 band;                /* 0 - 5.2GHz, 1 - 2.4GHz */
2072        u8 channel;
2073        u8 type;                /* see enum iwl_measurement_type */
2074        u8 reserved1;
2075        /* NOTE:  cca_ofdm, cca_cck, basic_type, and histogram are only only
2076         * valid if applicable for measurement type requested. */
2077        __le32 cca_ofdm;        /* cca fraction time in 40Mhz clock periods */
2078        __le32 cca_cck;         /* cca fraction time in 44Mhz clock periods */
2079        __le32 cca_time;        /* channel load time in usecs */
2080        u8 basic_type;          /* 0 - bss, 1 - ofdm preamble, 2 -
2081                                 * unidentified */
2082        u8 reserved2[3];
2083        struct iwl_measurement_histogram histogram;
2084        __le32 stop_time;       /* lower 32-bits of TSF */
2085        __le32 status;          /* see iwl_measurement_status */
2086} __packed;
2087
2088/******************************************************************************
2089 * (7)
2090 * Power Management Commands, Responses, Notifications:
2091 *
2092 *****************************************************************************/
2093
2094/**
2095 * struct iwl_powertable_cmd - Power Table Command
2096 * @flags: See below:
2097 *
2098 * POWER_TABLE_CMD = 0x77 (command, has simple generic response)
2099 *
2100 * PM allow:
2101 *   bit 0 - '0' Driver not allow power management
2102 *           '1' Driver allow PM (use rest of parameters)
2103 *
2104 * uCode send sleep notifications:
2105 *   bit 1 - '0' Don't send sleep notification
2106 *           '1' send sleep notification (SEND_PM_NOTIFICATION)
2107 *
2108 * Sleep over DTIM
2109 *   bit 2 - '0' PM have to walk up every DTIM
2110 *           '1' PM could sleep over DTIM till listen Interval.
2111 *
2112 * PCI power managed
2113 *   bit 3 - '0' (PCI_CFG_LINK_CTRL & 0x1)
2114 *           '1' !(PCI_CFG_LINK_CTRL & 0x1)
2115 *
2116 * Fast PD
2117 *   bit 4 - '1' Put radio to sleep when receiving frame for others
2118 *
2119 * Force sleep Modes
2120 *   bit 31/30- '00' use both mac/xtal sleeps
2121 *              '01' force Mac sleep
2122 *              '10' force xtal sleep
2123 *              '11' Illegal set
2124 *
2125 * NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
2126 * ucode assume sleep over DTIM is allowed and we don't need to wake up
2127 * for every DTIM.
2128 */
2129#define IWL_POWER_VEC_SIZE 5
2130
2131#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK        cpu_to_le16(BIT(0))
2132#define IWL_POWER_POWER_SAVE_ENA_MSK            cpu_to_le16(BIT(0))
2133#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK      cpu_to_le16(BIT(1))
2134#define IWL_POWER_SLEEP_OVER_DTIM_MSK           cpu_to_le16(BIT(2))
2135#define IWL_POWER_PCI_PM_MSK                    cpu_to_le16(BIT(3))
2136#define IWL_POWER_FAST_PD                       cpu_to_le16(BIT(4))
2137#define IWL_POWER_BEACON_FILTERING              cpu_to_le16(BIT(5))
2138#define IWL_POWER_SHADOW_REG_ENA                cpu_to_le16(BIT(6))
2139#define IWL_POWER_CT_KILL_SET                   cpu_to_le16(BIT(7))
2140#define IWL_POWER_BT_SCO_ENA                    cpu_to_le16(BIT(8))
2141#define IWL_POWER_ADVANCE_PM_ENA_MSK            cpu_to_le16(BIT(9))
2142
2143struct iwl_powertable_cmd {
2144        __le16 flags;
2145        u8 keep_alive_seconds;
2146        u8 debug_flags;
2147        __le32 rx_data_timeout;
2148        __le32 tx_data_timeout;
2149        __le32 sleep_interval[IWL_POWER_VEC_SIZE];
2150        __le32 keep_alive_beacons;
2151} __packed;
2152
2153/*
2154 * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
2155 * all devices identical.
2156 */
2157struct iwl_sleep_notification {
2158        u8 pm_sleep_mode;
2159        u8 pm_wakeup_src;
2160        __le16 reserved;
2161        __le32 sleep_time;
2162        __le32 tsf_low;
2163        __le32 bcon_timer;
2164} __packed;
2165
2166/* Sleep states.  all devices identical. */
2167enum {
2168        IWL_PM_NO_SLEEP = 0,
2169        IWL_PM_SLP_MAC = 1,
2170        IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
2171        IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
2172        IWL_PM_SLP_PHY = 4,
2173        IWL_PM_SLP_REPENT = 5,
2174        IWL_PM_WAKEUP_BY_TIMER = 6,
2175        IWL_PM_WAKEUP_BY_DRIVER = 7,
2176        IWL_PM_WAKEUP_BY_RFKILL = 8,
2177        /* 3 reserved */
2178        IWL_PM_NUM_OF_MODES = 12,
2179};
2180
2181/*
2182 * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2183 */
2184#define CARD_STATE_CMD_DISABLE 0x00     /* Put card to sleep */
2185#define CARD_STATE_CMD_ENABLE  0x01     /* Wake up card */
2186#define CARD_STATE_CMD_HALT    0x02     /* Power down permanently */
2187struct iwl_card_state_cmd {
2188        __le32 status;          /* CARD_STATE_CMD_* request new power state */
2189} __packed;
2190
2191/*
2192 * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2193 */
2194struct iwl_card_state_notif {
2195        __le32 flags;
2196} __packed;
2197
2198#define HW_CARD_DISABLED   0x01
2199#define SW_CARD_DISABLED   0x02
2200#define CT_CARD_DISABLED   0x04
2201#define RXON_CARD_DISABLED 0x10
2202
2203struct iwl_ct_kill_config {
2204        __le32   reserved;
2205        __le32   critical_temperature_M;
2206        __le32   critical_temperature_R;
2207}  __packed;
2208
2209/* 1000, and 6x00 */
2210struct iwl_ct_kill_throttling_config {
2211        __le32   critical_temperature_exit;
2212        __le32   reserved;
2213        __le32   critical_temperature_enter;
2214}  __packed;
2215
2216/******************************************************************************
2217 * (8)
2218 * Scan Commands, Responses, Notifications:
2219 *
2220 *****************************************************************************/
2221
2222#define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2223#define SCAN_CHANNEL_TYPE_ACTIVE  cpu_to_le32(1)
2224
2225/**
2226 * struct iwl_scan_channel - entry in REPLY_SCAN_CMD channel table
2227 *
2228 * One for each channel in the scan list.
2229 * Each channel can independently select:
2230 * 1)  SSID for directed active scans
2231 * 2)  Txpower setting (for rate specified within Tx command)
2232 * 3)  How long to stay on-channel (behavior may be modified by quiet_time,
2233 *     quiet_plcp_th, good_CRC_th)
2234 *
2235 * To avoid uCode errors, make sure the following are true (see comments
2236 * under struct iwl_scan_cmd about max_out_time and quiet_time):
2237 * 1)  If using passive_dwell (i.e. passive_dwell != 0):
2238 *     active_dwell <= passive_dwell (< max_out_time if max_out_time != 0)
2239 * 2)  quiet_time <= active_dwell
2240 * 3)  If restricting off-channel time (i.e. max_out_time !=0):
2241 *     passive_dwell < max_out_time
2242 *     active_dwell < max_out_time
2243 */
2244
2245struct iwl_scan_channel {
2246        /*
2247         * type is defined as:
2248         * 0:0 1 = active, 0 = passive
2249         * 1:20 SSID direct bit map; if a bit is set, then corresponding
2250         *     SSID IE is transmitted in probe request.
2251         * 21:31 reserved
2252         */
2253        __le32 type;
2254        __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
2255        u8 tx_gain;             /* gain for analog radio */
2256        u8 dsp_atten;           /* gain for DSP */
2257        __le16 active_dwell;    /* in 1024-uSec TU (time units), typ 5-50 */
2258        __le16 passive_dwell;   /* in 1024-uSec TU (time units), typ 20-500 */
2259} __packed;
2260
2261/* set number of direct probes __le32 type */
2262#define IWL_SCAN_PROBE_MASK(n)  cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2263
2264/**
2265 * struct iwl_ssid_ie - directed scan network information element
2266 *
2267 * Up to 20 of these may appear in REPLY_SCAN_CMD,
2268 * selected by "type" bit field in struct iwl_scan_channel;
2269 * each channel may select different ssids from among the 20 entries.
2270 * SSID IEs get transmitted in reverse order of entry.
2271 */
2272struct iwl_ssid_ie {
2273        u8 id;
2274        u8 len;
2275        u8 ssid[32];
2276} __packed;
2277
2278#define PROBE_OPTION_MAX                20
2279#define TX_CMD_LIFE_TIME_INFINITE       cpu_to_le32(0xFFFFFFFF)
2280#define IWL_GOOD_CRC_TH_DISABLED        0
2281#define IWL_GOOD_CRC_TH_DEFAULT         cpu_to_le16(1)
2282#define IWL_GOOD_CRC_TH_NEVER           cpu_to_le16(0xffff)
2283#define IWL_MAX_CMD_SIZE 4096
2284
2285/*
2286 * REPLY_SCAN_CMD = 0x80 (command)
2287 *
2288 * The hardware scan command is very powerful; the driver can set it up to
2289 * maintain (relatively) normal network traffic while doing a scan in the
2290 * background.  The max_out_time and suspend_time control the ratio of how
2291 * long the device stays on an associated network channel ("service channel")
2292 * vs. how long it's away from the service channel, i.e. tuned to other channels
2293 * for scanning.
2294 *
2295 * max_out_time is the max time off-channel (in usec), and suspend_time
2296 * is how long (in "extended beacon" format) that the scan is "suspended"
2297 * after returning to the service channel.  That is, suspend_time is the
2298 * time that we stay on the service channel, doing normal work, between
2299 * scan segments.  The driver may set these parameters differently to support
2300 * scanning when associated vs. not associated, and light vs. heavy traffic
2301 * loads when associated.
2302 *
2303 * After receiving this command, the device's scan engine does the following;
2304 *
2305 * 1)  Sends SCAN_START notification to driver
2306 * 2)  Checks to see if it has time to do scan for one channel
2307 * 3)  Sends NULL packet, with power-save (PS) bit set to 1,
2308 *     to tell AP that we're going off-channel
2309 * 4)  Tunes to first channel in scan list, does active or passive scan
2310 * 5)  Sends SCAN_RESULT notification to driver
2311 * 6)  Checks to see if it has time to do scan on *next* channel in list
2312 * 7)  Repeats 4-6 until it no longer has time to scan the next channel
2313 *     before max_out_time expires
2314 * 8)  Returns to service channel
2315 * 9)  Sends NULL packet with PS=0 to tell AP that we're back
2316 * 10) Stays on service channel until suspend_time expires
2317 * 11) Repeats entire process 2-10 until list is complete
2318 * 12) Sends SCAN_COMPLETE notification
2319 *
2320 * For fast, efficient scans, the scan command also has support for staying on
2321 * a channel for just a short time, if doing active scanning and getting no
2322 * responses to the transmitted probe request.  This time is controlled by
2323 * quiet_time, and the number of received packets below which a channel is
2324 * considered "quiet" is controlled by quiet_plcp_threshold.
2325 *
2326 * For active scanning on channels that have regulatory restrictions against
2327 * blindly transmitting, the scan can listen before transmitting, to make sure
2328 * that there is already legitimate activity on the channel.  If enough
2329 * packets are cleanly received on the channel (controlled by good_CRC_th,
2330 * typical value 1), the scan engine starts transmitting probe requests.
2331 *
2332 * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2333 *
2334 * To avoid uCode errors, see timing restrictions described under
2335 * struct iwl_scan_channel.
2336 */
2337
2338enum iwl_scan_flags {
2339        /* BIT(0) currently unused */
2340        IWL_SCAN_FLAGS_ACTION_FRAME_TX  = BIT(1),
2341        /* bits 2-7 reserved */
2342};
2343
2344struct iwl_scan_cmd {
2345        __le16 len;
2346        u8 scan_flags;          /* scan flags: see enum iwl_scan_flags */
2347        u8 channel_count;       /* # channels in channel list */
2348        __le16 quiet_time;      /* dwell only this # millisecs on quiet channel
2349                                 * (only for active scan) */
2350        __le16 quiet_plcp_th;   /* quiet chnl is < this # pkts (typ. 1) */
2351        __le16 good_CRC_th;     /* passive -> active promotion threshold */
2352        __le16 rx_chain;        /* RXON_RX_CHAIN_* */
2353        __le32 max_out_time;    /* max usec to be away from associated (service)
2354                                 * channel */
2355        __le32 suspend_time;    /* pause scan this long (in "extended beacon
2356                                 * format") when returning to service chnl:
2357                                 */
2358        __le32 flags;           /* RXON_FLG_* */
2359        __le32 filter_flags;    /* RXON_FILTER_* */
2360
2361        /* For active scans (set to all-0s for passive scans).
2362         * Does not include payload.  Must specify Tx rate; no rate scaling. */
2363        struct iwl_tx_cmd tx_cmd;
2364
2365        /* For directed active scans (set to all-0s otherwise) */
2366        struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
2367
2368        /*
2369         * Probe request frame, followed by channel list.
2370         *
2371         * Size of probe request frame is specified by byte count in tx_cmd.
2372         * Channel list follows immediately after probe request frame.
2373         * Number of channels in list is specified by channel_count.
2374         * Each channel in list is of type:
2375         *
2376         * struct iwl_scan_channel channels[0];
2377         *
2378         * NOTE:  Only one band of channels can be scanned per pass.  You
2379         * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2380         * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2381         * before requesting another scan.
2382         */
2383        u8 data[0];
2384} __packed;
2385
2386/* Can abort will notify by complete notification with abort status. */
2387#define CAN_ABORT_STATUS        cpu_to_le32(0x1)
2388/* complete notification statuses */
2389#define ABORT_STATUS            0x2
2390
2391/*
2392 * REPLY_SCAN_CMD = 0x80 (response)
2393 */
2394struct iwl_scanreq_notification {
2395        __le32 status;          /* 1: okay, 2: cannot fulfill request */
2396} __packed;
2397
2398/*
2399 * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2400 */
2401struct iwl_scanstart_notification {
2402        __le32 tsf_low;
2403        __le32 tsf_high;
2404        __le32 beacon_timer;
2405        u8 channel;
2406        u8 band;
2407        u8 reserved[2];
2408        __le32 status;
2409} __packed;
2410
2411#define  SCAN_OWNER_STATUS 0x1
2412#define  MEASURE_OWNER_STATUS 0x2
2413
2414#define IWL_PROBE_STATUS_OK             0
2415#define IWL_PROBE_STATUS_TX_FAILED      BIT(0)
2416/* error statuses combined with TX_FAILED */
2417#define IWL_PROBE_STATUS_FAIL_TTL       BIT(1)
2418#define IWL_PROBE_STATUS_FAIL_BT        BIT(2)
2419
2420#define NUMBER_OF_STATISTICS 1  /* first __le32 is good CRC */
2421/*
2422 * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2423 */
2424struct iwl_scanresults_notification {
2425        u8 channel;
2426        u8 band;
2427        u8 probe_status;
2428        u8 num_probe_not_sent; /* not enough time to send */
2429        __le32 tsf_low;
2430        __le32 tsf_high;
2431        __le32 statistics[NUMBER_OF_STATISTICS];
2432} __packed;
2433
2434/*
2435 * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2436 */
2437struct iwl_scancomplete_notification {
2438        u8 scanned_channels;
2439        u8 status;
2440        u8 bt_status;   /* BT On/Off status */
2441        u8 last_channel;
2442        __le32 tsf_low;
2443        __le32 tsf_high;
2444} __packed;
2445
2446
2447/******************************************************************************
2448 * (9)
2449 * IBSS/AP Commands and Notifications:
2450 *
2451 *****************************************************************************/
2452
2453enum iwl_ibss_manager {
2454        IWL_NOT_IBSS_MANAGER = 0,
2455        IWL_IBSS_MANAGER = 1,
2456};
2457
2458/*
2459 * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2460 */
2461
2462struct iwlagn_beacon_notif {
2463        struct iwlagn_tx_resp beacon_notify_hdr;
2464        __le32 low_tsf;
2465        __le32 high_tsf;
2466        __le32 ibss_mgr_status;
2467} __packed;
2468
2469/*
2470 * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2471 */
2472
2473struct iwl_tx_beacon_cmd {
2474        struct iwl_tx_cmd tx;
2475        __le16 tim_idx;
2476        u8 tim_size;
2477        u8 reserved1;
2478        struct ieee80211_hdr frame[0];  /* beacon frame */
2479} __packed;
2480
2481/******************************************************************************
2482 * (10)
2483 * Statistics Commands and Notifications:
2484 *
2485 *****************************************************************************/
2486
2487#define IWL_TEMP_CONVERT 260
2488
2489#define SUP_RATE_11A_MAX_NUM_CHANNELS  8
2490#define SUP_RATE_11B_MAX_NUM_CHANNELS  4
2491#define SUP_RATE_11G_MAX_NUM_CHANNELS  12
2492
2493/* Used for passing to driver number of successes and failures per rate */
2494struct rate_histogram {
2495        union {
2496                __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2497                __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2498                __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2499        } success;
2500        union {
2501                __le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
2502                __le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
2503                __le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
2504        } failed;
2505} __packed;
2506
2507/* statistics command response */
2508
2509struct statistics_dbg {
2510        __le32 burst_check;
2511        __le32 burst_count;
2512        __le32 wait_for_silence_timeout_cnt;
2513        __le32 reserved[3];
2514} __packed;
2515
2516struct statistics_rx_phy {
2517        __le32 ina_cnt;
2518        __le32 fina_cnt;
2519        __le32 plcp_err;
2520        __le32 crc32_err;
2521        __le32 overrun_err;
2522        __le32 early_overrun_err;
2523        __le32 crc32_good;
2524        __le32 false_alarm_cnt;
2525        __le32 fina_sync_err_cnt;
2526        __le32 sfd_timeout;
2527        __le32 fina_timeout;
2528        __le32 unresponded_rts;
2529        __le32 rxe_frame_limit_overrun;
2530        __le32 sent_ack_cnt;
2531        __le32 sent_cts_cnt;
2532        __le32 sent_ba_rsp_cnt;
2533        __le32 dsp_self_kill;
2534        __le32 mh_format_err;
2535        __le32 re_acq_main_rssi_sum;
2536        __le32 reserved3;
2537} __packed;
2538
2539struct statistics_rx_ht_phy {
2540        __le32 plcp_err;
2541        __le32 overrun_err;
2542        __le32 early_overrun_err;
2543        __le32 crc32_good;
2544        __le32 crc32_err;
2545        __le32 mh_format_err;
2546        __le32 agg_crc32_good;
2547        __le32 agg_mpdu_cnt;
2548        __le32 agg_cnt;
2549        __le32 unsupport_mcs;
2550} __packed;
2551
2552#define INTERFERENCE_DATA_AVAILABLE      cpu_to_le32(1)
2553
2554struct statistics_rx_non_phy {
2555        __le32 bogus_cts;       /* CTS received when not expecting CTS */
2556        __le32 bogus_ack;       /* ACK received when not expecting ACK */
2557        __le32 non_bssid_frames;        /* number of frames with BSSID that
2558                                         * doesn't belong to the STA BSSID */
2559        __le32 filtered_frames; /* count frames that were dumped in the
2560                                 * filtering process */
2561        __le32 non_channel_beacons;     /* beacons with our bss id but not on
2562                                         * our serving channel */
2563        __le32 channel_beacons; /* beacons with our bss id and in our
2564                                 * serving channel */
2565        __le32 num_missed_bcon; /* number of missed beacons */
2566        __le32 adc_rx_saturation_time;  /* count in 0.8us units the time the
2567                                         * ADC was in saturation */
2568        __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2569                                          * for INA */
2570        __le32 beacon_silence_rssi_a;   /* RSSI silence after beacon frame */
2571        __le32 beacon_silence_rssi_b;   /* RSSI silence after beacon frame */
2572        __le32 beacon_silence_rssi_c;   /* RSSI silence after beacon frame */
2573        __le32 interference_data_flag;  /* flag for interference data
2574                                         * availability. 1 when data is
2575                                         * available. */
2576        __le32 channel_load;            /* counts RX Enable time in uSec */
2577        __le32 dsp_false_alarms;        /* DSP false alarm (both OFDM
2578                                         * and CCK) counter */
2579        __le32 beacon_rssi_a;
2580        __le32 beacon_rssi_b;
2581        __le32 beacon_rssi_c;
2582        __le32 beacon_energy_a;
2583        __le32 beacon_energy_b;
2584        __le32 beacon_energy_c;
2585} __packed;
2586
2587struct statistics_rx_non_phy_bt {
2588        struct statistics_rx_non_phy common;
2589        /* additional stats for bt */
2590        __le32 num_bt_kills;
2591        __le32 reserved[2];
2592} __packed;
2593
2594struct statistics_rx {
2595        struct statistics_rx_phy ofdm;
2596        struct statistics_rx_phy cck;
2597        struct statistics_rx_non_phy general;
2598        struct statistics_rx_ht_phy ofdm_ht;
2599} __packed;
2600
2601struct statistics_rx_bt {
2602        struct statistics_rx_phy ofdm;
2603        struct statistics_rx_phy cck;
2604        struct statistics_rx_non_phy_bt general;
2605        struct statistics_rx_ht_phy ofdm_ht;
2606} __packed;
2607
2608/**
2609 * struct statistics_tx_power - current tx power
2610 *
2611 * @ant_a: current tx power on chain a in 1/2 dB step
2612 * @ant_b: current tx power on chain b in 1/2 dB step
2613 * @ant_c: current tx power on chain c in 1/2 dB step
2614 */
2615struct statistics_tx_power {
2616        u8 ant_a;
2617        u8 ant_b;
2618        u8 ant_c;
2619        u8 reserved;
2620} __packed;
2621
2622struct statistics_tx_non_phy_agg {
2623        __le32 ba_timeout;
2624        __le32 ba_reschedule_frames;
2625        __le32 scd_query_agg_frame_cnt;
2626        __le32 scd_query_no_agg;
2627        __le32 scd_query_agg;
2628        __le32 scd_query_mismatch;
2629        __le32 frame_not_ready;
2630        __le32 underrun;
2631        __le32 bt_prio_kill;
2632        __le32 rx_ba_rsp_cnt;
2633} __packed;
2634
2635struct statistics_tx {
2636        __le32 preamble_cnt;
2637        __le32 rx_detected_cnt;
2638        __le32 bt_prio_defer_cnt;
2639        __le32 bt_prio_kill_cnt;
2640        __le32 few_bytes_cnt;
2641        __le32 cts_timeout;
2642        __le32 ack_timeout;
2643        __le32 expected_ack_cnt;
2644        __le32 actual_ack_cnt;
2645        __le32 dump_msdu_cnt;
2646        __le32 burst_abort_next_frame_mismatch_cnt;
2647        __le32 burst_abort_missing_next_frame_cnt;
2648        __le32 cts_timeout_collision;
2649        __le32 ack_or_ba_timeout_collision;
2650        struct statistics_tx_non_phy_agg agg;
2651        /*
2652         * "tx_power" are optional parameters provided by uCode,
2653         * 6000 series is the only device provide the information,
2654         * Those are reserved fields for all the other devices
2655         */
2656        struct statistics_tx_power tx_power;
2657        __le32 reserved1;
2658} __packed;
2659
2660
2661struct statistics_div {
2662        __le32 tx_on_a;
2663        __le32 tx_on_b;
2664        __le32 exec_time;
2665        __le32 probe_time;
2666        __le32 reserved1;
2667        __le32 reserved2;
2668} __packed;
2669
2670struct statistics_general_common {
2671        __le32 temperature;   /* radio temperature */
2672        __le32 temperature_m; /* radio voltage */
2673        struct statistics_dbg dbg;
2674        __le32 sleep_time;
2675        __le32 slots_out;
2676        __le32 slots_idle;
2677        __le32 ttl_timestamp;
2678        struct statistics_div div;
2679        __le32 rx_enable_counter;
2680        /*
2681         * num_of_sos_states:
2682         *  count the number of times we have to re-tune
2683         *  in order to get out of bad PHY status
2684         */
2685        __le32 num_of_sos_states;
2686} __packed;
2687
2688struct statistics_bt_activity {
2689        /* Tx statistics */
2690        __le32 hi_priority_tx_req_cnt;
2691        __le32 hi_priority_tx_denied_cnt;
2692        __le32 lo_priority_tx_req_cnt;
2693        __le32 lo_priority_tx_denied_cnt;
2694        /* Rx statistics */
2695        __le32 hi_priority_rx_req_cnt;
2696        __le32 hi_priority_rx_denied_cnt;
2697        __le32 lo_priority_rx_req_cnt;
2698        __le32 lo_priority_rx_denied_cnt;
2699} __packed;
2700
2701struct statistics_general {
2702        struct statistics_general_common common;
2703        __le32 reserved2;
2704        __le32 reserved3;
2705} __packed;
2706
2707struct statistics_general_bt {
2708        struct statistics_general_common common;
2709        struct statistics_bt_activity activity;
2710        __le32 reserved2;
2711        __le32 reserved3;
2712} __packed;
2713
2714#define UCODE_STATISTICS_CLEAR_MSK              (0x1 << 0)
2715#define UCODE_STATISTICS_FREQUENCY_MSK          (0x1 << 1)
2716#define UCODE_STATISTICS_NARROW_BAND_MSK        (0x1 << 2)
2717
2718/*
2719 * REPLY_STATISTICS_CMD = 0x9c,
2720 * all devices identical.
2721 *
2722 * This command triggers an immediate response containing uCode statistics.
2723 * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2724 *
2725 * If the CLEAR_STATS configuration flag is set, uCode will clear its
2726 * internal copy of the statistics (counters) after issuing the response.
2727 * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2728 *
2729 * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2730 * STATISTICS_NOTIFICATIONs after received beacons (see below).  This flag
2731 * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2732 */
2733#define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1)     /* see above */
2734#define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
2735struct iwl_statistics_cmd {
2736        __le32 configuration_flags;     /* IWL_STATS_CONF_* */
2737} __packed;
2738
2739/*
2740 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2741 *
2742 * By default, uCode issues this notification after receiving a beacon
2743 * while associated.  To disable this behavior, set DISABLE_NOTIF flag in the
2744 * REPLY_STATISTICS_CMD 0x9c, above.
2745 *
2746 * Statistics counters continue to increment beacon after beacon, but are
2747 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2748 * 0x9c with CLEAR_STATS bit set (see above).
2749 *
2750 * uCode also issues this notification during scans.  uCode clears statistics
2751 * appropriately so that each notification contains statistics for only the
2752 * one channel that has just been scanned.
2753 */
2754#define STATISTICS_REPLY_FLG_BAND_24G_MSK         cpu_to_le32(0x2)
2755#define STATISTICS_REPLY_FLG_HT40_MODE_MSK        cpu_to_le32(0x8)
2756
2757struct iwl_notif_statistics {
2758        __le32 flag;
2759        struct statistics_rx rx;
2760        struct statistics_tx tx;
2761        struct statistics_general general;
2762} __packed;
2763
2764struct iwl_bt_notif_statistics {
2765        __le32 flag;
2766        struct statistics_rx_bt rx;
2767        struct statistics_tx tx;
2768        struct statistics_general_bt general;
2769} __packed;
2770
2771/*
2772 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
2773 *
2774 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2775 * in regardless of how many missed beacons, which mean when driver receive the
2776 * notification, inside the command, it can find all the beacons information
2777 * which include number of total missed beacons, number of consecutive missed
2778 * beacons, number of beacons received and number of beacons expected to
2779 * receive.
2780 *
2781 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2782 * in order to bring the radio/PHY back to working state; which has no relation
2783 * to when driver will perform sensitivity calibration.
2784 *
2785 * Driver should set it own missed_beacon_threshold to decide when to perform
2786 * sensitivity calibration based on number of consecutive missed beacons in
2787 * order to improve overall performance, especially in noisy environment.
2788 *
2789 */
2790
2791#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2792#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2793#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
2794
2795struct iwl_missed_beacon_notif {
2796        __le32 consecutive_missed_beacons;
2797        __le32 total_missed_becons;
2798        __le32 num_expected_beacons;
2799        __le32 num_recvd_beacons;
2800} __packed;
2801
2802
2803/******************************************************************************
2804 * (11)
2805 * Rx Calibration Commands:
2806 *
2807 * With the uCode used for open source drivers, most Tx calibration (except
2808 * for Tx Power) and most Rx calibration is done by uCode during the
2809 * "initialize" phase of uCode boot.  Driver must calibrate only:
2810 *
2811 * 1)  Tx power (depends on temperature), described elsewhere
2812 * 2)  Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2813 * 3)  Receiver sensitivity (to optimize signal detection)
2814 *
2815 *****************************************************************************/
2816
2817/**
2818 * SENSITIVITY_CMD = 0xa8 (command, has simple generic response)
2819 *
2820 * This command sets up the Rx signal detector for a sensitivity level that
2821 * is high enough to lock onto all signals within the associated network,
2822 * but low enough to ignore signals that are below a certain threshold, so as
2823 * not to have too many "false alarms".  False alarms are signals that the
2824 * Rx DSP tries to lock onto, but then discards after determining that they
2825 * are noise.
2826 *
2827 * The optimum number of false alarms is between 5 and 50 per 200 TUs
2828 * (200 * 1024 uSecs, i.e. 204.8 milliseconds) of actual Rx time (i.e.
2829 * time listening, not transmitting).  Driver must adjust sensitivity so that
2830 * the ratio of actual false alarms to actual Rx time falls within this range.
2831 *
2832 * While associated, uCode delivers STATISTICS_NOTIFICATIONs after each
2833 * received beacon.  These provide information to the driver to analyze the
2834 * sensitivity.  Don't analyze statistics that come in from scanning, or any
2835 * other non-associated-network source.  Pertinent statistics include:
2836 *
2837 * From "general" statistics (struct statistics_rx_non_phy):
2838 *
2839 * (beacon_energy_[abc] & 0x0FF00) >> 8 (unsigned, higher value is lower level)
2840 *   Measure of energy of desired signal.  Used for establishing a level
2841 *   below which the device does not detect signals.
2842 *
2843 * (beacon_silence_rssi_[abc] & 0x0FF00) >> 8 (unsigned, units in dB)
2844 *   Measure of background noise in silent period after beacon.
2845 *
2846 * channel_load
2847 *   uSecs of actual Rx time during beacon period (varies according to
2848 *   how much time was spent transmitting).
2849 *
2850 * From "cck" and "ofdm" statistics (struct statistics_rx_phy), separately:
2851 *
2852 * false_alarm_cnt
2853 *   Signal locks abandoned early (before phy-level header).
2854 *
2855 * plcp_err
2856 *   Signal locks abandoned late (during phy-level header).
2857 *
2858 * NOTE:  Both false_alarm_cnt and plcp_err increment monotonically from
2859 *        beacon to beacon, i.e. each value is an accumulation of all errors
2860 *        before and including the latest beacon.  Values will wrap around to 0
2861 *        after counting up to 2^32 - 1.  Driver must differentiate vs.
2862 *        previous beacon's values to determine # false alarms in the current
2863 *        beacon period.
2864 *
2865 * Total number of false alarms = false_alarms + plcp_errs
2866 *
2867 * For OFDM, adjust the following table entries in struct iwl_sensitivity_cmd
2868 * (notice that the start points for OFDM are at or close to settings for
2869 * maximum sensitivity):
2870 *
2871 *                                             START  /  MIN  /  MAX
2872 *   HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX          90   /   85  /  120
2873 *   HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX     170   /  170  /  210
2874 *   HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX         105   /  105  /  140
2875 *   HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX     220   /  220  /  270
2876 *
2877 *   If actual rate of OFDM false alarms (+ plcp_errors) is too high
2878 *   (greater than 50 for each 204.8 msecs listening), reduce sensitivity
2879 *   by *adding* 1 to all 4 of the table entries above, up to the max for
2880 *   each entry.  Conversely, if false alarm rate is too low (less than 5
2881 *   for each 204.8 msecs listening), *subtract* 1 from each entry to
2882 *   increase sensitivity.
2883 *
2884 * For CCK sensitivity, keep track of the following:
2885 *
2886 *   1).  20-beacon history of maximum background noise, indicated by
2887 *        (beacon_silence_rssi_[abc] & 0x0FF00), units in dB, across the
2888 *        3 receivers.  For any given beacon, the "silence reference" is
2889 *        the maximum of last 60 samples (20 beacons * 3 receivers).
2890 *
2891 *   2).  10-beacon history of strongest signal level, as indicated
2892 *        by (beacon_energy_[abc] & 0x0FF00) >> 8, across the 3 receivers,
2893 *        i.e. the strength of the signal through the best receiver at the
2894 *        moment.  These measurements are "upside down", with lower values
2895 *        for stronger signals, so max energy will be *minimum* value.
2896 *
2897 *        Then for any given beacon, the driver must determine the *weakest*
2898 *        of the strongest signals; this is the minimum level that needs to be
2899 *        successfully detected, when using the best receiver at the moment.
2900 *        "Max cck energy" is the maximum (higher value means lower energy!)
2901 *        of the last 10 minima.  Once this is determined, driver must add
2902 *        a little margin by adding "6" to it.
2903 *
2904 *   3).  Number of consecutive beacon periods with too few false alarms.
2905 *        Reset this to 0 at the first beacon period that falls within the
2906 *        "good" range (5 to 50 false alarms per 204.8 milliseconds rx).
2907 *
2908 * Then, adjust the following CCK table entries in struct iwl_sensitivity_cmd
2909 * (notice that the start points for CCK are at maximum sensitivity):
2910 *
2911 *                                             START  /  MIN  /  MAX
2912 *   HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX         125   /  125  /  200
2913 *   HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX     200   /  200  /  400
2914 *   HD_MIN_ENERGY_CCK_DET_INDEX                100   /    0  /  100
2915 *
2916 *   If actual rate of CCK false alarms (+ plcp_errors) is too high
2917 *   (greater than 50 for each 204.8 msecs listening), method for reducing
2918 *   sensitivity is:
2919 *
2920 *   1)  *Add* 3 to value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2921 *       up to max 400.
2922 *
2923 *   2)  If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is < 160,
2924 *       sensitivity has been reduced a significant amount; bring it up to
2925 *       a moderate 161.  Otherwise, *add* 3, up to max 200.
2926 *
2927 *   3)  a)  If current value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX is > 160,
2928 *       sensitivity has been reduced only a moderate or small amount;
2929 *       *subtract* 2 from value in HD_MIN_ENERGY_CCK_DET_INDEX,
2930 *       down to min 0.  Otherwise (if gain has been significantly reduced),
2931 *       don't change the HD_MIN_ENERGY_CCK_DET_INDEX value.
2932 *
2933 *       b)  Save a snapshot of the "silence reference".
2934 *
2935 *   If actual rate of CCK false alarms (+ plcp_errors) is too low
2936 *   (less than 5 for each 204.8 msecs listening), method for increasing
2937 *   sensitivity is used only if:
2938 *
2939 *   1a)  Previous beacon did not have too many false alarms
2940 *   1b)  AND difference between previous "silence reference" and current
2941 *        "silence reference" (prev - current) is 2 or more,
2942 *   OR 2)  100 or more consecutive beacon periods have had rate of
2943 *          less than 5 false alarms per 204.8 milliseconds rx time.
2944 *
2945 *   Method for increasing sensitivity:
2946 *
2947 *   1)  *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX,
2948 *       down to min 125.
2949 *
2950 *   2)  *Subtract* 3 from value in HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX,
2951 *       down to min 200.
2952 *
2953 *   3)  *Add* 2 to value in HD_MIN_ENERGY_CCK_DET_INDEX, up to max 100.
2954 *
2955 *   If actual rate of CCK false alarms (+ plcp_errors) is within good range
2956 *   (between 5 and 50 for each 204.8 msecs listening):
2957 *
2958 *   1)  Save a snapshot of the silence reference.
2959 *
2960 *   2)  If previous beacon had too many CCK false alarms (+ plcp_errors),
2961 *       give some extra margin to energy threshold by *subtracting* 8
2962 *       from value in HD_MIN_ENERGY_CCK_DET_INDEX.
2963 *
2964 *   For all cases (too few, too many, good range), make sure that the CCK
2965 *   detection threshold (energy) is below the energy level for robust
2966 *   detection over the past 10 beacon periods, the "Max cck energy".
2967 *   Lower values mean higher energy; this means making sure that the value
2968 *   in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
2969 *
2970 */
2971
2972/*
2973 * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
2974 */
2975#define HD_TABLE_SIZE  (11)     /* number of entries */
2976#define HD_MIN_ENERGY_CCK_DET_INDEX                 (0) /* table indexes */
2977#define HD_MIN_ENERGY_OFDM_DET_INDEX                (1)
2978#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX          (2)
2979#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX      (3)
2980#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX      (4)
2981#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX          (5)
2982#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX      (6)
2983#define HD_BARKER_CORR_TH_ADD_MIN_INDEX             (7)
2984#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX         (8)
2985#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX          (9)
2986#define HD_OFDM_ENERGY_TH_IN_INDEX                  (10)
2987
2988/*
2989 * Additional table entries in enhance SENSITIVITY_CMD
2990 */
2991#define HD_INA_NON_SQUARE_DET_OFDM_INDEX                (11)
2992#define HD_INA_NON_SQUARE_DET_CCK_INDEX                 (12)
2993#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX           (13)
2994#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX          (14)
2995#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX      (15)
2996#define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX              (16)
2997#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX          (17)
2998#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX           (18)
2999#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX       (19)
3000#define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX               (20)
3001#define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX           (21)
3002#define HD_RESERVED                                     (22)
3003
3004/* number of entries for enhanced tbl */
3005#define ENHANCE_HD_TABLE_SIZE  (23)
3006
3007/* number of additional entries for enhanced tbl */
3008#define ENHANCE_HD_TABLE_ENTRIES  (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3009
3010#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1              cpu_to_le16(0)
3011#define HD_INA_NON_SQUARE_DET_CCK_DATA_V1               cpu_to_le16(0)
3012#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1         cpu_to_le16(0)
3013#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1        cpu_to_le16(668)
3014#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1    cpu_to_le16(4)
3015#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1            cpu_to_le16(486)
3016#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1        cpu_to_le16(37)
3017#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1         cpu_to_le16(853)
3018#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1     cpu_to_le16(4)
3019#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1             cpu_to_le16(476)
3020#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1         cpu_to_le16(99)
3021
3022#define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2              cpu_to_le16(1)
3023#define HD_INA_NON_SQUARE_DET_CCK_DATA_V2               cpu_to_le16(1)
3024#define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2         cpu_to_le16(1)
3025#define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2        cpu_to_le16(600)
3026#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2    cpu_to_le16(40)
3027#define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2            cpu_to_le16(486)
3028#define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2        cpu_to_le16(45)
3029#define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2         cpu_to_le16(853)
3030#define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2     cpu_to_le16(60)
3031#define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2             cpu_to_le16(476)
3032#define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2         cpu_to_le16(99)
3033
3034
3035/* Control field in struct iwl_sensitivity_cmd */
3036#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE   cpu_to_le16(0)
3037#define SENSITIVITY_CMD_CONTROL_WORK_TABLE      cpu_to_le16(1)
3038
3039/**
3040 * struct iwl_sensitivity_cmd
3041 * @control:  (1) updates working table, (0) updates default table
3042 * @table:  energy threshold values, use HD_* as index into table
3043 *
3044 * Always use "1" in "control" to update uCode's working table and DSP.
3045 */
3046struct iwl_sensitivity_cmd {
3047        __le16 control;                 /* always use "1" */
3048        __le16 table[HD_TABLE_SIZE];    /* use HD_* as index */
3049} __packed;
3050
3051/*
3052 *
3053 */
3054struct iwl_enhance_sensitivity_cmd {
3055        __le16 control;                 /* always use "1" */
3056        __le16 enhance_table[ENHANCE_HD_TABLE_SIZE];    /* use HD_* as index */
3057} __packed;
3058
3059
3060/**
3061 * REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
3062 *
3063 * This command sets the relative gains of agn device's 3 radio receiver chains.
3064 *
3065 * After the first association, driver should accumulate signal and noise
3066 * statistics from the STATISTICS_NOTIFICATIONs that follow the first 20
3067 * beacons from the associated network (don't collect statistics that come
3068 * in from scanning, or any other non-network source).
3069 *
3070 * DISCONNECTED ANTENNA:
3071 *
3072 * Driver should determine which antennas are actually connected, by comparing
3073 * average beacon signal levels for the 3 Rx chains.  Accumulate (add) the
3074 * following values over 20 beacons, one accumulator for each of the chains
3075 * a/b/c, from struct statistics_rx_non_phy:
3076 *
3077 * beacon_rssi_[abc] & 0x0FF (unsigned, units in dB)
3078 *
3079 * Find the strongest signal from among a/b/c.  Compare the other two to the
3080 * strongest.  If any signal is more than 15 dB (times 20, unless you
3081 * divide the accumulated values by 20) below the strongest, the driver
3082 * considers that antenna to be disconnected, and should not try to use that
3083 * antenna/chain for Rx or Tx.  If both A and B seem to be disconnected,
3084 * driver should declare the stronger one as connected, and attempt to use it
3085 * (A and B are the only 2 Tx chains!).
3086 *
3087 *
3088 * RX BALANCE:
3089 *
3090 * Driver should balance the 3 receivers (but just the ones that are connected
3091 * to antennas, see above) for gain, by comparing the average signal levels
3092 * detected during the silence after each beacon (background noise).
3093 * Accumulate (add) the following values over 20 beacons, one accumulator for
3094 * each of the chains a/b/c, from struct statistics_rx_non_phy:
3095 *
3096 * beacon_silence_rssi_[abc] & 0x0FF (unsigned, units in dB)
3097 *
3098 * Find the weakest background noise level from among a/b/c.  This Rx chain
3099 * will be the reference, with 0 gain adjustment.  Attenuate other channels by
3100 * finding noise difference:
3101 *
3102 * (accum_noise[i] - accum_noise[reference]) / 30
3103 *
3104 * The "30" adjusts the dB in the 20 accumulated samples to units of 1.5 dB.
3105 * For use in diff_gain_[abc] fields of struct iwl_calibration_cmd, the
3106 * driver should limit the difference results to a range of 0-3 (0-4.5 dB),
3107 * and set bit 2 to indicate "reduce gain".  The value for the reference
3108 * (weakest) chain should be "0".
3109 *
3110 * diff_gain_[abc] bit fields:
3111 *   2: (1) reduce gain, (0) increase gain
3112 * 1-0: amount of gain, units of 1.5 dB
3113 */
3114
3115/* Phy calibration command for series */
3116enum {
3117        IWL_PHY_CALIBRATE_DC_CMD                = 8,
3118        IWL_PHY_CALIBRATE_LO_CMD                = 9,
3119        IWL_PHY_CALIBRATE_TX_IQ_CMD             = 11,
3120        IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD       = 15,
3121        IWL_PHY_CALIBRATE_BASE_BAND_CMD         = 16,
3122        IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD        = 17,
3123        IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD       = 18,
3124};
3125
3126/* This enum defines the bitmap of various calibrations to enable in both
3127 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3128 */
3129enum iwl_ucode_calib_cfg {
3130        IWL_CALIB_CFG_RX_BB_IDX                 = BIT(0),
3131        IWL_CALIB_CFG_DC_IDX                    = BIT(1),
3132        IWL_CALIB_CFG_LO_IDX                    = BIT(2),
3133        IWL_CALIB_CFG_TX_IQ_IDX                 = BIT(3),
3134        IWL_CALIB_CFG_RX_IQ_IDX                 = BIT(4),
3135        IWL_CALIB_CFG_NOISE_IDX                 = BIT(5),
3136        IWL_CALIB_CFG_CRYSTAL_IDX               = BIT(6),
3137        IWL_CALIB_CFG_TEMPERATURE_IDX           = BIT(7),
3138        IWL_CALIB_CFG_PAPD_IDX                  = BIT(8),
3139        IWL_CALIB_CFG_SENSITIVITY_IDX           = BIT(9),
3140        IWL_CALIB_CFG_TX_PWR_IDX                = BIT(10),
3141};
3142
3143#define IWL_CALIB_INIT_CFG_ALL  cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX |   \
3144                                        IWL_CALIB_CFG_DC_IDX |          \
3145                                        IWL_CALIB_CFG_LO_IDX |          \
3146                                        IWL_CALIB_CFG_TX_IQ_IDX |       \
3147                                        IWL_CALIB_CFG_RX_IQ_IDX |       \
3148                                        IWL_CALIB_CFG_CRYSTAL_IDX)
3149
3150#define IWL_CALIB_RT_CFG_ALL    cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX |   \
3151                                        IWL_CALIB_CFG_DC_IDX |          \
3152                                        IWL_CALIB_CFG_LO_IDX |          \
3153                                        IWL_CALIB_CFG_TX_IQ_IDX |       \
3154                                        IWL_CALIB_CFG_RX_IQ_IDX |       \
3155                                        IWL_CALIB_CFG_TEMPERATURE_IDX | \
3156                                        IWL_CALIB_CFG_PAPD_IDX |        \
3157                                        IWL_CALIB_CFG_TX_PWR_IDX |      \
3158                                        IWL_CALIB_CFG_CRYSTAL_IDX)
3159
3160#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK       cpu_to_le32(BIT(0))
3161
3162struct iwl_calib_cfg_elmnt_s {
3163        __le32 is_enable;
3164        __le32 start;
3165        __le32 send_res;
3166        __le32 apply_res;
3167        __le32 reserved;
3168} __packed;
3169
3170struct iwl_calib_cfg_status_s {
3171        struct iwl_calib_cfg_elmnt_s once;
3172        struct iwl_calib_cfg_elmnt_s perd;
3173        __le32 flags;
3174} __packed;
3175
3176struct iwl_calib_cfg_cmd {
3177        struct iwl_calib_cfg_status_s ucd_calib_cfg;
3178        struct iwl_calib_cfg_status_s drv_calib_cfg;
3179        __le32 reserved1;
3180} __packed;
3181
3182struct iwl_calib_hdr {
3183        u8 op_code;
3184        u8 first_group;
3185        u8 groups_num;
3186        u8 data_valid;
3187} __packed;
3188
3189struct iwl_calib_cmd {
3190        struct iwl_calib_hdr hdr;
3191        u8 data[0];
3192} __packed;
3193
3194struct iwl_calib_xtal_freq_cmd {
3195        struct iwl_calib_hdr hdr;
3196        u8 cap_pin1;
3197        u8 cap_pin2;
3198        u8 pad[2];
3199} __packed;
3200
3201#define DEFAULT_RADIO_SENSOR_OFFSET    cpu_to_le16(2700)
3202struct iwl_calib_temperature_offset_cmd {
3203        struct iwl_calib_hdr hdr;
3204        __le16 radio_sensor_offset;
3205        __le16 reserved;
3206} __packed;
3207
3208struct iwl_calib_temperature_offset_v2_cmd {
3209        struct iwl_calib_hdr hdr;
3210        __le16 radio_sensor_offset_high;
3211        __le16 radio_sensor_offset_low;
3212        __le16 burntVoltageRef;
3213        __le16 reserved;
3214} __packed;
3215
3216/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3217struct iwl_calib_chain_noise_reset_cmd {
3218        struct iwl_calib_hdr hdr;
3219        u8 data[0];
3220};
3221
3222/* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
3223struct iwl_calib_chain_noise_gain_cmd {
3224        struct iwl_calib_hdr hdr;
3225        u8 delta_gain_1;
3226        u8 delta_gain_2;
3227        u8 pad[2];
3228} __packed;
3229
3230/******************************************************************************
3231 * (12)
3232 * Miscellaneous Commands:
3233 *
3234 *****************************************************************************/
3235
3236/*
3237 * LEDs Command & Response
3238 * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3239 *
3240 * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3241 * this command turns it on or off, or sets up a periodic blinking cycle.
3242 */
3243struct iwl_led_cmd {
3244        __le32 interval;        /* "interval" in uSec */
3245        u8 id;                  /* 1: Activity, 2: Link, 3: Tech */
3246        u8 off;                 /* # intervals off while blinking;
3247                                 * "0", with >0 "on" value, turns LED on */
3248        u8 on;                  /* # intervals on while blinking;
3249                                 * "0", regardless of "off", turns LED off */
3250        u8 reserved;
3251} __packed;
3252
3253/*
3254 * station priority table entries
3255 * also used as potential "events" value for both
3256 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3257 */
3258
3259/*
3260 * COEX events entry flag masks
3261 * RP - Requested Priority
3262 * WP - Win Medium Priority: priority assigned when the contention has been won
3263 */
3264#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG        (0x1)
3265#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG        (0x2)
3266#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG  (0x4)
3267
3268#define COEX_CU_UNASSOC_IDLE_RP               4
3269#define COEX_CU_UNASSOC_MANUAL_SCAN_RP        4
3270#define COEX_CU_UNASSOC_AUTO_SCAN_RP          4
3271#define COEX_CU_CALIBRATION_RP                4
3272#define COEX_CU_PERIODIC_CALIBRATION_RP       4
3273#define COEX_CU_CONNECTION_ESTAB_RP           4
3274#define COEX_CU_ASSOCIATED_IDLE_RP            4
3275#define COEX_CU_ASSOC_MANUAL_SCAN_RP          4
3276#define COEX_CU_ASSOC_AUTO_SCAN_RP            4
3277#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP         4
3278#define COEX_CU_RF_ON_RP                      6
3279#define COEX_CU_RF_OFF_RP                     4
3280#define COEX_CU_STAND_ALONE_DEBUG_RP          6
3281#define COEX_CU_IPAN_ASSOC_LEVEL_RP           4
3282#define COEX_CU_RSRVD1_RP                     4
3283#define COEX_CU_RSRVD2_RP                     4
3284
3285#define COEX_CU_UNASSOC_IDLE_WP               3
3286#define COEX_CU_UNASSOC_MANUAL_SCAN_WP        3
3287#define COEX_CU_UNASSOC_AUTO_SCAN_WP          3
3288#define COEX_CU_CALIBRATION_WP                3
3289#define COEX_CU_PERIODIC_CALIBRATION_WP       3
3290#define COEX_CU_CONNECTION_ESTAB_WP           3
3291#define COEX_CU_ASSOCIATED_IDLE_WP            3
3292#define COEX_CU_ASSOC_MANUAL_SCAN_WP          3
3293#define COEX_CU_ASSOC_AUTO_SCAN_WP            3
3294#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP         3
3295#define COEX_CU_RF_ON_WP                      3
3296#define COEX_CU_RF_OFF_WP                     3
3297#define COEX_CU_STAND_ALONE_DEBUG_WP          6
3298#define COEX_CU_IPAN_ASSOC_LEVEL_WP           3
3299#define COEX_CU_RSRVD1_WP                     3
3300#define COEX_CU_RSRVD2_WP                     3
3301
3302#define COEX_UNASSOC_IDLE_FLAGS                     0
3303#define COEX_UNASSOC_MANUAL_SCAN_FLAGS          \
3304        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3305        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3306#define COEX_UNASSOC_AUTO_SCAN_FLAGS            \
3307        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3308        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3309#define COEX_CALIBRATION_FLAGS                  \
3310        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3311        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3312#define COEX_PERIODIC_CALIBRATION_FLAGS             0
3313/*
3314 * COEX_CONNECTION_ESTAB:
3315 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3316 */
3317#define COEX_CONNECTION_ESTAB_FLAGS             \
3318        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3319        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG |    \
3320        COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3321#define COEX_ASSOCIATED_IDLE_FLAGS                  0
3322#define COEX_ASSOC_MANUAL_SCAN_FLAGS            \
3323        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3324        COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3325#define COEX_ASSOC_AUTO_SCAN_FLAGS              \
3326        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3327         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3328#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS               0
3329#define COEX_RF_ON_FLAGS                            0
3330#define COEX_RF_OFF_FLAGS                           0
3331#define COEX_STAND_ALONE_DEBUG_FLAGS            \
3332        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3333         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3334#define COEX_IPAN_ASSOC_LEVEL_FLAGS             \
3335        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3336         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG |   \
3337         COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3338#define COEX_RSRVD1_FLAGS                           0
3339#define COEX_RSRVD2_FLAGS                           0
3340/*
3341 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3342 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3343 */
3344#define COEX_CU_RF_ON_FLAGS                     \
3345        (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG |   \
3346         COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG |   \
3347         COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3348
3349
3350enum {
3351        /* un-association part */
3352        COEX_UNASSOC_IDLE               = 0,
3353        COEX_UNASSOC_MANUAL_SCAN        = 1,
3354        COEX_UNASSOC_AUTO_SCAN          = 2,
3355        /* calibration */
3356        COEX_CALIBRATION                = 3,
3357        COEX_PERIODIC_CALIBRATION       = 4,
3358        /* connection */
3359        COEX_CONNECTION_ESTAB           = 5,
3360        /* association part */
3361        COEX_ASSOCIATED_IDLE            = 6,
3362        COEX_ASSOC_MANUAL_SCAN          = 7,
3363        COEX_ASSOC_AUTO_SCAN            = 8,
3364        COEX_ASSOC_ACTIVE_LEVEL         = 9,
3365        /* RF ON/OFF */
3366        COEX_RF_ON                      = 10,
3367        COEX_RF_OFF                     = 11,
3368        COEX_STAND_ALONE_DEBUG          = 12,
3369        /* IPAN */
3370        COEX_IPAN_ASSOC_LEVEL           = 13,
3371        /* reserved */
3372        COEX_RSRVD1                     = 14,
3373        COEX_RSRVD2                     = 15,
3374        COEX_NUM_OF_EVENTS              = 16
3375};
3376
3377/*
3378 * Coexistence WIFI/WIMAX  Command
3379 * COEX_PRIORITY_TABLE_CMD = 0x5a
3380 *
3381 */
3382struct iwl_wimax_coex_event_entry {
3383        u8 request_prio;
3384        u8 win_medium_prio;
3385        u8 reserved;
3386        u8 flags;
3387} __packed;
3388
3389/* COEX flag masks */
3390
3391/* Station table is valid */
3392#define COEX_FLAGS_STA_TABLE_VALID_MSK      (0x1)
3393/* UnMask wake up src at unassociated sleep */
3394#define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK    (0x4)
3395/* UnMask wake up src at associated sleep */
3396#define COEX_FLAGS_ASSOC_WA_UNMASK_MSK      (0x8)
3397/* Enable CoEx feature. */
3398#define COEX_FLAGS_COEX_ENABLE_MSK          (0x80)
3399
3400struct iwl_wimax_coex_cmd {
3401        u8 flags;
3402        u8 reserved[3];
3403        struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
3404} __packed;
3405
3406/*
3407 * Coexistence MEDIUM NOTIFICATION
3408 * COEX_MEDIUM_NOTIFICATION = 0x5b
3409 *
3410 * notification from uCode to host to indicate medium changes
3411 *
3412 */
3413/*
3414 * status field
3415 * bit 0 - 2: medium status
3416 * bit 3: medium change indication
3417 * bit 4 - 31: reserved
3418 */
3419/* status option values, (0 - 2 bits) */
3420#define COEX_MEDIUM_BUSY        (0x0) /* radio belongs to WiMAX */
3421#define COEX_MEDIUM_ACTIVE      (0x1) /* radio belongs to WiFi */
3422#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3423#define COEX_MEDIUM_MSK         (0x7)
3424
3425/* send notification status (1 bit) */
3426#define COEX_MEDIUM_CHANGED     (0x8)
3427#define COEX_MEDIUM_CHANGED_MSK (0x8)
3428#define COEX_MEDIUM_SHIFT       (3)
3429
3430struct iwl_coex_medium_notification {
3431        __le32 status;
3432        __le32 events;
3433} __packed;
3434
3435/*
3436 * Coexistence EVENT  Command
3437 * COEX_EVENT_CMD = 0x5c
3438 *
3439 * send from host to uCode for coex event request.
3440 */
3441/* flags options */
3442#define COEX_EVENT_REQUEST_MSK  (0x1)
3443
3444struct iwl_coex_event_cmd {
3445        u8 flags;
3446        u8 event;
3447        __le16 reserved;
3448} __packed;
3449
3450struct iwl_coex_event_resp {
3451        __le32 status;
3452} __packed;
3453
3454
3455/******************************************************************************
3456 * Bluetooth Coexistence commands
3457 *
3458 *****************************************************************************/
3459
3460/*
3461 * BT Status notification
3462 * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
3463 */
3464enum iwl_bt_coex_profile_traffic_load {
3465        IWL_BT_COEX_TRAFFIC_LOAD_NONE =         0,
3466        IWL_BT_COEX_TRAFFIC_LOAD_LOW =          1,
3467        IWL_BT_COEX_TRAFFIC_LOAD_HIGH =         2,
3468        IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS =   3,
3469/*
3470 * There are no more even though below is a u8, the
3471 * indication from the BT device only has two bits.
3472 */
3473};
3474
3475#define BT_SESSION_ACTIVITY_1_UART_MSG          0x1
3476#define BT_SESSION_ACTIVITY_2_UART_MSG          0x2
3477
3478/* BT UART message - Share Part (BT -> WiFi) */
3479#define BT_UART_MSG_FRAME1MSGTYPE_POS           (0)
3480#define BT_UART_MSG_FRAME1MSGTYPE_MSK           \
3481                (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3482#define BT_UART_MSG_FRAME1SSN_POS               (3)
3483#define BT_UART_MSG_FRAME1SSN_MSK               \
3484                (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3485#define BT_UART_MSG_FRAME1UPDATEREQ_POS         (5)
3486#define BT_UART_MSG_FRAME1UPDATEREQ_MSK         \
3487                (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3488#define BT_UART_MSG_FRAME1RESERVED_POS          (6)
3489#define BT_UART_MSG_FRAME1RESERVED_MSK          \
3490                (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3491
3492#define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS   (0)
3493#define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK   \
3494                (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3495#define BT_UART_MSG_FRAME2TRAFFICLOAD_POS       (2)
3496#define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK       \
3497                (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3498#define BT_UART_MSG_FRAME2CHLSEQN_POS           (4)
3499#define BT_UART_MSG_FRAME2CHLSEQN_MSK           \
3500                (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3501#define BT_UART_MSG_FRAME2INBAND_POS            (5)
3502#define BT_UART_MSG_FRAME2INBAND_MSK            \
3503                (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3504#define BT_UART_MSG_FRAME2RESERVED_POS          (6)
3505#define BT_UART_MSG_FRAME2RESERVED_MSK          \
3506                (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3507
3508#define BT_UART_MSG_FRAME3SCOESCO_POS           (0)
3509#define BT_UART_MSG_FRAME3SCOESCO_MSK           \
3510                (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3511#define BT_UART_MSG_FRAME3SNIFF_POS             (1)
3512#define BT_UART_MSG_FRAME3SNIFF_MSK             \
3513                (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3514#define BT_UART_MSG_FRAME3A2DP_POS              (2)
3515#define BT_UART_MSG_FRAME3A2DP_MSK              \
3516                (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3517#define BT_UART_MSG_FRAME3ACL_POS               (3)
3518#define BT_UART_MSG_FRAME3ACL_MSK               \
3519                (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3520#define BT_UART_MSG_FRAME3MASTER_POS            (4)
3521#define BT_UART_MSG_FRAME3MASTER_MSK            \
3522                (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3523#define BT_UART_MSG_FRAME3OBEX_POS              (5)
3524#define BT_UART_MSG_FRAME3OBEX_MSK              \
3525                (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3526#define BT_UART_MSG_FRAME3RESERVED_POS          (6)
3527#define BT_UART_MSG_FRAME3RESERVED_MSK          \
3528                (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3529
3530#define BT_UART_MSG_FRAME4IDLEDURATION_POS      (0)
3531#define BT_UART_MSG_FRAME4IDLEDURATION_MSK      \
3532                (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3533#define BT_UART_MSG_FRAME4RESERVED_POS          (6)
3534#define BT_UART_MSG_FRAME4RESERVED_MSK          \
3535                (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3536
3537#define BT_UART_MSG_FRAME5TXACTIVITY_POS        (0)
3538#define BT_UART_MSG_FRAME5TXACTIVITY_MSK        \
3539                (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3540#define BT_UART_MSG_FRAME5RXACTIVITY_POS        (2)
3541#define BT_UART_MSG_FRAME5RXACTIVITY_MSK        \
3542                (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3543#define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS    (4)
3544#define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK    \
3545                (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3546#define BT_UART_MSG_FRAME5RESERVED_POS          (6)
3547#define BT_UART_MSG_FRAME5RESERVED_MSK          \
3548                (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3549
3550#define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS     (0)
3551#define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK     \
3552                (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3553#define BT_UART_MSG_FRAME6DISCOVERABLE_POS      (5)
3554#define BT_UART_MSG_FRAME6DISCOVERABLE_MSK      \
3555                (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3556#define BT_UART_MSG_FRAME6RESERVED_POS          (6)
3557#define BT_UART_MSG_FRAME6RESERVED_MSK          \
3558                (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3559
3560#define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS     (0)
3561#define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK     \
3562                (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
3563#define BT_UART_MSG_FRAME7PAGE_POS              (3)
3564#define BT_UART_MSG_FRAME7PAGE_MSK              \
3565                (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3566#define BT_UART_MSG_FRAME7INQUIRY_POS           (4)
3567#define BT_UART_MSG_FRAME7INQUIRY_MSK           \
3568                (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
3569#define BT_UART_MSG_FRAME7CONNECTABLE_POS       (5)
3570#define BT_UART_MSG_FRAME7CONNECTABLE_MSK       \
3571                (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3572#define BT_UART_MSG_FRAME7RESERVED_POS          (6)
3573#define BT_UART_MSG_FRAME7RESERVED_MSK          \
3574                (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3575
3576/* BT Session Activity 2 UART message (BT -> WiFi) */
3577#define BT_UART_MSG_2_FRAME1RESERVED1_POS       (5)
3578#define BT_UART_MSG_2_FRAME1RESERVED1_MSK       \
3579                (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3580#define BT_UART_MSG_2_FRAME1RESERVED2_POS       (6)
3581#define BT_UART_MSG_2_FRAME1RESERVED2_MSK       \
3582                (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3583
3584#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS  (0)
3585#define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK  \
3586                (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3587#define BT_UART_MSG_2_FRAME2RESERVED_POS        (6)
3588#define BT_UART_MSG_2_FRAME2RESERVED_MSK        \
3589                (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3590
3591#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS   (0)
3592#define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK   \
3593                (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3594#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS   (4)
3595#define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK   \
3596                (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3597#define BT_UART_MSG_2_FRAME3LEMASTER_POS        (5)
3598#define BT_UART_MSG_2_FRAME3LEMASTER_MSK        \
3599                (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3600#define BT_UART_MSG_2_FRAME3RESERVED_POS        (6)
3601#define BT_UART_MSG_2_FRAME3RESERVED_MSK        \
3602                (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3603
3604#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS   (0)
3605#define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK   \
3606                (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3607#define BT_UART_MSG_2_FRAME4NUMLECONN_POS       (4)
3608#define BT_UART_MSG_2_FRAME4NUMLECONN_MSK       \
3609                (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3610#define BT_UART_MSG_2_FRAME4RESERVED_POS        (6)
3611#define BT_UART_MSG_2_FRAME4RESERVED_MSK        \
3612                (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3613
3614#define BT_UART_MSG_2_FRAME5BTMINRSSI_POS       (0)
3615#define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK       \
3616                (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3617#define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS  (4)
3618#define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK  \
3619                (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3620#define BT_UART_MSG_2_FRAME5LEADVERMODE_POS     (5)
3621#define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK     \
3622                (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3623#define BT_UART_MSG_2_FRAME5RESERVED_POS        (6)
3624#define BT_UART_MSG_2_FRAME5RESERVED_MSK        \
3625                (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3626
3627#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS  (0)
3628#define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK  \
3629                (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3630#define BT_UART_MSG_2_FRAME6RFU_POS             (5)
3631#define BT_UART_MSG_2_FRAME6RFU_MSK             \
3632                (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3633#define BT_UART_MSG_2_FRAME6RESERVED_POS        (6)
3634#define BT_UART_MSG_2_FRAME6RESERVED_MSK        \
3635                (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3636
3637#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS  (0)
3638#define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK  \
3639                (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3640#define BT_UART_MSG_2_FRAME7LEPROFILE1_POS      (3)
3641#define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK      \
3642                (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3643#define BT_UART_MSG_2_FRAME7LEPROFILE2_POS      (4)
3644#define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK      \
3645                (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3646#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS  (5)
3647#define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK  \
3648                (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3649#define BT_UART_MSG_2_FRAME7RESERVED_POS        (6)
3650#define BT_UART_MSG_2_FRAME7RESERVED_MSK        \
3651                (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3652
3653
3654#define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD     (-62)
3655#define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD    (-65)
3656
3657struct iwl_bt_uart_msg {
3658        u8 header;
3659        u8 frame1;
3660        u8 frame2;
3661        u8 frame3;
3662        u8 frame4;
3663        u8 frame5;
3664        u8 frame6;
3665        u8 frame7;
3666} __packed;
3667
3668struct iwl_bt_coex_profile_notif {
3669        struct iwl_bt_uart_msg last_bt_uart_msg;
3670        u8 bt_status; /* 0 - off, 1 - on */
3671        u8 bt_traffic_load; /* 0 .. 3? */
3672        u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3673        u8 reserved;
3674} __packed;
3675
3676#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3677#define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3678#define IWL_BT_COEX_PRIO_TBL_PRIO_POS           1
3679#define IWL_BT_COEX_PRIO_TBL_PRIO_MASK          0x0e
3680#define IWL_BT_COEX_PRIO_TBL_RESERVED_POS       4
3681#define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK      0xf0
3682#define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT         1
3683
3684/*
3685 * BT Coexistence Priority table
3686 * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3687 */
3688enum bt_coex_prio_table_events {
3689        BT_COEX_PRIO_TBL_EVT_INIT_CALIB1 = 0,
3690        BT_COEX_PRIO_TBL_EVT_INIT_CALIB2 = 1,
3691        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1 = 2,
3692        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2 = 3, /* DC calib */
3693        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1 = 4,
3694        BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2 = 5,
3695        BT_COEX_PRIO_TBL_EVT_DTIM = 6,
3696        BT_COEX_PRIO_TBL_EVT_SCAN52 = 7,
3697        BT_COEX_PRIO_TBL_EVT_SCAN24 = 8,
3698        BT_COEX_PRIO_TBL_EVT_RESERVED0 = 9,
3699        BT_COEX_PRIO_TBL_EVT_RESERVED1 = 10,
3700        BT_COEX_PRIO_TBL_EVT_RESERVED2 = 11,
3701        BT_COEX_PRIO_TBL_EVT_RESERVED3 = 12,
3702        BT_COEX_PRIO_TBL_EVT_RESERVED4 = 13,
3703        BT_COEX_PRIO_TBL_EVT_RESERVED5 = 14,
3704        BT_COEX_PRIO_TBL_EVT_RESERVED6 = 15,
3705        /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3706        BT_COEX_PRIO_TBL_EVT_MAX,
3707};
3708
3709enum bt_coex_prio_table_priorities {
3710        BT_COEX_PRIO_TBL_DISABLED = 0,
3711        BT_COEX_PRIO_TBL_PRIO_LOW = 1,
3712        BT_COEX_PRIO_TBL_PRIO_HIGH = 2,
3713        BT_COEX_PRIO_TBL_PRIO_BYPASS = 3,
3714        BT_COEX_PRIO_TBL_PRIO_COEX_OFF = 4,
3715        BT_COEX_PRIO_TBL_PRIO_COEX_ON = 5,
3716        BT_COEX_PRIO_TBL_PRIO_RSRVD1 = 6,
3717        BT_COEX_PRIO_TBL_PRIO_RSRVD2 = 7,
3718        BT_COEX_PRIO_TBL_MAX,
3719};
3720
3721struct iwl_bt_coex_prio_table_cmd {
3722        u8 prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX];
3723} __packed;
3724
3725#define IWL_BT_COEX_ENV_CLOSE   0
3726#define IWL_BT_COEX_ENV_OPEN    1
3727/*
3728 * BT Protection Envelope
3729 * REPLY_BT_COEX_PROT_ENV = 0xcd
3730 */
3731struct iwl_bt_coex_prot_env_cmd {
3732        u8 action; /* 0 = closed, 1 = open */
3733        u8 type; /* 0 .. 15 */
3734        u8 reserved[2];
3735} __packed;
3736
3737/*
3738 * REPLY_D3_CONFIG
3739 */
3740enum iwlagn_d3_wakeup_filters {
3741        IWLAGN_D3_WAKEUP_RFKILL         = BIT(0),
3742        IWLAGN_D3_WAKEUP_SYSASSERT      = BIT(1),
3743};
3744
3745struct iwlagn_d3_config_cmd {
3746        __le32 min_sleep_time;
3747        __le32 wakeup_flags;
3748} __packed;
3749
3750/*
3751 * REPLY_WOWLAN_PATTERNS
3752 */
3753#define IWLAGN_WOWLAN_MIN_PATTERN_LEN   16
3754#define IWLAGN_WOWLAN_MAX_PATTERN_LEN   128
3755
3756struct iwlagn_wowlan_pattern {
3757        u8 mask[IWLAGN_WOWLAN_MAX_PATTERN_LEN / 8];
3758        u8 pattern[IWLAGN_WOWLAN_MAX_PATTERN_LEN];
3759        u8 mask_size;
3760        u8 pattern_size;
3761        __le16 reserved;
3762} __packed;
3763
3764#define IWLAGN_WOWLAN_MAX_PATTERNS      20
3765
3766struct iwlagn_wowlan_patterns_cmd {
3767        __le32 n_patterns;
3768        struct iwlagn_wowlan_pattern patterns[];
3769} __packed;
3770
3771/*
3772 * REPLY_WOWLAN_WAKEUP_FILTER
3773 */
3774enum iwlagn_wowlan_wakeup_filters {
3775        IWLAGN_WOWLAN_WAKEUP_MAGIC_PACKET       = BIT(0),
3776        IWLAGN_WOWLAN_WAKEUP_PATTERN_MATCH      = BIT(1),
3777        IWLAGN_WOWLAN_WAKEUP_BEACON_MISS        = BIT(2),
3778        IWLAGN_WOWLAN_WAKEUP_LINK_CHANGE        = BIT(3),
3779        IWLAGN_WOWLAN_WAKEUP_GTK_REKEY_FAIL     = BIT(4),
3780        IWLAGN_WOWLAN_WAKEUP_EAP_IDENT_REQ      = BIT(5),
3781        IWLAGN_WOWLAN_WAKEUP_4WAY_HANDSHAKE     = BIT(6),
3782        IWLAGN_WOWLAN_WAKEUP_ALWAYS             = BIT(7),
3783        IWLAGN_WOWLAN_WAKEUP_ENABLE_NET_DETECT  = BIT(8),
3784};
3785
3786struct iwlagn_wowlan_wakeup_filter_cmd {
3787        __le32 enabled;
3788        __le16 non_qos_seq;
3789        __le16 reserved;
3790        __le16 qos_seq[8];
3791};
3792
3793/*
3794 * REPLY_WOWLAN_TSC_RSC_PARAMS
3795 */
3796#define IWLAGN_NUM_RSC  16
3797
3798struct tkip_sc {
3799        __le16 iv16;
3800        __le16 pad;
3801        __le32 iv32;
3802} __packed;
3803
3804struct iwlagn_tkip_rsc_tsc {
3805        struct tkip_sc unicast_rsc[IWLAGN_NUM_RSC];
3806        struct tkip_sc multicast_rsc[IWLAGN_NUM_RSC];
3807        struct tkip_sc tsc;
3808} __packed;
3809
3810struct aes_sc {
3811        __le64 pn;
3812} __packed;
3813
3814struct iwlagn_aes_rsc_tsc {
3815        struct aes_sc unicast_rsc[IWLAGN_NUM_RSC];
3816        struct aes_sc multicast_rsc[IWLAGN_NUM_RSC];
3817        struct aes_sc tsc;
3818} __packed;
3819
3820union iwlagn_all_tsc_rsc {
3821        struct iwlagn_tkip_rsc_tsc tkip;
3822        struct iwlagn_aes_rsc_tsc aes;
3823};
3824
3825struct iwlagn_wowlan_rsc_tsc_params_cmd {
3826        union iwlagn_all_tsc_rsc all_tsc_rsc;
3827} __packed;
3828
3829/*
3830 * REPLY_WOWLAN_TKIP_PARAMS
3831 */
3832#define IWLAGN_MIC_KEY_SIZE     8
3833#define IWLAGN_P1K_SIZE         5
3834struct iwlagn_mic_keys {
3835        u8 tx[IWLAGN_MIC_KEY_SIZE];
3836        u8 rx_unicast[IWLAGN_MIC_KEY_SIZE];
3837        u8 rx_mcast[IWLAGN_MIC_KEY_SIZE];
3838} __packed;
3839
3840struct iwlagn_p1k_cache {
3841        __le16 p1k[IWLAGN_P1K_SIZE];
3842} __packed;
3843
3844#define IWLAGN_NUM_RX_P1K_CACHE 2
3845
3846struct iwlagn_wowlan_tkip_params_cmd {
3847        struct iwlagn_mic_keys mic_keys;
3848        struct iwlagn_p1k_cache tx;
3849        struct iwlagn_p1k_cache rx_uni[IWLAGN_NUM_RX_P1K_CACHE];
3850        struct iwlagn_p1k_cache rx_multi[IWLAGN_NUM_RX_P1K_CACHE];
3851} __packed;
3852
3853/*
3854 * REPLY_WOWLAN_KEK_KCK_MATERIAL
3855 */
3856
3857#define IWLAGN_KCK_MAX_SIZE     32
3858#define IWLAGN_KEK_MAX_SIZE     32
3859
3860struct iwlagn_wowlan_kek_kck_material_cmd {
3861        u8      kck[IWLAGN_KCK_MAX_SIZE];
3862        u8      kek[IWLAGN_KEK_MAX_SIZE];
3863        __le16  kck_len;
3864        __le16  kek_len;
3865        __le64  replay_ctr;
3866} __packed;
3867
3868#define RF_KILL_INDICATOR_FOR_WOWLAN    0x87
3869
3870/*
3871 * REPLY_WOWLAN_GET_STATUS = 0xe5
3872 */
3873struct iwlagn_wowlan_status {
3874        __le64 replay_ctr;
3875        __le32 rekey_status;
3876        __le32 wakeup_reason;
3877        u8 pattern_number;
3878        u8 reserved1;
3879        __le16 qos_seq_ctr[8];
3880        __le16 non_qos_seq_ctr;
3881        __le16 reserved2;
3882        union iwlagn_all_tsc_rsc tsc_rsc;
3883        __le16 reserved3;
3884} __packed;
3885
3886/*
3887 * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3888 */
3889
3890/*
3891 * Minimum slot time in TU
3892 */
3893#define IWL_MIN_SLOT_TIME       20
3894
3895/**
3896 * struct iwl_wipan_slot
3897 * @width: Time in TU
3898 * @type:
3899 *   0 - BSS
3900 *   1 - PAN
3901 */
3902struct iwl_wipan_slot {
3903        __le16 width;
3904        u8 type;
3905        u8 reserved;
3906} __packed;
3907
3908#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS          BIT(1)  /* reserved */
3909#define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET        BIT(2)  /* reserved */
3910#define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE               BIT(3)  /* reserved */
3911#define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF        BIT(4)
3912#define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE          BIT(5)
3913
3914/**
3915 * struct iwl_wipan_params_cmd
3916 * @flags:
3917 *   bit0: reserved
3918 *   bit1: CP leave channel with CTS
3919 *   bit2: CP leave channel qith Quiet
3920 *   bit3: slotted mode
3921 *     1 - work in slotted mode
3922 *     0 - work in non slotted mode
3923 *   bit4: filter beacon notification
3924 *   bit5: full tx slotted mode. if this flag is set,
3925 *         uCode will perform leaving channel methods in context switch
3926 *         also when working in same channel mode
3927 * @num_slots: 1 - 10
3928 */
3929struct iwl_wipan_params_cmd {
3930        __le16 flags;
3931        u8 reserved;
3932        u8 num_slots;
3933        struct iwl_wipan_slot slots[10];
3934} __packed;
3935
3936/*
3937 * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3938 *
3939 * TODO: Figure out what this is used for,
3940 *       it can only switch between 2.4 GHz
3941 *       channels!!
3942 */
3943
3944struct iwl_wipan_p2p_channel_switch_cmd {
3945        __le16 channel;
3946        __le16 reserved;
3947};
3948
3949/*
3950 * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3951 *
3952 * This is used by the device to notify us of the
3953 * NoA schedule it determined so we can forward it
3954 * to userspace for inclusion in probe responses.
3955 *
3956 * In beacons, the NoA schedule is simply appended
3957 * to the frame we give the device.
3958 */
3959
3960struct iwl_wipan_noa_descriptor {
3961        u8 count;
3962        __le32 duration;
3963        __le32 interval;
3964        __le32 starttime;
3965} __packed;
3966
3967struct iwl_wipan_noa_attribute {
3968        u8 id;
3969        __le16 length;
3970        u8 index;
3971        u8 ct_window;
3972        struct iwl_wipan_noa_descriptor descr0, descr1;
3973        u8 reserved;
3974} __packed;
3975
3976struct iwl_wipan_noa_notification {
3977        u32 noa_active;
3978        struct iwl_wipan_noa_attribute noa_attribute;
3979} __packed;
3980
3981#endif                          /* __iwl_commands_h__ */
3982