LXR linux/drivers/spi/spi-dw-pci.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * PCI interface driver for DW SPI Core
   4 *
   5 * Copyright (c) 2009, 2014 Intel Corporation.
   6 */
   7
   8#include <linux/interrupt.h>
   9#include <linux/pci.h>
  10#include <linux/pm_runtime.h>
  11#include <linux/slab.h>
  12#include <linux/spi/spi.h>
  13#include <linux/module.h>
  14
  15#include "spi-dw.h"
  16
  17#define DRIVER_NAME "dw_spi_pci"
  18
  19struct spi_pci_desc {
  20        int     (*setup)(struct dw_spi *);
  21        u16     num_cs;
  22        u16     bus_num;
  23        u32     max_freq;
  24};
  25
  26static struct spi_pci_desc spi_pci_mid_desc_1 = {
  27        .setup = dw_spi_mid_init,
  28        .num_cs = 5,
  29        .bus_num = 0,
  30};
  31
  32static struct spi_pci_desc spi_pci_mid_desc_2 = {
  33        .setup = dw_spi_mid_init,
  34        .num_cs = 2,
  35        .bus_num = 1,
  36};
  37
  38static struct spi_pci_desc spi_pci_ehl_desc = {
  39        .num_cs = 2,
  40        .bus_num = -1,
  41        .max_freq = 100000000,
  42};
  43
  44static int spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  45{
  46        struct dw_spi *dws;
  47        struct spi_pci_desc *desc = (struct spi_pci_desc *)ent->driver_data;
  48        int pci_bar = 0;
  49        int ret;
  50
  51        ret = pcim_enable_device(pdev);
  52        if (ret)
  53                return ret;
  54
  55        dws = devm_kzalloc(&pdev->dev, sizeof(*dws), GFP_KERNEL);
  56        if (!dws)
  57                return -ENOMEM;
  58
  59        /* Get basic io resource and map it */
  60        dws->paddr = pci_resource_start(pdev, pci_bar);
  61        pci_set_master(pdev);
  62
  63        ret = pcim_iomap_regions(pdev, 1 << pci_bar, pci_name(pdev));
  64        if (ret)
  65                return ret;
  66
  67        ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
  68        if (ret < 0)
  69                return ret;
  70
  71        dws->regs = pcim_iomap_table(pdev)[pci_bar];
  72        dws->irq = pci_irq_vector(pdev, 0);
  73
  74        /*
  75         * Specific handling for platforms, like dma setup,
  76         * clock rate, FIFO depth.
  77         */
  78        if (desc) {
  79                dws->num_cs = desc->num_cs;
  80                dws->bus_num = desc->bus_num;
  81                dws->max_freq = desc->max_freq;
  82
  83                if (desc->setup) {
  84                        ret = desc->setup(dws);
  85                        if (ret)
  86                                return ret;
  87                }
  88        } else {
  89                pci_free_irq_vectors(pdev);
  90                return -ENODEV;
  91        }
  92
  93        ret = dw_spi_add_host(&pdev->dev, dws);
  94        if (ret) {
  95                pci_free_irq_vectors(pdev);
  96                return ret;
  97        }
  98
  99        /* PCI hook and SPI hook use the same drv data */
 100        pci_set_drvdata(pdev, dws);
 101
 102        dev_info(&pdev->dev, "found PCI SPI controller(ID: %04x:%04x)\n",
 103                pdev->vendor, pdev->device);
 104
 105        pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
 106        pm_runtime_use_autosuspend(&pdev->dev);
 107        pm_runtime_put_autosuspend(&pdev->dev);
 108        pm_runtime_allow(&pdev->dev);
 109
 110        return 0;
 111}
 112
 113static void spi_pci_remove(struct pci_dev *pdev)
 114{
 115        struct dw_spi *dws = pci_get_drvdata(pdev);
 116
 117        pm_runtime_forbid(&pdev->dev);
 118        pm_runtime_get_noresume(&pdev->dev);
 119
 120        dw_spi_remove_host(dws);
 121        pci_free_irq_vectors(pdev);
 122}
 123
 124#ifdef CONFIG_PM_SLEEP
 125static int spi_suspend(struct device *dev)
 126{
 127        struct dw_spi *dws = dev_get_drvdata(dev);
 128
 129        return dw_spi_suspend_host(dws);
 130}
 131
 132static int spi_resume(struct device *dev)
 133{
 134        struct dw_spi *dws = dev_get_drvdata(dev);
 135
 136        return dw_spi_resume_host(dws);
 137}
 138#endif
 139
 140static SIMPLE_DEV_PM_OPS(dw_spi_pm_ops, spi_suspend, spi_resume);
 141
 142static const struct pci_device_id pci_ids[] = {
 143        /* Intel MID platform SPI controller 0 */
 144        /*
 145         * The access to the device 8086:0801 is disabled by HW, since it's
 146         * exclusively used by SCU to communicate with MSIC.
 147         */
 148        /* Intel MID platform SPI controller 1 */
 149        { PCI_VDEVICE(INTEL, 0x0800), (kernel_ulong_t)&spi_pci_mid_desc_1},
 150        /* Intel MID platform SPI controller 2 */
 151        { PCI_VDEVICE(INTEL, 0x0812), (kernel_ulong_t)&spi_pci_mid_desc_2},
 152        /* Intel Elkhart Lake PSE SPI controllers */
 153        { PCI_VDEVICE(INTEL, 0x4b84), (kernel_ulong_t)&spi_pci_ehl_desc},
 154        { PCI_VDEVICE(INTEL, 0x4b85), (kernel_ulong_t)&spi_pci_ehl_desc},
 155        { PCI_VDEVICE(INTEL, 0x4b86), (kernel_ulong_t)&spi_pci_ehl_desc},
 156        { PCI_VDEVICE(INTEL, 0x4b87), (kernel_ulong_t)&spi_pci_ehl_desc},
 157        {},
 158};
 159MODULE_DEVICE_TABLE(pci, pci_ids);
 160
 161static struct pci_driver dw_spi_driver = {
 162        .name =         DRIVER_NAME,
 163        .id_table =     pci_ids,
 164        .probe =        spi_pci_probe,
 165        .remove =       spi_pci_remove,
 166        .driver         = {
 167                .pm     = &dw_spi_pm_ops,
 168        },
 169};
 170
 171module_pci_driver(dw_spi_driver);
 172
 173MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
 174MODULE_DESCRIPTION("PCI interface driver for DW SPI Core");
 175MODULE_LICENSE("GPL v2");
 176