LXR linux/drivers/staging/fbtft/fb

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * FB driver for the HX8347D LCD Controller
   4 *
   5 * Copyright (C) 2013 Christian Vogelgsang
   6 *
   7 * Based on driver code found here: https://github.com/watterott/r61505u-Adapter
   8 */
   9
  10#include <linux/module.h>
  11#include <linux/kernel.h>
  12#include <linux/init.h>
  13#include <linux/delay.h>
  14
  15#include "fbtft.h"
  16
  17#define DRVNAME         "fb_hx8347d"
  18#define WIDTH           320
  19#define HEIGHT          240
  20#define DEFAULT_GAMMA   "0 0 0 0 0 0 0 0 0 0 0 0 0 0\n" \
  21                        "0 0 0 0 0 0 0 0 0 0 0 0 0 0"
  22
  23static int init_display(struct fbtft_par *par)
  24{
  25        par->fbtftops.reset(par);
  26
  27        /* driving ability */
  28        write_reg(par, 0xEA, 0x00);
  29        write_reg(par, 0xEB, 0x20);
  30        write_reg(par, 0xEC, 0x0C);
  31        write_reg(par, 0xED, 0xC4);
  32        write_reg(par, 0xE8, 0x40);
  33        write_reg(par, 0xE9, 0x38);
  34        write_reg(par, 0xF1, 0x01);
  35        write_reg(par, 0xF2, 0x10);
  36        write_reg(par, 0x27, 0xA3);
  37
  38        /* power voltage */
  39        write_reg(par, 0x1B, 0x1B);
  40        write_reg(par, 0x1A, 0x01);
  41        write_reg(par, 0x24, 0x2F);
  42        write_reg(par, 0x25, 0x57);
  43
  44        /* VCOM offset */
  45        write_reg(par, 0x23, 0x8D); /* for flicker adjust */
  46
  47        /* power on */
  48        write_reg(par, 0x18, 0x36);
  49        write_reg(par, 0x19, 0x01); /* start osc */
  50        write_reg(par, 0x01, 0x00); /* wakeup */
  51        write_reg(par, 0x1F, 0x88);
  52        mdelay(5);
  53        write_reg(par, 0x1F, 0x80);
  54        mdelay(5);
  55        write_reg(par, 0x1F, 0x90);
  56        mdelay(5);
  57        write_reg(par, 0x1F, 0xD0);
  58        mdelay(5);
  59
  60        /* color selection */
  61        write_reg(par, 0x17, 0x05); /* 65k */
  62
  63        /*panel characteristic */
  64        write_reg(par, 0x36, 0x00);
  65
  66        /*display on */
  67        write_reg(par, 0x28, 0x38);
  68        mdelay(40);
  69        write_reg(par, 0x28, 0x3C);
  70
  71        /* orientation */
  72        write_reg(par, 0x16, 0x60 | (par->bgr << 3));
  73
  74        return 0;
  75}
  76
  77static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
  78{
  79        write_reg(par, 0x02, (xs >> 8) & 0xFF);
  80        write_reg(par, 0x03, xs & 0xFF);
  81        write_reg(par, 0x04, (xe >> 8) & 0xFF);
  82        write_reg(par, 0x05, xe & 0xFF);
  83        write_reg(par, 0x06, (ys >> 8) & 0xFF);
  84        write_reg(par, 0x07, ys & 0xFF);
  85        write_reg(par, 0x08, (ye >> 8) & 0xFF);
  86        write_reg(par, 0x09, ye & 0xFF);
  87        write_reg(par, 0x22);
  88}
  89
  90/*
  91 * Gamma string format:
  92 *   VRP0 VRP1 VRP2 VRP3 VRP4 VRP5 PRP0 PRP1 PKP0 PKP1 PKP2 PKP3 PKP4 CGM
  93 *   VRN0 VRN1 VRN2 VRN3 VRN4 VRN5 PRN0 PRN1 PKN0 PKN1 PKN2 PKN3 PKN4 CGM
  94 */
  95#define CURVE(num, idx)  curves[(num) * par->gamma.num_values + (idx)]
  96static int set_gamma(struct fbtft_par *par, u32 *curves)
  97{
  98        static const unsigned long mask[] = {
  99                0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x7f, 0x7f, 0x1f, 0x1f,
 100                0x1f, 0x1f, 0x1f, 0x0f,
 101        };
 102        int i, j;
 103        int acc = 0;
 104
 105        /* apply mask */
 106        for (i = 0; i < par->gamma.num_curves; i++)
 107                for (j = 0; j < par->gamma.num_values; j++) {
 108                        acc += CURVE(i, j);
 109                        CURVE(i, j) &= mask[j];
 110                }
 111
 112        if (acc == 0) /* skip if all values are zero */
 113                return 0;
 114
 115        for (i = 0; i < par->gamma.num_curves; i++) {
 116                write_reg(par, 0x40 + (i * 0x10), CURVE(i, 0));
 117                write_reg(par, 0x41 + (i * 0x10), CURVE(i, 1));
 118                write_reg(par, 0x42 + (i * 0x10), CURVE(i, 2));
 119                write_reg(par, 0x43 + (i * 0x10), CURVE(i, 3));
 120                write_reg(par, 0x44 + (i * 0x10), CURVE(i, 4));
 121                write_reg(par, 0x45 + (i * 0x10), CURVE(i, 5));
 122                write_reg(par, 0x46 + (i * 0x10), CURVE(i, 6));
 123                write_reg(par, 0x47 + (i * 0x10), CURVE(i, 7));
 124                write_reg(par, 0x48 + (i * 0x10), CURVE(i, 8));
 125                write_reg(par, 0x49 + (i * 0x10), CURVE(i, 9));
 126                write_reg(par, 0x4A + (i * 0x10), CURVE(i, 10));
 127                write_reg(par, 0x4B + (i * 0x10), CURVE(i, 11));
 128                write_reg(par, 0x4C + (i * 0x10), CURVE(i, 12));
 129        }
 130        write_reg(par, 0x5D, (CURVE(1, 0) << 4) | CURVE(0, 0));
 131
 132        return 0;
 133}
 134
 135#undef CURVE
 136
 137static struct fbtft_display display = {
 138        .regwidth = 8,
 139        .width = WIDTH,
 140        .height = HEIGHT,
 141        .gamma_num = 2,
 142        .gamma_len = 14,
 143        .gamma = DEFAULT_GAMMA,
 144        .fbtftops = {
 145                .init_display = init_display,
 146                .set_addr_win = set_addr_win,
 147                .set_gamma = set_gamma,
 148        },
 149};
 150
 151FBTFT_REGISTER_DRIVER(DRVNAME, "himax,hx8347d", &display);
 152
 153MODULE_ALIAS("spi:" DRVNAME);
 154MODULE_ALIAS("platform:" DRVNAME);
 155MODULE_ALIAS("spi:hx8347d");
 156MODULE_ALIAS("platform:hx8347d");
 157
 158MODULE_DESCRIPTION("FB driver for the HX8347D LCD Controller");
 159MODULE_AUTHOR("Christian Vogelgsang");
 160MODULE_LICENSE("GPL");
 161