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9#ifndef __DMAR_H__
10#define __DMAR_H__
11
12#include <linux/acpi.h>
13#include <linux/types.h>
14#include <linux/msi.h>
15#include <linux/irqreturn.h>
16#include <linux/rwsem.h>
17#include <linux/rculist.h>
18
19struct acpi_dmar_header;
20
21#ifdef CONFIG_X86
22# define DMAR_UNITS_SUPPORTED MAX_IO_APICS
23#else
24# define DMAR_UNITS_SUPPORTED 64
25#endif
26
27
28#define DMAR_INTR_REMAP 0x1
29#define DMAR_X2APIC_OPT_OUT 0x2
30#define DMAR_PLATFORM_OPT_IN 0x4
31
32struct intel_iommu;
33
34struct dmar_dev_scope {
35 struct device __rcu *dev;
36 u8 bus;
37 u8 devfn;
38};
39
40#ifdef CONFIG_DMAR_TABLE
41extern struct acpi_table_header *dmar_tbl;
42struct dmar_drhd_unit {
43 struct list_head list;
44 struct acpi_dmar_header *hdr;
45 u64 reg_base_addr;
46 struct dmar_dev_scope *devices;
47 int devices_cnt;
48 u16 segment;
49 u8 ignored:1;
50 u8 include_all:1;
51 struct intel_iommu *iommu;
52};
53
54struct dmar_pci_path {
55 u8 bus;
56 u8 device;
57 u8 function;
58};
59
60struct dmar_pci_notify_info {
61 struct pci_dev *dev;
62 unsigned long event;
63 int bus;
64 u16 seg;
65 u16 level;
66 struct dmar_pci_path path[];
67} __attribute__((packed));
68
69extern struct rw_semaphore dmar_global_lock;
70extern struct list_head dmar_drhd_units;
71
72#define for_each_drhd_unit(drhd) \
73 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
74 dmar_rcu_check())
75
76#define for_each_active_drhd_unit(drhd) \
77 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
78 dmar_rcu_check()) \
79 if (drhd->ignored) {} else
80
81#define for_each_active_iommu(i, drhd) \
82 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
83 dmar_rcu_check()) \
84 if (i=drhd->iommu, drhd->ignored) {} else
85
86#define for_each_iommu(i, drhd) \
87 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \
88 dmar_rcu_check()) \
89 if (i=drhd->iommu, 0) {} else
90
91static inline bool dmar_rcu_check(void)
92{
93 return rwsem_is_locked(&dmar_global_lock) ||
94 system_state == SYSTEM_BOOTING;
95}
96
97#define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check())
98
99#define for_each_dev_scope(devs, cnt, i, tmp) \
100 for ((i) = 0; ((tmp) = (i) < (cnt) ? \
101 dmar_rcu_dereference((devs)[(i)].dev) : NULL, (i) < (cnt)); \
102 (i)++)
103
104#define for_each_active_dev_scope(devs, cnt, i, tmp) \
105 for_each_dev_scope((devs), (cnt), (i), (tmp)) \
106 if (!(tmp)) { continue; } else
107
108extern int dmar_table_init(void);
109extern int dmar_dev_scope_init(void);
110extern void dmar_register_bus_notifier(void);
111extern int dmar_parse_dev_scope(void *start, void *end, int *cnt,
112 struct dmar_dev_scope **devices, u16 segment);
113extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt);
114extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt);
115extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info,
116 void *start, void*end, u16 segment,
117 struct dmar_dev_scope *devices,
118 int devices_cnt);
119extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info,
120 u16 segment, struct dmar_dev_scope *devices,
121 int count);
122
123extern int detect_intel_iommu(void);
124extern int enable_drhd_fault_handling(void);
125extern int dmar_device_add(acpi_handle handle);
126extern int dmar_device_remove(acpi_handle handle);
127
128static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg)
129{
130 return 0;
131}
132
133#ifdef CONFIG_INTEL_IOMMU
134extern int iommu_detected, no_iommu;
135extern int intel_iommu_init(void);
136extern void intel_iommu_shutdown(void);
137extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg);
138extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg);
139extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg);
140extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg);
141extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
142extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info);
143#else
144static inline int intel_iommu_init(void) { return -ENODEV; }
145static inline void intel_iommu_shutdown(void) { }
146
147#define dmar_parse_one_rmrr dmar_res_noop
148#define dmar_parse_one_atsr dmar_res_noop
149#define dmar_check_one_atsr dmar_res_noop
150#define dmar_release_one_atsr dmar_res_noop
151
152static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info)
153{
154 return 0;
155}
156
157static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
158{
159 return 0;
160}
161#endif
162
163#ifdef CONFIG_IRQ_REMAP
164extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert);
165#else
166static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
167{ return 0; }
168#endif
169
170extern bool dmar_platform_optin(void);
171
172#else
173
174static inline int dmar_device_add(void *handle)
175{
176 return 0;
177}
178
179static inline int dmar_device_remove(void *handle)
180{
181 return 0;
182}
183
184static inline bool dmar_platform_optin(void)
185{
186 return false;
187}
188
189#endif
190
191struct irte {
192 union {
193
194 struct {
195 __u64 present : 1,
196 fpd : 1,
197 __res0 : 6,
198 avail : 4,
199 __res1 : 3,
200 pst : 1,
201 vector : 8,
202 __res2 : 40;
203 };
204
205
206 struct {
207 __u64 r_present : 1,
208 r_fpd : 1,
209 dst_mode : 1,
210 redir_hint : 1,
211 trigger_mode : 1,
212 dlvry_mode : 3,
213 r_avail : 4,
214 r_res0 : 4,
215 r_vector : 8,
216 r_res1 : 8,
217 dest_id : 32;
218 };
219
220
221 struct {
222 __u64 p_present : 1,
223 p_fpd : 1,
224 p_res0 : 6,
225 p_avail : 4,
226 p_res1 : 2,
227 p_urgent : 1,
228 p_pst : 1,
229 p_vector : 8,
230 p_res2 : 14,
231 pda_l : 26;
232 };
233 __u64 low;
234 };
235
236 union {
237
238 struct {
239 __u64 sid : 16,
240 sq : 2,
241 svt : 2,
242 __res3 : 44;
243 };
244
245
246 struct {
247 __u64 p_sid : 16,
248 p_sq : 2,
249 p_svt : 2,
250 p_res3 : 12,
251 pda_h : 32;
252 };
253 __u64 high;
254 };
255};
256
257static inline void dmar_copy_shared_irte(struct irte *dst, struct irte *src)
258{
259 dst->present = src->present;
260 dst->fpd = src->fpd;
261 dst->avail = src->avail;
262 dst->pst = src->pst;
263 dst->vector = src->vector;
264 dst->sid = src->sid;
265 dst->sq = src->sq;
266 dst->svt = src->svt;
267}
268
269#define PDA_LOW_BIT 26
270#define PDA_HIGH_BIT 32
271
272
273
274
275struct irq_data;
276extern void dmar_msi_unmask(struct irq_data *data);
277extern void dmar_msi_mask(struct irq_data *data);
278extern void dmar_msi_read(int irq, struct msi_msg *msg);
279extern void dmar_msi_write(int irq, struct msi_msg *msg);
280extern int dmar_set_interrupt(struct intel_iommu *iommu);
281extern irqreturn_t dmar_fault(int irq, void *dev_id);
282extern int dmar_alloc_hwirq(int id, int node, void *arg);
283extern void dmar_free_hwirq(int irq);
284
285#endif
286
