LXR linux/include/linux/platform

   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Copyright 2009 Texas Instruments.
   4 */
   5
   6#ifndef __ARCH_ARM_DAVINCI_SPI_H
   7#define __ARCH_ARM_DAVINCI_SPI_H
   8
   9#include <linux/platform_data/edma.h>
  10
  11#define SPI_INTERN_CS   0xFF
  12
  13enum {
  14        SPI_VERSION_1, /* For DM355/DM365/DM6467 */
  15        SPI_VERSION_2, /* For DA8xx */
  16};
  17
  18/**
  19 * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
  20 *
  21 * @version:    version of the SPI IP. Different DaVinci devices have slightly
  22 *              varying versions of the same IP.
  23 * @num_chipselect: number of chipselects supported by this SPI master
  24 * @intr_line:  interrupt line used to connect the SPI IP to the ARM interrupt
  25 *              controller withn the SoC. Possible values are 0 and 1.
  26 * @cshold_bug: set this to true if the SPI controller on your chip requires
  27 *              a write to CSHOLD bit in between transfers (like in DM355).
  28 * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
  29 *              device on the bus.
  30 */
  31struct davinci_spi_platform_data {
  32        u8                      version;
  33        u8                      num_chipselect;
  34        u8                      intr_line;
  35        u8                      prescaler_limit;
  36        bool                    cshold_bug;
  37        enum dma_event_q        dma_event_q;
  38};
  39
  40/**
  41 * davinci_spi_config - Per-chip-select configuration for SPI slave devices
  42 *
  43 * @wdelay:     amount of delay between transmissions. Measured in number of
  44 *              SPI module clocks.
  45 * @odd_parity: polarity of parity flag at the end of transmit data stream.
  46 *              0 - odd parity, 1 - even parity.
  47 * @parity_enable: enable transmission of parity at end of each transmit
  48 *              data stream.
  49 * @io_type:    type of IO transfer. Choose between polled, interrupt and DMA.
  50 * @timer_disable: disable chip-select timers (setup and hold)
  51 * @c2tdelay:   chip-select setup time. Measured in number of SPI module clocks.
  52 * @t2cdelay:   chip-select hold time. Measured in number of SPI module clocks.
  53 * @t2edelay:   transmit data finished to SPI ENAn pin inactive time. Measured
  54 *              in number of SPI clocks.
  55 * @c2edelay:   chip-select active to SPI ENAn signal active time. Measured in
  56 *              number of SPI clocks.
  57 */
  58struct davinci_spi_config {
  59        u8      wdelay;
  60        u8      odd_parity;
  61        u8      parity_enable;
  62#define SPI_IO_TYPE_INTR        0
  63#define SPI_IO_TYPE_POLL        1
  64#define SPI_IO_TYPE_DMA         2
  65        u8      io_type;
  66        u8      timer_disable;
  67        u8      c2tdelay;
  68        u8      t2cdelay;
  69        u8      t2edelay;
  70        u8      c2edelay;
  71};
  72
  73#endif  /* __ARCH_ARM_DAVINCI_SPI_H */
  74