linux/arch/arm/mach-s3c64xx/mach-real6410.c
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   1// SPDX-License-Identifier: GPL-2.0
   2//
   3// Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
   4// Copyright 2008 Openmoko, Inc.
   5// Copyright 2008 Simtec Electronics
   6//      Ben Dooks <ben@simtec.co.uk>
   7//      http://armlinux.simtec.co.uk/
   8
   9#include <linux/init.h>
  10#include <linux/interrupt.h>
  11#include <linux/fb.h>
  12#include <linux/gpio.h>
  13#include <linux/kernel.h>
  14#include <linux/list.h>
  15#include <linux/dm9000.h>
  16#include <linux/mtd/mtd.h>
  17#include <linux/mtd/partitions.h>
  18#include <linux/platform_device.h>
  19#include <linux/serial_core.h>
  20#include <linux/serial_s3c.h>
  21#include <linux/types.h>
  22
  23#include <asm/mach-types.h>
  24#include <asm/mach/arch.h>
  25#include <asm/mach/map.h>
  26
  27#include <mach/map.h>
  28#include <mach/regs-gpio.h>
  29#include <mach/gpio-samsung.h>
  30#include <mach/irqs.h>
  31
  32#include <plat/adc.h>
  33#include <plat/cpu.h>
  34#include <plat/devs.h>
  35#include <plat/fb.h>
  36#include <linux/platform_data/mtd-nand-s3c2410.h>
  37#include <linux/platform_data/touchscreen-s3c2410.h>
  38
  39#include <video/platform_lcd.h>
  40#include <video/samsung_fimd.h>
  41#include <plat/samsung-time.h>
  42
  43#include "common.h"
  44#include "regs-modem.h"
  45#include "regs-srom.h"
  46
  47#define UCON S3C2410_UCON_DEFAULT
  48#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  49#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  50
  51static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
  52        [0] = {
  53                .hwport = 0,
  54                .flags  = 0,
  55                .ucon   = UCON,
  56                .ulcon  = ULCON,
  57                .ufcon  = UFCON,
  58        },
  59        [1] = {
  60                .hwport = 1,
  61                .flags  = 0,
  62                .ucon   = UCON,
  63                .ulcon  = ULCON,
  64                .ufcon  = UFCON,
  65        },
  66        [2] = {
  67                .hwport = 2,
  68                .flags  = 0,
  69                .ucon   = UCON,
  70                .ulcon  = ULCON,
  71                .ufcon  = UFCON,
  72        },
  73        [3] = {
  74                .hwport = 3,
  75                .flags  = 0,
  76                .ucon   = UCON,
  77                .ulcon  = ULCON,
  78                .ufcon  = UFCON,
  79        },
  80};
  81
  82/* DM9000AEP 10/100 ethernet controller */
  83
  84static struct resource real6410_dm9k_resource[] = {
  85        [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2),
  86        [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
  87        [2] = DEFINE_RES_NAMED(S3C_EINT(7), 1, NULL, IORESOURCE_IRQ \
  88                                        | IORESOURCE_IRQ_HIGHLEVEL),
  89};
  90
  91static struct dm9000_plat_data real6410_dm9k_pdata = {
  92        .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
  93};
  94
  95static struct platform_device real6410_device_eth = {
  96        .name           = "dm9000",
  97        .id             = -1,
  98        .num_resources  = ARRAY_SIZE(real6410_dm9k_resource),
  99        .resource       = real6410_dm9k_resource,
 100        .dev            = {
 101                .platform_data  = &real6410_dm9k_pdata,
 102        },
 103};
 104
 105static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = {
 106        .max_bpp        = 32,
 107        .default_bpp    = 16,
 108        .xres           = 480,
 109        .yres           = 272,
 110};
 111
 112static struct fb_videomode real6410_lcd_type0_timing = {
 113        /* 4.3" 480x272 */
 114        .left_margin    = 3,
 115        .right_margin   = 2,
 116        .upper_margin   = 1,
 117        .lower_margin   = 1,
 118        .hsync_len      = 40,
 119        .vsync_len      = 1,
 120};
 121
 122static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = {
 123        .max_bpp        = 32,
 124        .default_bpp    = 16,
 125        .xres           = 800,
 126        .yres           = 480,
 127};
 128
 129static struct fb_videomode real6410_lcd_type1_timing = {
 130        /* 7.0" 800x480 */
 131        .left_margin    = 8,
 132        .right_margin   = 13,
 133        .upper_margin   = 7,
 134        .lower_margin   = 5,
 135        .hsync_len      = 3,
 136        .vsync_len      = 1,
 137        .xres           = 800,
 138        .yres           = 480,
 139};
 140
 141static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = {
 142        {
 143                .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 144                .vtiming        = &real6410_lcd_type0_timing,
 145                .win[0]         = &real6410_lcd_type0_fb_win,
 146                .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 147                .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 148        }, {
 149                .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 150                .vtiming        = &real6410_lcd_type1_timing,
 151                .win[0]         = &real6410_lcd_type1_fb_win,
 152                .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 153                .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 154        },
 155        { },
 156};
 157
 158static struct mtd_partition real6410_nand_part[] = {
 159        [0] = {
 160                .name   = "uboot",
 161                .size   = SZ_1M,
 162                .offset = 0,
 163        },
 164        [1] = {
 165                .name   = "kernel",
 166                .size   = SZ_2M,
 167                .offset = SZ_1M,
 168        },
 169        [2] = {
 170                .name   = "rootfs",
 171                .size   = MTDPART_SIZ_FULL,
 172                .offset = SZ_1M + SZ_2M,
 173        },
 174};
 175
 176static struct s3c2410_nand_set real6410_nand_sets[] = {
 177        [0] = {
 178                .name           = "nand",
 179                .nr_chips       = 1,
 180                .nr_partitions  = ARRAY_SIZE(real6410_nand_part),
 181                .partitions     = real6410_nand_part,
 182        },
 183};
 184
 185static struct s3c2410_platform_nand real6410_nand_info = {
 186        .tacls          = 25,
 187        .twrph0         = 55,
 188        .twrph1         = 40,
 189        .nr_sets        = ARRAY_SIZE(real6410_nand_sets),
 190        .sets           = real6410_nand_sets,
 191        .ecc_mode       = NAND_ECC_SOFT,
 192};
 193
 194static struct platform_device *real6410_devices[] __initdata = {
 195        &real6410_device_eth,
 196        &s3c_device_hsmmc0,
 197        &s3c_device_hsmmc1,
 198        &s3c_device_fb,
 199        &s3c_device_nand,
 200        &s3c_device_adc,
 201        &s3c_device_ohci,
 202};
 203
 204static void __init real6410_map_io(void)
 205{
 206        u32 tmp;
 207
 208        s3c64xx_init_io(NULL, 0);
 209        s3c24xx_init_clocks(12000000);
 210        s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
 211        samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 212
 213        /* set the LCD type */
 214        tmp = __raw_readl(S3C64XX_SPCON);
 215        tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 216        tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 217        __raw_writel(tmp, S3C64XX_SPCON);
 218
 219        /* remove the LCD bypass */
 220        tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 221        tmp &= ~MIFPCON_LCD_BYPASS;
 222        __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 223}
 224
 225/*
 226 * real6410_features string
 227 *
 228 * 0-9 LCD configuration
 229 *
 230 */
 231static char real6410_features_str[12] __initdata = "0";
 232
 233static int __init real6410_features_setup(char *str)
 234{
 235        if (str)
 236                strlcpy(real6410_features_str, str,
 237                        sizeof(real6410_features_str));
 238        return 1;
 239}
 240
 241__setup("real6410=", real6410_features_setup);
 242
 243#define FEATURE_SCREEN (1 << 0)
 244
 245struct real6410_features_t {
 246        int done;
 247        int lcd_index;
 248};
 249
 250static void real6410_parse_features(
 251                struct real6410_features_t *features,
 252                const char *features_str)
 253{
 254        const char *fp = features_str;
 255
 256        features->done = 0;
 257        features->lcd_index = 0;
 258
 259        while (*fp) {
 260                char f = *fp++;
 261
 262                switch (f) {
 263                case '0'...'9': /* tft screen */
 264                        if (features->done & FEATURE_SCREEN) {
 265                                printk(KERN_INFO "REAL6410: '%c' ignored, "
 266                                        "screen type already set\n", f);
 267                        } else {
 268                                int li = f - '0';
 269                                if (li >= ARRAY_SIZE(real6410_lcd_pdata))
 270                                        printk(KERN_INFO "REAL6410: '%c' out "
 271                                                "of range LCD mode\n", f);
 272                                else {
 273                                        features->lcd_index = li;
 274                                }
 275                        }
 276                        features->done |= FEATURE_SCREEN;
 277                        break;
 278                }
 279        }
 280}
 281
 282static void __init real6410_machine_init(void)
 283{
 284        u32 cs1;
 285        struct real6410_features_t features = { 0 };
 286
 287        printk(KERN_INFO "REAL6410: Option string real6410=%s\n",
 288                        real6410_features_str);
 289
 290        /* Parse the feature string */
 291        real6410_parse_features(&features, real6410_features_str);
 292
 293        printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",
 294                real6410_lcd_pdata[features.lcd_index].win[0]->xres,
 295                real6410_lcd_pdata[features.lcd_index].win[0]->yres);
 296
 297        s3c_fb_set_platdata(&real6410_lcd_pdata[features.lcd_index]);
 298        s3c_nand_set_platdata(&real6410_nand_info);
 299        s3c64xx_ts_set_platdata(NULL);
 300
 301        /* configure nCS1 width to 16 bits */
 302
 303        cs1 = __raw_readl(S3C64XX_SROM_BW) &
 304                ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 305        cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 306                (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 307                (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 308                        S3C64XX_SROM_BW__NCS1__SHIFT;
 309        __raw_writel(cs1, S3C64XX_SROM_BW);
 310
 311        /* set timing for nCS1 suitable for ethernet chip */
 312
 313        __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 314                (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 315                (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 316                (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 317                (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
 318                (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 319                (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 320
 321        gpio_request(S3C64XX_GPF(15), "LCD power");
 322
 323        platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
 324}
 325
 326MACHINE_START(REAL6410, "REAL6410")
 327        /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
 328        .atag_offset    = 0x100,
 329        .nr_irqs        = S3C64XX_NR_IRQS,
 330        .init_irq       = s3c6410_init_irq,
 331        .map_io         = real6410_map_io,
 332        .init_machine   = real6410_machine_init,
 333        .init_time      = samsung_timer_init,
 334        .restart        = s3c64xx_restart,
 335MACHINE_END
 336