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5#ifndef _ASM_POWERPC_HW_IRQ_H
6#define _ASM_POWERPC_HW_IRQ_H
7
8#ifdef __KERNEL__
9
10#include <linux/errno.h>
11#include <linux/compiler.h>
12#include <asm/ptrace.h>
13#include <asm/processor.h>
14
15#ifdef CONFIG_PPC64
16
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20
21
22
23
24#define PACA_IRQ_HARD_DIS 0x01
25#define PACA_IRQ_DBELL 0x02
26#define PACA_IRQ_EE 0x04
27#define PACA_IRQ_DEC 0x08
28#define PACA_IRQ_EE_EDGE 0x10
29#define PACA_IRQ_HMI 0x20
30#define PACA_IRQ_PMI 0x40
31
32
33
34
35
36#ifdef CONFIG_PPC_BOOK3S
37#define PACA_IRQ_MUST_HARD_MASK (PACA_IRQ_EE|PACA_IRQ_PMI)
38#else
39#define PACA_IRQ_MUST_HARD_MASK (PACA_IRQ_EE)
40#endif
41
42
43
44
45#define IRQS_ENABLED 0
46#define IRQS_DISABLED 1
47#define IRQS_PMI_DISABLED 2
48#define IRQS_ALL_DISABLED (IRQS_DISABLED | IRQS_PMI_DISABLED)
49
50#endif
51
52#ifndef __ASSEMBLY__
53
54extern void replay_system_reset(void);
55extern void replay_soft_interrupts(void);
56
57extern void timer_interrupt(struct pt_regs *);
58extern void timer_broadcast_interrupt(void);
59extern void performance_monitor_exception(struct pt_regs *regs);
60extern void WatchdogException(struct pt_regs *regs);
61extern void unknown_exception(struct pt_regs *regs);
62
63#ifdef CONFIG_PPC64
64#include <asm/paca.h>
65
66static inline notrace unsigned long irq_soft_mask_return(void)
67{
68 unsigned long flags;
69
70 asm volatile(
71 "lbz %0,%1(13)"
72 : "=r" (flags)
73 : "i" (offsetof(struct paca_struct, irq_soft_mask)));
74
75 return flags;
76}
77
78
79
80
81
82
83static inline notrace void irq_soft_mask_set(unsigned long mask)
84{
85#ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
86
87
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89
90
91
92
93
94
95
96
97
98
99
100 WARN_ON(mask && !(mask & IRQS_DISABLED));
101#endif
102
103 asm volatile(
104 "stb %0,%1(13)"
105 :
106 : "r" (mask),
107 "i" (offsetof(struct paca_struct, irq_soft_mask))
108 : "memory");
109}
110
111static inline notrace unsigned long irq_soft_mask_set_return(unsigned long mask)
112{
113 unsigned long flags;
114
115#ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
116 WARN_ON(mask && !(mask & IRQS_DISABLED));
117#endif
118
119 asm volatile(
120 "lbz %0,%1(13); stb %2,%1(13)"
121 : "=&r" (flags)
122 : "i" (offsetof(struct paca_struct, irq_soft_mask)),
123 "r" (mask)
124 : "memory");
125
126 return flags;
127}
128
129static inline notrace unsigned long irq_soft_mask_or_return(unsigned long mask)
130{
131 unsigned long flags, tmp;
132
133 asm volatile(
134 "lbz %0,%2(13); or %1,%0,%3; stb %1,%2(13)"
135 : "=&r" (flags), "=r" (tmp)
136 : "i" (offsetof(struct paca_struct, irq_soft_mask)),
137 "r" (mask)
138 : "memory");
139
140#ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
141 WARN_ON((mask | flags) && !((mask | flags) & IRQS_DISABLED));
142#endif
143
144 return flags;
145}
146
147static inline unsigned long arch_local_save_flags(void)
148{
149 return irq_soft_mask_return();
150}
151
152static inline void arch_local_irq_disable(void)
153{
154 irq_soft_mask_set(IRQS_DISABLED);
155}
156
157extern void arch_local_irq_restore(unsigned long);
158
159static inline void arch_local_irq_enable(void)
160{
161 arch_local_irq_restore(IRQS_ENABLED);
162}
163
164static inline unsigned long arch_local_irq_save(void)
165{
166 return irq_soft_mask_set_return(IRQS_DISABLED);
167}
168
169static inline bool arch_irqs_disabled_flags(unsigned long flags)
170{
171 return flags & IRQS_DISABLED;
172}
173
174static inline bool arch_irqs_disabled(void)
175{
176 return arch_irqs_disabled_flags(arch_local_save_flags());
177}
178
179#ifdef CONFIG_PPC_BOOK3S
180
181
182
183
184
185
186#define raw_local_irq_pmu_save(flags) \
187 do { \
188 typecheck(unsigned long, flags); \
189 flags = irq_soft_mask_or_return(IRQS_DISABLED | \
190 IRQS_PMI_DISABLED); \
191 } while(0)
192
193#define raw_local_irq_pmu_restore(flags) \
194 do { \
195 typecheck(unsigned long, flags); \
196 arch_local_irq_restore(flags); \
197 } while(0)
198
199#ifdef CONFIG_TRACE_IRQFLAGS
200#define powerpc_local_irq_pmu_save(flags) \
201 do { \
202 raw_local_irq_pmu_save(flags); \
203 trace_hardirqs_off(); \
204 } while(0)
205#define powerpc_local_irq_pmu_restore(flags) \
206 do { \
207 if (raw_irqs_disabled_flags(flags)) { \
208 raw_local_irq_pmu_restore(flags); \
209 trace_hardirqs_off(); \
210 } else { \
211 trace_hardirqs_on(); \
212 raw_local_irq_pmu_restore(flags); \
213 } \
214 } while(0)
215#else
216#define powerpc_local_irq_pmu_save(flags) \
217 do { \
218 raw_local_irq_pmu_save(flags); \
219 } while(0)
220#define powerpc_local_irq_pmu_restore(flags) \
221 do { \
222 raw_local_irq_pmu_restore(flags); \
223 } while (0)
224#endif
225
226#endif
227
228#ifdef CONFIG_PPC_BOOK3E
229#define __hard_irq_enable() wrtee(MSR_EE)
230#define __hard_irq_disable() wrtee(0)
231#define __hard_EE_RI_disable() wrtee(0)
232#define __hard_RI_enable() do { } while (0)
233#else
234#define __hard_irq_enable() __mtmsrd(MSR_EE|MSR_RI, 1)
235#define __hard_irq_disable() __mtmsrd(MSR_RI, 1)
236#define __hard_EE_RI_disable() __mtmsrd(0, 1)
237#define __hard_RI_enable() __mtmsrd(MSR_RI, 1)
238#endif
239
240#define hard_irq_disable() do { \
241 unsigned long flags; \
242 __hard_irq_disable(); \
243 flags = irq_soft_mask_set_return(IRQS_ALL_DISABLED); \
244 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \
245 if (!arch_irqs_disabled_flags(flags)) { \
246 asm ("stdx %%r1, 0, %1 ;" \
247 : "=m" (local_paca->saved_r1) \
248 : "b" (&local_paca->saved_r1)); \
249 trace_hardirqs_off(); \
250 } \
251} while(0)
252
253static inline bool __lazy_irq_pending(u8 irq_happened)
254{
255 return !!(irq_happened & ~PACA_IRQ_HARD_DIS);
256}
257
258
259
260
261static inline bool lazy_irq_pending(void)
262{
263 return __lazy_irq_pending(get_paca()->irq_happened);
264}
265
266
267
268
269
270
271static inline bool lazy_irq_pending_nocheck(void)
272{
273 return __lazy_irq_pending(local_paca->irq_happened);
274}
275
276
277
278
279
280
281
282static inline void may_hard_irq_enable(void)
283{
284 if (!(get_paca()->irq_happened & PACA_IRQ_MUST_HARD_MASK)) {
285 get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS;
286 __hard_irq_enable();
287 }
288}
289
290static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
291{
292 return (regs->softe & IRQS_DISABLED);
293}
294
295extern bool prep_irq_for_idle(void);
296extern bool prep_irq_for_idle_irqsoff(void);
297extern void irq_set_pending_from_srr1(unsigned long srr1);
298
299#define fini_irq_for_idle_irqsoff() trace_hardirqs_off();
300
301extern void force_external_irq_replay(void);
302
303#else
304
305static inline unsigned long arch_local_save_flags(void)
306{
307 return mfmsr();
308}
309
310static inline void arch_local_irq_restore(unsigned long flags)
311{
312 if (IS_ENABLED(CONFIG_BOOKE))
313 wrtee(flags);
314 else
315 mtmsr(flags);
316}
317
318static inline unsigned long arch_local_irq_save(void)
319{
320 unsigned long flags = arch_local_save_flags();
321
322 if (IS_ENABLED(CONFIG_BOOKE))
323 wrtee(0);
324 else if (IS_ENABLED(CONFIG_PPC_8xx))
325 wrtspr(SPRN_EID);
326 else
327 mtmsr(flags & ~MSR_EE);
328
329 return flags;
330}
331
332static inline void arch_local_irq_disable(void)
333{
334 if (IS_ENABLED(CONFIG_BOOKE))
335 wrtee(0);
336 else if (IS_ENABLED(CONFIG_PPC_8xx))
337 wrtspr(SPRN_EID);
338 else
339 mtmsr(mfmsr() & ~MSR_EE);
340}
341
342static inline void arch_local_irq_enable(void)
343{
344 if (IS_ENABLED(CONFIG_BOOKE))
345 wrtee(MSR_EE);
346 else if (IS_ENABLED(CONFIG_PPC_8xx))
347 wrtspr(SPRN_EIE);
348 else
349 mtmsr(mfmsr() | MSR_EE);
350}
351
352static inline bool arch_irqs_disabled_flags(unsigned long flags)
353{
354 return (flags & MSR_EE) == 0;
355}
356
357static inline bool arch_irqs_disabled(void)
358{
359 return arch_irqs_disabled_flags(arch_local_save_flags());
360}
361
362#define hard_irq_disable() arch_local_irq_disable()
363
364static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
365{
366 return !(regs->msr & MSR_EE);
367}
368
369static inline void may_hard_irq_enable(void) { }
370
371#endif
372
373#define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST
374
375
376
377
378
379struct irq_chip;
380
381#endif
382#endif
383#endif
384