linux/arch/x86/pci/xen.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
   4 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
   5 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
   6 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
   7 * 0xcf8 PCI configuration read/write.
   8 *
   9 *   Author: Ryan Wilson <hap9@epoch.ncsc.mil>
  10 *           Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
  11 *           Stefano Stabellini <stefano.stabellini@eu.citrix.com>
  12 */
  13#include <linux/export.h>
  14#include <linux/init.h>
  15#include <linux/pci.h>
  16#include <linux/acpi.h>
  17
  18#include <linux/io.h>
  19#include <asm/io_apic.h>
  20#include <asm/pci_x86.h>
  21
  22#include <asm/xen/hypervisor.h>
  23
  24#include <xen/features.h>
  25#include <xen/events.h>
  26#include <asm/xen/pci.h>
  27#include <asm/xen/cpuid.h>
  28#include <asm/apic.h>
  29#include <asm/i8259.h>
  30
  31static int xen_pcifront_enable_irq(struct pci_dev *dev)
  32{
  33        int rc;
  34        int share = 1;
  35        int pirq;
  36        u8 gsi;
  37
  38        rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
  39        if (rc < 0) {
  40                dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
  41                         rc);
  42                return rc;
  43        }
  44        /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
  45        pirq = gsi;
  46
  47        if (gsi < nr_legacy_irqs())
  48                share = 0;
  49
  50        rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
  51        if (rc < 0) {
  52                dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
  53                         gsi, pirq, rc);
  54                return rc;
  55        }
  56
  57        dev->irq = rc;
  58        dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
  59        return 0;
  60}
  61
  62#ifdef CONFIG_ACPI
  63static int xen_register_pirq(u32 gsi, int triggering, bool set_pirq)
  64{
  65        int rc, pirq = -1, irq = -1;
  66        struct physdev_map_pirq map_irq;
  67        int shareable = 0;
  68        char *name;
  69
  70        irq = xen_irq_from_gsi(gsi);
  71        if (irq > 0)
  72                return irq;
  73
  74        if (set_pirq)
  75                pirq = gsi;
  76
  77        map_irq.domid = DOMID_SELF;
  78        map_irq.type = MAP_PIRQ_TYPE_GSI;
  79        map_irq.index = gsi;
  80        map_irq.pirq = pirq;
  81
  82        rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  83        if (rc) {
  84                printk(KERN_WARNING "xen map irq failed %d\n", rc);
  85                return -1;
  86        }
  87
  88        if (triggering == ACPI_EDGE_SENSITIVE) {
  89                shareable = 0;
  90                name = "ioapic-edge";
  91        } else {
  92                shareable = 1;
  93                name = "ioapic-level";
  94        }
  95
  96        irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
  97        if (irq < 0)
  98                goto out;
  99
 100        printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
 101out:
 102        return irq;
 103}
 104
 105static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
 106                                     int trigger, int polarity)
 107{
 108        if (!xen_hvm_domain())
 109                return -1;
 110
 111        return xen_register_pirq(gsi, trigger,
 112                                 false /* no mapping of GSI to PIRQ */);
 113}
 114
 115#ifdef CONFIG_XEN_DOM0
 116static int xen_register_gsi(u32 gsi, int triggering, int polarity)
 117{
 118        int rc, irq;
 119        struct physdev_setup_gsi setup_gsi;
 120
 121        if (!xen_pv_domain())
 122                return -1;
 123
 124        printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
 125                        gsi, triggering, polarity);
 126
 127        irq = xen_register_pirq(gsi, triggering, true);
 128
 129        setup_gsi.gsi = gsi;
 130        setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
 131        setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
 132
 133        rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
 134        if (rc == -EEXIST)
 135                printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
 136        else if (rc) {
 137                printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
 138                                gsi, rc);
 139        }
 140
 141        return irq;
 142}
 143
 144static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
 145                                 int trigger, int polarity)
 146{
 147        return xen_register_gsi(gsi, trigger, polarity);
 148}
 149#endif
 150#endif
 151
 152#if defined(CONFIG_PCI_MSI)
 153#include <linux/msi.h>
 154#include <asm/msidef.h>
 155
 156struct xen_pci_frontend_ops *xen_pci_frontend;
 157EXPORT_SYMBOL_GPL(xen_pci_frontend);
 158
 159static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 160{
 161        int irq, ret, i;
 162        struct msi_desc *msidesc;
 163        int *v;
 164
 165        if (type == PCI_CAP_ID_MSI && nvec > 1)
 166                return 1;
 167
 168        v = kcalloc(max(1, nvec), sizeof(int), GFP_KERNEL);
 169        if (!v)
 170                return -ENOMEM;
 171
 172        if (type == PCI_CAP_ID_MSIX)
 173                ret = xen_pci_frontend_enable_msix(dev, v, nvec);
 174        else
 175                ret = xen_pci_frontend_enable_msi(dev, v);
 176        if (ret)
 177                goto error;
 178        i = 0;
 179        for_each_pci_msi_entry(msidesc, dev) {
 180                irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
 181                                               (type == PCI_CAP_ID_MSI) ? nvec : 1,
 182                                               (type == PCI_CAP_ID_MSIX) ?
 183                                               "pcifront-msi-x" :
 184                                               "pcifront-msi",
 185                                                DOMID_SELF);
 186                if (irq < 0) {
 187                        ret = irq;
 188                        goto free;
 189                }
 190                i++;
 191        }
 192        kfree(v);
 193        return 0;
 194
 195error:
 196        if (ret == -ENOSYS)
 197                dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
 198        else if (ret)
 199                dev_err(&dev->dev, "Xen PCI frontend error: %d!\n", ret);
 200free:
 201        kfree(v);
 202        return ret;
 203}
 204
 205#define XEN_PIRQ_MSI_DATA  (MSI_DATA_TRIGGER_EDGE | \
 206                MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
 207
 208static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
 209                struct msi_msg *msg)
 210{
 211        /* We set vector == 0 to tell the hypervisor we don't care about it,
 212         * but we want a pirq setup instead.
 213         * We use the dest_id field to pass the pirq that we want. */
 214        msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
 215        msg->address_lo =
 216                MSI_ADDR_BASE_LO |
 217                MSI_ADDR_DEST_MODE_PHYSICAL |
 218                MSI_ADDR_REDIRECTION_CPU |
 219                MSI_ADDR_DEST_ID(pirq);
 220
 221        msg->data = XEN_PIRQ_MSI_DATA;
 222}
 223
 224static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 225{
 226        int irq, pirq;
 227        struct msi_desc *msidesc;
 228        struct msi_msg msg;
 229
 230        if (type == PCI_CAP_ID_MSI && nvec > 1)
 231                return 1;
 232
 233        for_each_pci_msi_entry(msidesc, dev) {
 234                pirq = xen_allocate_pirq_msi(dev, msidesc);
 235                if (pirq < 0) {
 236                        irq = -ENODEV;
 237                        goto error;
 238                }
 239                xen_msi_compose_msg(dev, pirq, &msg);
 240                __pci_write_msi_msg(msidesc, &msg);
 241                dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
 242                irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
 243                                               (type == PCI_CAP_ID_MSI) ? nvec : 1,
 244                                               (type == PCI_CAP_ID_MSIX) ?
 245                                               "msi-x" : "msi",
 246                                               DOMID_SELF);
 247                if (irq < 0)
 248                        goto error;
 249                dev_dbg(&dev->dev,
 250                        "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
 251        }
 252        return 0;
 253
 254error:
 255        dev_err(&dev->dev, "Failed to create MSI%s! ret=%d!\n",
 256                type == PCI_CAP_ID_MSI ? "" : "-X", irq);
 257        return irq;
 258}
 259
 260#ifdef CONFIG_XEN_DOM0
 261static bool __read_mostly pci_seg_supported = true;
 262
 263static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
 264{
 265        int ret = 0;
 266        struct msi_desc *msidesc;
 267
 268        for_each_pci_msi_entry(msidesc, dev) {
 269                struct physdev_map_pirq map_irq;
 270                domid_t domid;
 271
 272                domid = ret = xen_find_device_domain_owner(dev);
 273                /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
 274                 * hence check ret value for < 0. */
 275                if (ret < 0)
 276                        domid = DOMID_SELF;
 277
 278                memset(&map_irq, 0, sizeof(map_irq));
 279                map_irq.domid = domid;
 280                map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
 281                map_irq.index = -1;
 282                map_irq.pirq = -1;
 283                map_irq.bus = dev->bus->number |
 284                              (pci_domain_nr(dev->bus) << 16);
 285                map_irq.devfn = dev->devfn;
 286
 287                if (type == PCI_CAP_ID_MSI && nvec > 1) {
 288                        map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
 289                        map_irq.entry_nr = nvec;
 290                } else if (type == PCI_CAP_ID_MSIX) {
 291                        int pos;
 292                        unsigned long flags;
 293                        u32 table_offset, bir;
 294
 295                        pos = dev->msix_cap;
 296                        pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
 297                                              &table_offset);
 298                        bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
 299                        flags = pci_resource_flags(dev, bir);
 300                        if (!flags || (flags & IORESOURCE_UNSET))
 301                                return -EINVAL;
 302
 303                        map_irq.table_base = pci_resource_start(dev, bir);
 304                        map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
 305                }
 306
 307                ret = -EINVAL;
 308                if (pci_seg_supported)
 309                        ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
 310                                                    &map_irq);
 311                if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
 312                        /*
 313                         * If MAP_PIRQ_TYPE_MULTI_MSI is not available
 314                         * there's nothing else we can do in this case.
 315                         * Just set ret > 0 so driver can retry with
 316                         * single MSI.
 317                         */
 318                        ret = 1;
 319                        goto out;
 320                }
 321                if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
 322                        map_irq.type = MAP_PIRQ_TYPE_MSI;
 323                        map_irq.index = -1;
 324                        map_irq.pirq = -1;
 325                        map_irq.bus = dev->bus->number;
 326                        ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
 327                                                    &map_irq);
 328                        if (ret != -EINVAL)
 329                                pci_seg_supported = false;
 330                }
 331                if (ret) {
 332                        dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
 333                                 ret, domid);
 334                        goto out;
 335                }
 336
 337                ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
 338                                               (type == PCI_CAP_ID_MSI) ? nvec : 1,
 339                                               (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
 340                                               domid);
 341                if (ret < 0)
 342                        goto out;
 343        }
 344        ret = 0;
 345out:
 346        return ret;
 347}
 348
 349static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
 350{
 351        int ret = 0;
 352
 353        if (pci_seg_supported) {
 354                struct physdev_pci_device restore_ext;
 355
 356                restore_ext.seg = pci_domain_nr(dev->bus);
 357                restore_ext.bus = dev->bus->number;
 358                restore_ext.devfn = dev->devfn;
 359                ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
 360                                        &restore_ext);
 361                if (ret == -ENOSYS)
 362                        pci_seg_supported = false;
 363                WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
 364        }
 365        if (!pci_seg_supported) {
 366                struct physdev_restore_msi restore;
 367
 368                restore.bus = dev->bus->number;
 369                restore.devfn = dev->devfn;
 370                ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
 371                WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
 372        }
 373}
 374#endif
 375
 376static void xen_teardown_msi_irqs(struct pci_dev *dev)
 377{
 378        struct msi_desc *msidesc;
 379
 380        msidesc = first_pci_msi_entry(dev);
 381        if (msidesc->msi_attrib.is_msix)
 382                xen_pci_frontend_disable_msix(dev);
 383        else
 384                xen_pci_frontend_disable_msi(dev);
 385
 386        /* Free the IRQ's and the msidesc using the generic code. */
 387        default_teardown_msi_irqs(dev);
 388}
 389
 390static void xen_teardown_msi_irq(unsigned int irq)
 391{
 392        xen_destroy_irq(irq);
 393}
 394
 395#endif
 396
 397int __init pci_xen_init(void)
 398{
 399        if (!xen_pv_domain() || xen_initial_domain())
 400                return -ENODEV;
 401
 402        printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
 403
 404        pcibios_set_cache_line_size();
 405
 406        pcibios_enable_irq = xen_pcifront_enable_irq;
 407        pcibios_disable_irq = NULL;
 408
 409        /* Keep ACPI out of the picture */
 410        acpi_noirq_set();
 411
 412#ifdef CONFIG_PCI_MSI
 413        x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
 414        x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
 415        x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
 416        pci_msi_ignore_mask = 1;
 417#endif
 418        return 0;
 419}
 420
 421#ifdef CONFIG_PCI_MSI
 422void __init xen_msi_init(void)
 423{
 424        if (!disable_apic) {
 425                /*
 426                 * If hardware supports (x2)APIC virtualization (as indicated
 427                 * by hypervisor's leaf 4) then we don't need to use pirqs/
 428                 * event channels for MSI handling and instead use regular
 429                 * APIC processing
 430                 */
 431                uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
 432
 433                if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) ||
 434                    ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && boot_cpu_has(X86_FEATURE_APIC)))
 435                        return;
 436        }
 437
 438        x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
 439        x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
 440}
 441#endif
 442
 443int __init pci_xen_hvm_init(void)
 444{
 445        if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
 446                return 0;
 447
 448#ifdef CONFIG_ACPI
 449        /*
 450         * We don't want to change the actual ACPI delivery model,
 451         * just how GSIs get registered.
 452         */
 453        __acpi_register_gsi = acpi_register_gsi_xen_hvm;
 454        __acpi_unregister_gsi = NULL;
 455#endif
 456
 457#ifdef CONFIG_PCI_MSI
 458        /*
 459         * We need to wait until after x2apic is initialized
 460         * before we can set MSI IRQ ops.
 461         */
 462        x86_platform.apic_post_init = xen_msi_init;
 463#endif
 464        return 0;
 465}
 466
 467#ifdef CONFIG_XEN_DOM0
 468int __init pci_xen_initial_domain(void)
 469{
 470        int irq;
 471
 472#ifdef CONFIG_PCI_MSI
 473        x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
 474        x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
 475        x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
 476        pci_msi_ignore_mask = 1;
 477#endif
 478        __acpi_register_gsi = acpi_register_gsi_xen;
 479        __acpi_unregister_gsi = NULL;
 480        /*
 481         * Pre-allocate the legacy IRQs.  Use NR_LEGACY_IRQS here
 482         * because we don't have a PIC and thus nr_legacy_irqs() is zero.
 483         */
 484        for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
 485                int trigger, polarity;
 486
 487                if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
 488                        continue;
 489
 490                xen_register_pirq(irq,
 491                        trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
 492                        true /* Map GSI to PIRQ */);
 493        }
 494        if (0 == nr_ioapics) {
 495                for (irq = 0; irq < nr_legacy_irqs(); irq++)
 496                        xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
 497        }
 498        return 0;
 499}
 500
 501struct xen_device_domain_owner {
 502        domid_t domain;
 503        struct pci_dev *dev;
 504        struct list_head list;
 505};
 506
 507static DEFINE_SPINLOCK(dev_domain_list_spinlock);
 508static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
 509
 510static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
 511{
 512        struct xen_device_domain_owner *owner;
 513
 514        list_for_each_entry(owner, &dev_domain_list, list) {
 515                if (owner->dev == dev)
 516                        return owner;
 517        }
 518        return NULL;
 519}
 520
 521int xen_find_device_domain_owner(struct pci_dev *dev)
 522{
 523        struct xen_device_domain_owner *owner;
 524        int domain = -ENODEV;
 525
 526        spin_lock(&dev_domain_list_spinlock);
 527        owner = find_device(dev);
 528        if (owner)
 529                domain = owner->domain;
 530        spin_unlock(&dev_domain_list_spinlock);
 531        return domain;
 532}
 533EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
 534
 535int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
 536{
 537        struct xen_device_domain_owner *owner;
 538
 539        owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
 540        if (!owner)
 541                return -ENODEV;
 542
 543        spin_lock(&dev_domain_list_spinlock);
 544        if (find_device(dev)) {
 545                spin_unlock(&dev_domain_list_spinlock);
 546                kfree(owner);
 547                return -EEXIST;
 548        }
 549        owner->domain = domain;
 550        owner->dev = dev;
 551        list_add_tail(&owner->list, &dev_domain_list);
 552        spin_unlock(&dev_domain_list_spinlock);
 553        return 0;
 554}
 555EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
 556
 557int xen_unregister_device_domain_owner(struct pci_dev *dev)
 558{
 559        struct xen_device_domain_owner *owner;
 560
 561        spin_lock(&dev_domain_list_spinlock);
 562        owner = find_device(dev);
 563        if (!owner) {
 564                spin_unlock(&dev_domain_list_spinlock);
 565                return -ENODEV;
 566        }
 567        list_del(&owner->list);
 568        spin_unlock(&dev_domain_list_spinlock);
 569        kfree(owner);
 570        return 0;
 571}
 572EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
 573#endif
 574