linux/drivers/block/mtip32xx/mtip32xx.h
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   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * mtip32xx.h - Header file for the P320 SSD Block Driver
   4 *   Copyright (C) 2011 Micron Technology, Inc.
   5 *
   6 * Portions of this code were derived from works subjected to the
   7 * following copyright:
   8 *    Copyright (C) 2009 Integrated Device Technology, Inc.
   9 */
  10
  11#ifndef __MTIP32XX_H__
  12#define __MTIP32XX_H__
  13
  14#include <linux/spinlock.h>
  15#include <linux/rwsem.h>
  16#include <linux/ata.h>
  17#include <linux/interrupt.h>
  18#include <linux/genhd.h>
  19
  20/* Offset of Subsystem Device ID in pci confoguration space */
  21#define PCI_SUBSYSTEM_DEVICEID  0x2E
  22
  23/* offset of Device Control register in PCIe extended capabilites space */
  24#define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET   0x48
  25
  26/* check for erase mode support during secure erase */
  27#define MTIP_SEC_ERASE_MODE     0x2
  28
  29/* # of times to retry timed out/failed IOs */
  30#define MTIP_MAX_RETRIES        2
  31
  32/* Various timeout values in ms */
  33#define MTIP_NCQ_CMD_TIMEOUT_MS      15000
  34#define MTIP_IOCTL_CMD_TIMEOUT_MS    5000
  35#define MTIP_INT_CMD_TIMEOUT_MS      5000
  36#define MTIP_QUIESCE_IO_TIMEOUT_MS   (MTIP_NCQ_CMD_TIMEOUT_MS * \
  37                                     (MTIP_MAX_RETRIES + 1))
  38
  39/* check for timeouts every 500ms */
  40#define MTIP_TIMEOUT_CHECK_PERIOD       500
  41
  42/* ftl rebuild */
  43#define MTIP_FTL_REBUILD_OFFSET         142
  44#define MTIP_FTL_REBUILD_MAGIC          0xED51
  45#define MTIP_FTL_REBUILD_TIMEOUT_MS     2400000
  46
  47/* unaligned IO handling */
  48#define MTIP_MAX_UNALIGNED_SLOTS        2
  49
  50/* Macro to extract the tag bit number from a tag value. */
  51#define MTIP_TAG_BIT(tag)       (tag & 0x1F)
  52
  53/*
  54 * Macro to extract the tag index from a tag value. The index
  55 * is used to access the correct s_active/Command Issue register based
  56 * on the tag value.
  57 */
  58#define MTIP_TAG_INDEX(tag)     (tag >> 5)
  59
  60/*
  61 * Maximum number of scatter gather entries
  62 * a single command may have.
  63 */
  64#define MTIP_MAX_SG             504
  65
  66/*
  67 * Maximum number of slot groups (Command Issue & s_active registers)
  68 * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
  69 */
  70#define MTIP_MAX_SLOT_GROUPS    8
  71
  72/* Internal command tag. */
  73#define MTIP_TAG_INTERNAL       0
  74
  75/* Micron Vendor ID & P320x SSD Device ID */
  76#define PCI_VENDOR_ID_MICRON    0x1344
  77#define P320H_DEVICE_ID         0x5150
  78#define P320M_DEVICE_ID         0x5151
  79#define P320S_DEVICE_ID         0x5152
  80#define P325M_DEVICE_ID         0x5153
  81#define P420H_DEVICE_ID         0x5160
  82#define P420M_DEVICE_ID         0x5161
  83#define P425M_DEVICE_ID         0x5163
  84
  85/* Driver name and version strings */
  86#define MTIP_DRV_NAME           "mtip32xx"
  87#define MTIP_DRV_VERSION        "1.3.1"
  88
  89/* Maximum number of minor device numbers per device. */
  90#define MTIP_MAX_MINORS         16
  91
  92/* Maximum number of supported command slots. */
  93#define MTIP_MAX_COMMAND_SLOTS  (MTIP_MAX_SLOT_GROUPS * 32)
  94
  95/*
  96 * Per-tag bitfield size in longs.
  97 * Linux bit manipulation functions
  98 * (i.e. test_and_set_bit, find_next_zero_bit)
  99 * manipulate memory in longs, so we try to make the math work.
 100 * take the slot groups and find the number of longs, rounding up.
 101 * Careful! i386 and x86_64 use different size longs!
 102 */
 103#define U32_PER_LONG    (sizeof(long) / sizeof(u32))
 104#define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
 105                                        (U32_PER_LONG-1))/U32_PER_LONG)
 106
 107/* BAR number used to access the HBA registers. */
 108#define MTIP_ABAR               5
 109
 110#ifdef DEBUG
 111 #define dbg_printk(format, arg...)     \
 112        printk(pr_fmt(format), ##arg);
 113#else
 114 #define dbg_printk(format, arg...)
 115#endif
 116
 117#define MTIP_DFS_MAX_BUF_SIZE 1024
 118
 119enum {
 120        /* below are bit numbers in 'flags' defined in mtip_port */
 121        MTIP_PF_IC_ACTIVE_BIT       = 0, /* pio/ioctl */
 122        MTIP_PF_EH_ACTIVE_BIT       = 1, /* error handling */
 123        MTIP_PF_SE_ACTIVE_BIT       = 2, /* secure erase */
 124        MTIP_PF_DM_ACTIVE_BIT       = 3, /* download microcde */
 125        MTIP_PF_TO_ACTIVE_BIT       = 9, /* timeout handling */
 126        MTIP_PF_PAUSE_IO      = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
 127                                (1 << MTIP_PF_EH_ACTIVE_BIT) |
 128                                (1 << MTIP_PF_SE_ACTIVE_BIT) |
 129                                (1 << MTIP_PF_DM_ACTIVE_BIT) |
 130                                (1 << MTIP_PF_TO_ACTIVE_BIT)),
 131        MTIP_PF_HOST_CAP_64         = 10, /* cache HOST_CAP_64 */
 132
 133        MTIP_PF_SVC_THD_ACTIVE_BIT  = 4,
 134        MTIP_PF_ISSUE_CMDS_BIT      = 5,
 135        MTIP_PF_REBUILD_BIT         = 6,
 136        MTIP_PF_SVC_THD_STOP_BIT    = 8,
 137
 138        MTIP_PF_SVC_THD_WORK    = ((1 << MTIP_PF_EH_ACTIVE_BIT) |
 139                                  (1 << MTIP_PF_ISSUE_CMDS_BIT) |
 140                                  (1 << MTIP_PF_REBUILD_BIT) |
 141                                  (1 << MTIP_PF_SVC_THD_STOP_BIT) |
 142                                  (1 << MTIP_PF_TO_ACTIVE_BIT)),
 143
 144        /* below are bit numbers in 'dd_flag' defined in driver_data */
 145        MTIP_DDF_SEC_LOCK_BIT       = 0,
 146        MTIP_DDF_REMOVE_PENDING_BIT = 1,
 147        MTIP_DDF_OVER_TEMP_BIT      = 2,
 148        MTIP_DDF_WRITE_PROTECT_BIT  = 3,
 149        MTIP_DDF_CLEANUP_BIT        = 5,
 150        MTIP_DDF_RESUME_BIT         = 6,
 151        MTIP_DDF_INIT_DONE_BIT      = 7,
 152        MTIP_DDF_REBUILD_FAILED_BIT = 8,
 153        MTIP_DDF_REMOVAL_BIT        = 9,
 154
 155        MTIP_DDF_STOP_IO      = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
 156                                (1 << MTIP_DDF_SEC_LOCK_BIT) |
 157                                (1 << MTIP_DDF_OVER_TEMP_BIT) |
 158                                (1 << MTIP_DDF_WRITE_PROTECT_BIT) |
 159                                (1 << MTIP_DDF_REBUILD_FAILED_BIT)),
 160
 161};
 162
 163struct smart_attr {
 164        u8 attr_id;
 165        __le16 flags;
 166        u8 cur;
 167        u8 worst;
 168        __le32 data;
 169        u8 res[3];
 170} __packed;
 171
 172struct mtip_work {
 173        struct work_struct work;
 174        void *port;
 175        int cpu_binding;
 176        u32 completed;
 177} ____cacheline_aligned_in_smp;
 178
 179#define DEFINE_HANDLER(group)                                  \
 180        void mtip_workq_sdbf##group(struct work_struct *work)       \
 181        {                                                      \
 182                struct mtip_work *w = (struct mtip_work *) work;         \
 183                mtip_workq_sdbfx(w->port, group, w->completed);     \
 184        }
 185
 186/* Register Frame Information Structure (FIS), host to device. */
 187struct host_to_dev_fis {
 188        /*
 189         * FIS type.
 190         * - 27h Register FIS, host to device.
 191         * - 34h Register FIS, device to host.
 192         * - 39h DMA Activate FIS, device to host.
 193         * - 41h DMA Setup FIS, bi-directional.
 194         * - 46h Data FIS, bi-directional.
 195         * - 58h BIST Activate FIS, bi-directional.
 196         * - 5Fh PIO Setup FIS, device to host.
 197         * - A1h Set Device Bits FIS, device to host.
 198         */
 199        unsigned char type;
 200        unsigned char opts;
 201        unsigned char command;
 202        unsigned char features;
 203
 204        union {
 205                unsigned char lba_low;
 206                unsigned char sector;
 207        };
 208        union {
 209                unsigned char lba_mid;
 210                unsigned char cyl_low;
 211        };
 212        union {
 213                unsigned char lba_hi;
 214                unsigned char cyl_hi;
 215        };
 216        union {
 217                unsigned char device;
 218                unsigned char head;
 219        };
 220
 221        union {
 222                unsigned char lba_low_ex;
 223                unsigned char sector_ex;
 224        };
 225        union {
 226                unsigned char lba_mid_ex;
 227                unsigned char cyl_low_ex;
 228        };
 229        union {
 230                unsigned char lba_hi_ex;
 231                unsigned char cyl_hi_ex;
 232        };
 233        unsigned char features_ex;
 234
 235        unsigned char sect_count;
 236        unsigned char sect_cnt_ex;
 237        unsigned char res2;
 238        unsigned char control;
 239
 240        unsigned int res3;
 241};
 242
 243/* Command header structure. */
 244struct mtip_cmd_hdr {
 245        /*
 246         * Command options.
 247         * - Bits 31:16 Number of PRD entries.
 248         * - Bits 15:8 Unused in this implementation.
 249         * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
 250         * - Bit 6 Write bit, should be set when writing data to the device.
 251         * - Bit 5 Unused in this implementation.
 252         * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
 253         */
 254        __le32 opts;
 255        /* This field is unsed when using NCQ. */
 256        union {
 257                __le32 byte_count;
 258                __le32 status;
 259        };
 260        /*
 261         * Lower 32 bits of the command table address associated with this
 262         * header. The command table addresses must be 128 byte aligned.
 263         */
 264        __le32 ctba;
 265        /*
 266         * If 64 bit addressing is used this field is the upper 32 bits
 267         * of the command table address associated with this command.
 268         */
 269        __le32 ctbau;
 270        /* Reserved and unused. */
 271        u32 res[4];
 272};
 273
 274/* Command scatter gather structure (PRD). */
 275struct mtip_cmd_sg {
 276        /*
 277         * Low 32 bits of the data buffer address. For P320 this
 278         * address must be 8 byte aligned signified by bits 2:0 being
 279         * set to 0.
 280         */
 281        __le32 dba;
 282        /*
 283         * When 64 bit addressing is used this field is the upper
 284         * 32 bits of the data buffer address.
 285         */
 286        __le32 dba_upper;
 287        /* Unused. */
 288        __le32 reserved;
 289        /*
 290         * Bit 31: interrupt when this data block has been transferred.
 291         * Bits 30..22: reserved
 292         * Bits 21..0: byte count (minus 1).  For P320 the byte count must be
 293         * 8 byte aligned signified by bits 2:0 being set to 1.
 294         */
 295        __le32 info;
 296};
 297struct mtip_port;
 298
 299struct mtip_int_cmd;
 300
 301/* Structure used to describe a command. */
 302struct mtip_cmd {
 303        void *command; /* ptr to command table entry */
 304
 305        dma_addr_t command_dma; /* corresponding physical address */
 306
 307        int scatter_ents; /* Number of scatter list entries used */
 308
 309        int unaligned; /* command is unaligned on 4k boundary */
 310
 311        union {
 312                struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
 313                struct mtip_int_cmd *icmd;
 314        };
 315
 316        int retries; /* The number of retries left for this command. */
 317
 318        int direction; /* Data transfer direction */
 319        blk_status_t status;
 320};
 321
 322/* Structure used to describe a port. */
 323struct mtip_port {
 324        /* Pointer back to the driver data for this port. */
 325        struct driver_data *dd;
 326        /*
 327         * Used to determine if the data pointed to by the
 328         * identify field is valid.
 329         */
 330        unsigned long identify_valid;
 331        /* Base address of the memory mapped IO for the port. */
 332        void __iomem *mmio;
 333        /* Array of pointers to the memory mapped s_active registers. */
 334        void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
 335        /* Array of pointers to the memory mapped completed registers. */
 336        void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
 337        /* Array of pointers to the memory mapped Command Issue registers. */
 338        void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
 339        /*
 340         * Pointer to the beginning of the command header memory as used
 341         * by the driver.
 342         */
 343        void *command_list;
 344        /*
 345         * Pointer to the beginning of the command header memory as used
 346         * by the DMA.
 347         */
 348        dma_addr_t command_list_dma;
 349        /*
 350         * Pointer to the beginning of the RX FIS memory as used
 351         * by the driver.
 352         */
 353        void *rxfis;
 354        /*
 355         * Pointer to the beginning of the RX FIS memory as used
 356         * by the DMA.
 357         */
 358        dma_addr_t rxfis_dma;
 359        /*
 360         * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
 361         */
 362        void *block1;
 363        /*
 364         * DMA address of region for RX Fis, Identify, RLE10, and SMART
 365         */
 366        dma_addr_t block1_dma;
 367        /*
 368         * Pointer to the beginning of the identify data memory as used
 369         * by the driver.
 370         */
 371        u16 *identify;
 372        /*
 373         * Pointer to the beginning of the identify data memory as used
 374         * by the DMA.
 375         */
 376        dma_addr_t identify_dma;
 377        /*
 378         * Pointer to the beginning of a sector buffer that is used
 379         * by the driver when issuing internal commands.
 380         */
 381        u16 *sector_buffer;
 382        /*
 383         * Pointer to the beginning of a sector buffer that is used
 384         * by the DMA when the driver issues internal commands.
 385         */
 386        dma_addr_t sector_buffer_dma;
 387
 388        u16 *log_buf;
 389        dma_addr_t log_buf_dma;
 390
 391        u8 *smart_buf;
 392        dma_addr_t smart_buf_dma;
 393
 394        /*
 395         * used to queue commands when an internal command is in progress
 396         * or error handling is active
 397         */
 398        unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
 399        /* Used by mtip_service_thread to wait for an event */
 400        wait_queue_head_t svc_wait;
 401        /*
 402         * indicates the state of the port. Also, helps the service thread
 403         * to determine its action on wake up.
 404         */
 405        unsigned long flags;
 406        /*
 407         * Timer used to complete commands that have been active for too long.
 408         */
 409        unsigned long ic_pause_timer;
 410
 411        /* Counter to control queue depth of unaligned IOs */
 412        atomic_t cmd_slot_unal;
 413
 414        /* Spinlock for working around command-issue bug. */
 415        spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
 416};
 417
 418/*
 419 * Driver private data structure.
 420 *
 421 * One structure is allocated per probed device.
 422 */
 423struct driver_data {
 424        void __iomem *mmio; /* Base address of the HBA registers. */
 425
 426        int major; /* Major device number. */
 427
 428        int instance; /* Instance number. First device probed is 0, ... */
 429
 430        struct gendisk *disk; /* Pointer to our gendisk structure. */
 431
 432        struct pci_dev *pdev; /* Pointer to the PCI device structure. */
 433
 434        struct request_queue *queue; /* Our request queue. */
 435
 436        struct blk_mq_tag_set tags; /* blk_mq tags */
 437
 438        struct mtip_port *port; /* Pointer to the port data structure. */
 439
 440        unsigned product_type; /* magic value declaring the product type */
 441
 442        unsigned slot_groups; /* number of slot groups the product supports */
 443
 444        unsigned long index; /* Index to determine the disk name */
 445
 446        unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
 447
 448        struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
 449
 450        struct dentry *dfs_node;
 451
 452        bool sr;
 453
 454        int numa_node; /* NUMA support */
 455
 456        char workq_name[32];
 457
 458        struct workqueue_struct *isr_workq;
 459
 460        atomic_t irq_workers_active;
 461
 462        struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
 463
 464        int isr_binding;
 465
 466        struct block_device *bdev;
 467
 468        struct list_head online_list; /* linkage for online list */
 469
 470        struct list_head remove_list; /* linkage for removing list */
 471
 472        int unal_qdepth; /* qdepth of unaligned IO queue */
 473};
 474
 475#endif
 476