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26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/slab.h>
29#include <linux/init.h>
30#include <linux/fs.h>
31#include <linux/delay.h>
32#include <linux/bitrev.h>
33#include <linux/mutex.h>
34#include <linux/uaccess.h>
35#include <linux/io.h>
36
37#include <pcmcia/cistpl.h>
38#include <pcmcia/cisreg.h>
39#include <pcmcia/ciscode.h>
40#include <pcmcia/ds.h>
41
42#include <linux/cm4000_cs.h>
43
44
45
46#define reader_to_dev(x) (&x->p_dev->dev)
47
48
49
50
51
52#define DEBUGP(n, rdr, x, args...) do { \
53 dev_dbg(reader_to_dev(rdr), "%s:" x, \
54 __func__ , ## args); \
55 } while (0)
56
57static DEFINE_MUTEX(cmm_mutex);
58
59#define T_1SEC (HZ)
60#define T_10MSEC msecs_to_jiffies(10)
61#define T_20MSEC msecs_to_jiffies(20)
62#define T_40MSEC msecs_to_jiffies(40)
63#define T_50MSEC msecs_to_jiffies(50)
64#define T_100MSEC msecs_to_jiffies(100)
65#define T_500MSEC msecs_to_jiffies(500)
66
67static void cm4000_release(struct pcmcia_device *link);
68
69static int major;
70
71
72
73#define M_FETCH_ATR 0
74#define M_TIMEOUT_WAIT 1
75#define M_READ_ATR_LEN 2
76#define M_READ_ATR 3
77#define M_ATR_PRESENT 4
78#define M_BAD_CARD 5
79#define M_CARDOFF 6
80
81#define LOCK_IO 0
82#define LOCK_MONITOR 1
83
84#define IS_AUTOPPS_ACT 6
85#define IS_PROCBYTE_PRESENT 7
86#define IS_INVREV 8
87#define IS_ANY_T0 9
88#define IS_ANY_T1 10
89#define IS_ATR_PRESENT 11
90#define IS_ATR_VALID 12
91#define IS_CMM_ABSENT 13
92#define IS_BAD_LENGTH 14
93#define IS_BAD_CSUM 15
94#define IS_BAD_CARD 16
95
96#define REG_FLAGS0(x) (x + 0)
97#define REG_FLAGS1(x) (x + 1)
98#define REG_NUM_BYTES(x) (x + 2)
99#define REG_BUF_ADDR(x) (x + 3)
100#define REG_BUF_DATA(x) (x + 4)
101#define REG_NUM_SEND(x) (x + 5)
102#define REG_BAUDRATE(x) (x + 6)
103#define REG_STOPBITS(x) (x + 7)
104
105struct cm4000_dev {
106 struct pcmcia_device *p_dev;
107
108 unsigned char atr[MAX_ATR];
109 unsigned char rbuf[512];
110 unsigned char sbuf[512];
111
112 wait_queue_head_t devq;
113
114
115 wait_queue_head_t ioq;
116 wait_queue_head_t atrq;
117 wait_queue_head_t readq;
118
119
120
121 unsigned char atr_csum;
122 unsigned char atr_len_retry;
123 unsigned short atr_len;
124 unsigned short rlen;
125 unsigned short rpos;
126 unsigned char procbyte;
127 unsigned char mstate;
128 unsigned char cwarn;
129 unsigned char flags0;
130 unsigned char flags1;
131 unsigned int mdelay;
132
133 unsigned int baudv;
134 unsigned char ta1;
135 unsigned char proto;
136 unsigned long flags;
137
138
139 unsigned char pts[4];
140
141 struct timer_list timer;
142 int monitor_running;
143};
144
145#define ZERO_DEV(dev) \
146 memset(&dev->atr_csum,0, \
147 sizeof(struct cm4000_dev) - \
148 offsetof(struct cm4000_dev, atr_csum))
149
150static struct pcmcia_device *dev_table[CM4000_MAX_DEV];
151static struct class *cmm_class;
152
153
154
155
156static unsigned char fi_di_table[10][14] = {
157
158
159 {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
160 {0x01,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x91,0x11,0x11,0x11,0x11},
161 {0x02,0x12,0x22,0x32,0x11,0x11,0x11,0x11,0x11,0x92,0xA2,0xB2,0x11,0x11},
162 {0x03,0x13,0x23,0x33,0x43,0x53,0x63,0x11,0x11,0x93,0xA3,0xB3,0xC3,0xD3},
163 {0x04,0x14,0x24,0x34,0x44,0x54,0x64,0x11,0x11,0x94,0xA4,0xB4,0xC4,0xD4},
164 {0x00,0x15,0x25,0x35,0x45,0x55,0x65,0x11,0x11,0x95,0xA5,0xB5,0xC5,0xD5},
165 {0x06,0x16,0x26,0x36,0x46,0x56,0x66,0x11,0x11,0x96,0xA6,0xB6,0xC6,0xD6},
166 {0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x11},
167 {0x08,0x11,0x28,0x38,0x48,0x58,0x68,0x11,0x11,0x98,0xA8,0xB8,0xC8,0xD8},
168 {0x09,0x19,0x29,0x39,0x49,0x59,0x69,0x11,0x11,0x99,0xA9,0xB9,0xC9,0xD9}
169};
170
171#ifndef CM4000_DEBUG
172#define xoutb outb
173#define xinb inb
174#else
175static inline void xoutb(unsigned char val, unsigned short port)
176{
177 pr_debug("outb(val=%.2x,port=%.4x)\n", val, port);
178 outb(val, port);
179}
180static inline unsigned char xinb(unsigned short port)
181{
182 unsigned char val;
183
184 val = inb(port);
185 pr_debug("%.2x=inb(%.4x)\n", val, port);
186
187 return val;
188}
189#endif
190
191static inline unsigned char invert_revert(unsigned char ch)
192{
193 return bitrev8(~ch);
194}
195
196static void str_invert_revert(unsigned char *b, int len)
197{
198 int i;
199
200 for (i = 0; i < len; i++)
201 b[i] = invert_revert(b[i]);
202}
203
204#define ATRLENCK(dev,pos) \
205 if (pos>=dev->atr_len || pos>=MAX_ATR) \
206 goto return_0;
207
208static unsigned int calc_baudv(unsigned char fidi)
209{
210 unsigned int wcrcf, wbrcf, fi_rfu, di_rfu;
211
212 fi_rfu = 372;
213 di_rfu = 1;
214
215
216 switch ((fidi >> 4) & 0x0F) {
217 case 0x00:
218 wcrcf = 372;
219 break;
220 case 0x01:
221 wcrcf = 372;
222 break;
223 case 0x02:
224 wcrcf = 558;
225 break;
226 case 0x03:
227 wcrcf = 744;
228 break;
229 case 0x04:
230 wcrcf = 1116;
231 break;
232 case 0x05:
233 wcrcf = 1488;
234 break;
235 case 0x06:
236 wcrcf = 1860;
237 break;
238 case 0x07:
239 wcrcf = fi_rfu;
240 break;
241 case 0x08:
242 wcrcf = fi_rfu;
243 break;
244 case 0x09:
245 wcrcf = 512;
246 break;
247 case 0x0A:
248 wcrcf = 768;
249 break;
250 case 0x0B:
251 wcrcf = 1024;
252 break;
253 case 0x0C:
254 wcrcf = 1536;
255 break;
256 case 0x0D:
257 wcrcf = 2048;
258 break;
259 default:
260 wcrcf = fi_rfu;
261 break;
262 }
263
264
265 switch (fidi & 0x0F) {
266 case 0x00:
267 wbrcf = di_rfu;
268 break;
269 case 0x01:
270 wbrcf = 1;
271 break;
272 case 0x02:
273 wbrcf = 2;
274 break;
275 case 0x03:
276 wbrcf = 4;
277 break;
278 case 0x04:
279 wbrcf = 8;
280 break;
281 case 0x05:
282 wbrcf = 16;
283 break;
284 case 0x06:
285 wbrcf = 32;
286 break;
287 case 0x07:
288 wbrcf = di_rfu;
289 break;
290 case 0x08:
291 wbrcf = 12;
292 break;
293 case 0x09:
294 wbrcf = 20;
295 break;
296 default:
297 wbrcf = di_rfu;
298 break;
299 }
300
301 return (wcrcf / wbrcf);
302}
303
304static unsigned short io_read_num_rec_bytes(unsigned int iobase,
305 unsigned short *s)
306{
307 unsigned short tmp;
308
309 tmp = *s = 0;
310 do {
311 *s = tmp;
312 tmp = inb(REG_NUM_BYTES(iobase)) |
313 (inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0);
314 } while (tmp != *s);
315
316 return *s;
317}
318
319static int parse_atr(struct cm4000_dev *dev)
320{
321 unsigned char any_t1, any_t0;
322 unsigned char ch, ifno;
323 int ix, done;
324
325 DEBUGP(3, dev, "-> parse_atr: dev->atr_len = %i\n", dev->atr_len);
326
327 if (dev->atr_len < 3) {
328 DEBUGP(5, dev, "parse_atr: atr_len < 3\n");
329 return 0;
330 }
331
332 if (dev->atr[0] == 0x3f)
333 set_bit(IS_INVREV, &dev->flags);
334 else
335 clear_bit(IS_INVREV, &dev->flags);
336 ix = 1;
337 ifno = 1;
338 ch = dev->atr[1];
339 dev->proto = 0;
340 any_t1 = any_t0 = done = 0;
341 dev->ta1 = 0x11;
342 do {
343 if (ifno == 1 && (ch & 0x10)) {
344
345 dev->ta1 = dev->atr[2];
346 DEBUGP(5, dev, "Card says FiDi is 0x%.2x\n", dev->ta1);
347 ifno++;
348 } else if ((ifno == 2) && (ch & 0x10)) {
349 dev->ta1 = 0x11;
350 ifno++;
351 }
352
353 DEBUGP(5, dev, "Yi=%.2x\n", ch & 0xf0);
354 ix += ((ch & 0x10) >> 4)
355 +((ch & 0x20) >> 5)
356 + ((ch & 0x40) >> 6)
357 + ((ch & 0x80) >> 7);
358
359 if (ch & 0x80) {
360 ch = dev->atr[ix];
361 if ((ch & 0x0f)) {
362 any_t1 = 1;
363 DEBUGP(5, dev, "card is capable of T=1\n");
364 } else {
365 any_t0 = 1;
366 DEBUGP(5, dev, "card is capable of T=0\n");
367 }
368 } else
369 done = 1;
370 } while (!done);
371
372 DEBUGP(5, dev, "ix=%d noHist=%d any_t1=%d\n",
373 ix, dev->atr[1] & 15, any_t1);
374 if (ix + 1 + (dev->atr[1] & 0x0f) + any_t1 != dev->atr_len) {
375 DEBUGP(5, dev, "length error\n");
376 return 0;
377 }
378 if (any_t0)
379 set_bit(IS_ANY_T0, &dev->flags);
380
381 if (any_t1) {
382 dev->atr_csum = 0;
383#ifdef ATR_CSUM
384 for (i = 1; i < dev->atr_len; i++)
385 dev->atr_csum ^= dev->atr[i];
386 if (dev->atr_csum) {
387 set_bit(IS_BAD_CSUM, &dev->flags);
388 DEBUGP(5, dev, "bad checksum\n");
389 goto return_0;
390 }
391#endif
392 if (any_t0 == 0)
393 dev->proto = 1;
394 set_bit(IS_ANY_T1, &dev->flags);
395 }
396
397 return 1;
398}
399
400struct card_fixup {
401 char atr[12];
402 u_int8_t atr_len;
403 u_int8_t stopbits;
404};
405
406static struct card_fixup card_fixups[] = {
407 {
408 .atr = { 0x3b, 0xb3, 0x11, 0x00, 0x00, 0x41, 0x01 },
409 .atr_len = 7,
410 .stopbits = 0x03,
411 },
412 {
413 .atr = {0x3b, 0x76, 0x13, 0x00, 0x00, 0x80, 0x62, 0x07,
414 0x41, 0x81, 0x81 },
415 .atr_len = 11,
416 .stopbits = 0x04,
417 },
418};
419
420static void set_cardparameter(struct cm4000_dev *dev)
421{
422 int i;
423 unsigned int iobase = dev->p_dev->resource[0]->start;
424 u_int8_t stopbits = 0x02;
425
426 DEBUGP(3, dev, "-> set_cardparameter\n");
427
428 dev->flags1 = dev->flags1 | (((dev->baudv - 1) & 0x0100) >> 8);
429 xoutb(dev->flags1, REG_FLAGS1(iobase));
430 DEBUGP(5, dev, "flags1 = 0x%02x\n", dev->flags1);
431
432
433 xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase));
434
435 DEBUGP(5, dev, "baudv = %i -> write 0x%02x\n", dev->baudv,
436 ((dev->baudv - 1) & 0xFF));
437
438
439 for (i = 0; i < ARRAY_SIZE(card_fixups); i++) {
440 if (!memcmp(dev->atr, card_fixups[i].atr,
441 card_fixups[i].atr_len))
442 stopbits = card_fixups[i].stopbits;
443 }
444 xoutb(stopbits, REG_STOPBITS(iobase));
445
446 DEBUGP(3, dev, "<- set_cardparameter\n");
447}
448
449static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq)
450{
451
452 unsigned long tmp, i;
453 unsigned short num_bytes_read;
454 unsigned char pts_reply[4];
455 ssize_t rc;
456 unsigned int iobase = dev->p_dev->resource[0]->start;
457
458 rc = 0;
459
460 DEBUGP(3, dev, "-> set_protocol\n");
461 DEBUGP(5, dev, "ptsreq->Protocol = 0x%.8x, ptsreq->Flags=0x%.8x, "
462 "ptsreq->pts1=0x%.2x, ptsreq->pts2=0x%.2x, "
463 "ptsreq->pts3=0x%.2x\n", (unsigned int)ptsreq->protocol,
464 (unsigned int)ptsreq->flags, ptsreq->pts1, ptsreq->pts2,
465 ptsreq->pts3);
466
467
468 dev->pts[0] = 0xff;
469 dev->pts[1] = 0x00;
470 tmp = ptsreq->protocol;
471 while ((tmp = (tmp >> 1)) > 0)
472 dev->pts[1]++;
473 dev->proto = dev->pts[1];
474 dev->pts[1] = (0x01 << 4) | (dev->pts[1]);
475
476
477 DEBUGP(5, dev, "Ta(1) from ATR is 0x%.2x\n", dev->ta1);
478
479 dev->pts[2] = fi_di_table[dev->ta1 & 0x0F][(dev->ta1 >> 4) & 0x0F];
480
481
482 dev->pts[3] = dev->pts[0] ^ dev->pts[1] ^ dev->pts[2];
483
484 DEBUGP(5, dev, "pts0=%.2x, pts1=%.2x, pts2=%.2x, pts3=%.2x\n",
485 dev->pts[0], dev->pts[1], dev->pts[2], dev->pts[3]);
486
487
488 if (test_bit(IS_INVREV, &dev->flags))
489 str_invert_revert(dev->pts, 4);
490
491
492 xoutb(0x80, REG_FLAGS0(iobase));
493
494
495 DEBUGP(5, dev, "Enable access to the messages buffer\n");
496 dev->flags1 = 0x20
497 | (test_bit(IS_INVREV, &dev->flags) ? 0x02 : 0x00)
498 | ((dev->baudv >> 8) & 0x01);
499 xoutb(dev->flags1, REG_FLAGS1(iobase));
500
501 DEBUGP(5, dev, "Enable message buffer -> flags1 = 0x%.2x\n",
502 dev->flags1);
503
504
505 DEBUGP(5, dev, "Write challenge to buffer: ");
506 for (i = 0; i < 4; i++) {
507 xoutb(i, REG_BUF_ADDR(iobase));
508 xoutb(dev->pts[i], REG_BUF_DATA(iobase));
509#ifdef CM4000_DEBUG
510 pr_debug("0x%.2x ", dev->pts[i]);
511 }
512 pr_debug("\n");
513#else
514 }
515#endif
516
517
518 DEBUGP(5, dev, "Set number of bytes to write\n");
519 xoutb(0x04, REG_NUM_SEND(iobase));
520
521
522 xoutb(0x50, REG_FLAGS0(iobase));
523
524
525
526 DEBUGP(5, dev, "Waiting for NumRecBytes getting valid\n");
527
528 for (i = 0; i < 100; i++) {
529 if (inb(REG_FLAGS0(iobase)) & 0x08) {
530 DEBUGP(5, dev, "NumRecBytes is valid\n");
531 break;
532 }
533 usleep_range(10000, 11000);
534 }
535 if (i == 100) {
536 DEBUGP(5, dev, "Timeout waiting for NumRecBytes getting "
537 "valid\n");
538 rc = -EIO;
539 goto exit_setprotocol;
540 }
541
542 DEBUGP(5, dev, "Reading NumRecBytes\n");
543 for (i = 0; i < 100; i++) {
544 io_read_num_rec_bytes(iobase, &num_bytes_read);
545 if (num_bytes_read >= 4) {
546 DEBUGP(2, dev, "NumRecBytes = %i\n", num_bytes_read);
547 break;
548 }
549 usleep_range(10000, 11000);
550 }
551
552
553 if (num_bytes_read == 3)
554 i = 0;
555
556 if (i == 100) {
557 DEBUGP(5, dev, "Timeout reading num_bytes_read\n");
558 rc = -EIO;
559 goto exit_setprotocol;
560 }
561
562 DEBUGP(5, dev, "Reset the CARDMAN CONTROLLER\n");
563 xoutb(0x80, REG_FLAGS0(iobase));
564
565
566 DEBUGP(5, dev, "Read PPS reply\n");
567 for (i = 0; i < num_bytes_read; i++) {
568 xoutb(i, REG_BUF_ADDR(iobase));
569 pts_reply[i] = inb(REG_BUF_DATA(iobase));
570 }
571
572#ifdef CM4000_DEBUG
573 DEBUGP(2, dev, "PTSreply: ");
574 for (i = 0; i < num_bytes_read; i++) {
575 pr_debug("0x%.2x ", pts_reply[i]);
576 }
577 pr_debug("\n");
578#endif
579
580 DEBUGP(5, dev, "Clear Tactive in Flags1\n");
581 xoutb(0x20, REG_FLAGS1(iobase));
582
583
584 if ((dev->pts[0] == pts_reply[0]) &&
585 (dev->pts[1] == pts_reply[1]) &&
586 (dev->pts[2] == pts_reply[2]) && (dev->pts[3] == pts_reply[3])) {
587
588 dev->baudv = calc_baudv(dev->pts[2]);
589 set_cardparameter(dev);
590 } else if ((dev->pts[0] == pts_reply[0]) &&
591 ((dev->pts[1] & 0xef) == pts_reply[1]) &&
592 ((pts_reply[0] ^ pts_reply[1]) == pts_reply[2])) {
593
594 dev->baudv = calc_baudv(0x11);
595 set_cardparameter(dev);
596 } else
597 rc = -EIO;
598
599exit_setprotocol:
600 DEBUGP(3, dev, "<- set_protocol\n");
601 return rc;
602}
603
604static int io_detect_cm4000(unsigned int iobase, struct cm4000_dev *dev)
605{
606
607
608 if (inb(REG_FLAGS0(iobase)) & 8) {
609 clear_bit(IS_ATR_VALID, &dev->flags);
610 set_bit(IS_CMM_ABSENT, &dev->flags);
611 return 0;
612 }
613
614 xoutb(dev->flags1 | 0x40, REG_FLAGS1(iobase));
615 if ((inb(REG_FLAGS0(iobase)) & 8) == 0) {
616 clear_bit(IS_ATR_VALID, &dev->flags);
617 set_bit(IS_CMM_ABSENT, &dev->flags);
618 return 0;
619 }
620
621 xoutb(dev->flags1, REG_FLAGS1(iobase));
622 return 1;
623}
624
625static void terminate_monitor(struct cm4000_dev *dev)
626{
627
628
629
630
631 DEBUGP(3, dev, "-> terminate_monitor\n");
632 wait_event_interruptible(dev->devq,
633 test_and_set_bit(LOCK_MONITOR,
634 (void *)&dev->flags));
635
636
637
638
639
640
641 DEBUGP(5, dev, "Now allow last cycle of monitor!\n");
642 while (test_bit(LOCK_MONITOR, (void *)&dev->flags))
643 msleep(25);
644
645 DEBUGP(5, dev, "Delete timer\n");
646 del_timer_sync(&dev->timer);
647#ifdef CM4000_DEBUG
648 dev->monitor_running = 0;
649#endif
650
651 DEBUGP(3, dev, "<- terminate_monitor\n");
652}
653
654
655
656
657
658
659
660
661
662static void monitor_card(struct timer_list *t)
663{
664 struct cm4000_dev *dev = from_timer(dev, t, timer);
665 unsigned int iobase = dev->p_dev->resource[0]->start;
666 unsigned short s;
667 struct ptsreq ptsreq;
668 int i, atrc;
669
670 DEBUGP(7, dev, "-> monitor_card\n");
671
672
673 if (test_and_set_bit(LOCK_MONITOR, &dev->flags)) {
674 DEBUGP(4, dev, "About to stop monitor\n");
675
676 dev->rlen =
677 dev->rpos =
678 dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
679 dev->mstate = M_FETCH_ATR;
680 clear_bit(LOCK_MONITOR, &dev->flags);
681
682 wake_up_interruptible(&dev->devq);
683 DEBUGP(2, dev, "<- monitor_card (we are done now)\n");
684 return;
685 }
686
687
688 if (test_and_set_bit(LOCK_IO, (void *)&dev->flags)) {
689 DEBUGP(4, dev, "Couldn't get IO lock\n");
690 goto return_with_timer;
691 }
692
693
694 dev->flags0 = xinb(REG_FLAGS0(iobase));
695 DEBUGP(7, dev, "dev->flags0 = 0x%2x\n", dev->flags0);
696 DEBUGP(7, dev, "smartcard present: %s\n",
697 dev->flags0 & 1 ? "yes" : "no");
698 DEBUGP(7, dev, "cardman present: %s\n",
699 dev->flags0 == 0xff ? "no" : "yes");
700
701 if ((dev->flags0 & 1) == 0
702 || dev->flags0 == 0xff) {
703
704 dev->rlen =
705 dev->rpos =
706 dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0;
707 dev->mstate = M_FETCH_ATR;
708
709 dev->flags &= 0x000000ff;
710
711 if (dev->flags0 == 0xff) {
712 DEBUGP(4, dev, "set IS_CMM_ABSENT bit\n");
713 set_bit(IS_CMM_ABSENT, &dev->flags);
714 } else if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
715 DEBUGP(4, dev, "clear IS_CMM_ABSENT bit "
716 "(card is removed)\n");
717 clear_bit(IS_CMM_ABSENT, &dev->flags);
718 }
719
720 goto release_io;
721 } else if ((dev->flags0 & 1) && test_bit(IS_CMM_ABSENT, &dev->flags)) {
722
723
724 DEBUGP(4, dev, "clear IS_CMM_ABSENT bit (card is inserted)\n");
725 clear_bit(IS_CMM_ABSENT, &dev->flags);
726 }
727
728 if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
729 DEBUGP(7, dev, "believe ATR is already valid (do nothing)\n");
730 goto release_io;
731 }
732
733 switch (dev->mstate) {
734 case M_CARDOFF: {
735 unsigned char flags0;
736
737 DEBUGP(4, dev, "M_CARDOFF\n");
738 flags0 = inb(REG_FLAGS0(iobase));
739 if (flags0 & 0x02) {
740
741 dev->mdelay = T_10MSEC;
742 } else {
743
744
745 xoutb(0x80, REG_FLAGS0(iobase));
746
747
748
749 dev->rlen =
750 dev->rpos =
751 dev->atr_csum =
752 dev->atr_len_retry = dev->cwarn = 0;
753 dev->mstate = M_FETCH_ATR;
754
755
756 dev->mdelay = T_50MSEC;
757 }
758 break;
759 }
760 case M_FETCH_ATR:
761 DEBUGP(4, dev, "M_FETCH_ATR\n");
762 xoutb(0x80, REG_FLAGS0(iobase));
763 DEBUGP(4, dev, "Reset BAUDV to 9600\n");
764 dev->baudv = 0x173;
765 xoutb(0x02, REG_STOPBITS(iobase));
766 xoutb(0x73, REG_BAUDRATE(iobase));
767 xoutb(0x21, REG_FLAGS1(iobase));
768
769
770 xoutb(dev->flags0 & 2 ? 0x46 : 0x44, REG_FLAGS0(iobase));
771 dev->mdelay = T_40MSEC;
772 dev->mstate = M_TIMEOUT_WAIT;
773 break;
774 case M_TIMEOUT_WAIT:
775 DEBUGP(4, dev, "M_TIMEOUT_WAIT\n");
776
777 io_read_num_rec_bytes(iobase, &dev->atr_len);
778 dev->mdelay = T_10MSEC;
779 dev->mstate = M_READ_ATR_LEN;
780 break;
781 case M_READ_ATR_LEN:
782 DEBUGP(4, dev, "M_READ_ATR_LEN\n");
783
784
785#define MAX_ATR_LEN_RETRY 100
786
787 if (dev->atr_len == io_read_num_rec_bytes(iobase, &s)) {
788 if (dev->atr_len_retry++ >= MAX_ATR_LEN_RETRY) {
789 dev->mdelay = T_10MSEC;
790 dev->mstate = M_READ_ATR;
791 }
792 } else {
793 dev->atr_len = s;
794 dev->atr_len_retry = 0;
795 }
796
797 DEBUGP(4, dev, "Current ATR_LEN = %i\n", dev->atr_len);
798 break;
799 case M_READ_ATR:
800 DEBUGP(4, dev, "M_READ_ATR\n");
801 xoutb(0x80, REG_FLAGS0(iobase));
802 for (i = 0; i < dev->atr_len; i++) {
803 xoutb(i, REG_BUF_ADDR(iobase));
804 dev->atr[i] = inb(REG_BUF_DATA(iobase));
805 }
806
807 DEBUGP(4, dev, "Deactivate T_Active flags\n");
808 dev->flags1 = 0x01;
809 xoutb(dev->flags1, REG_FLAGS1(iobase));
810
811
812 set_bit(IS_ATR_PRESENT, &dev->flags);
813 if (dev->atr[0] == 0x03)
814 str_invert_revert(dev->atr, dev->atr_len);
815 atrc = parse_atr(dev);
816 if (atrc == 0) {
817 dev->mdelay = 0;
818 dev->mstate = M_BAD_CARD;
819 } else {
820 dev->mdelay = T_50MSEC;
821 dev->mstate = M_ATR_PRESENT;
822 set_bit(IS_ATR_VALID, &dev->flags);
823 }
824
825 if (test_bit(IS_ATR_VALID, &dev->flags) == 1) {
826 DEBUGP(4, dev, "monitor_card: ATR valid\n");
827
828
829 if ((test_bit(IS_AUTOPPS_ACT, &dev->flags) == 0) &&
830 (dev->ta1 != 0x11) &&
831 !(test_bit(IS_ANY_T0, &dev->flags) &&
832 test_bit(IS_ANY_T1, &dev->flags))) {
833 DEBUGP(4, dev, "Perform AUTOPPS\n");
834 set_bit(IS_AUTOPPS_ACT, &dev->flags);
835 ptsreq.protocol = (0x01 << dev->proto);
836 ptsreq.flags = 0x01;
837 ptsreq.pts1 = 0x00;
838 ptsreq.pts2 = 0x00;
839 ptsreq.pts3 = 0x00;
840 if (set_protocol(dev, &ptsreq) == 0) {
841 DEBUGP(4, dev, "AUTOPPS ret SUCC\n");
842 clear_bit(IS_AUTOPPS_ACT, &dev->flags);
843 wake_up_interruptible(&dev->atrq);
844 } else {
845 DEBUGP(4, dev, "AUTOPPS failed: "
846 "repower using defaults\n");
847
848 clear_bit(IS_ATR_PRESENT, &dev->flags);
849 clear_bit(IS_ATR_VALID, &dev->flags);
850 dev->rlen =
851 dev->rpos =
852 dev->atr_csum =
853 dev->atr_len_retry = dev->cwarn = 0;
854 dev->mstate = M_FETCH_ATR;
855
856 dev->mdelay = T_50MSEC;
857 }
858 } else {
859
860
861 set_cardparameter(dev);
862 if (test_bit(IS_AUTOPPS_ACT, &dev->flags) == 1)
863 DEBUGP(4, dev, "AUTOPPS already active "
864 "2nd try:use default values\n");
865 if (dev->ta1 == 0x11)
866 DEBUGP(4, dev, "No AUTOPPS necessary "
867 "TA(1)==0x11\n");
868 if (test_bit(IS_ANY_T0, &dev->flags)
869 && test_bit(IS_ANY_T1, &dev->flags))
870 DEBUGP(4, dev, "Do NOT perform AUTOPPS "
871 "with multiprotocol cards\n");
872 clear_bit(IS_AUTOPPS_ACT, &dev->flags);
873 wake_up_interruptible(&dev->atrq);
874 }
875 } else {
876 DEBUGP(4, dev, "ATR invalid\n");
877 wake_up_interruptible(&dev->atrq);
878 }
879 break;
880 case M_BAD_CARD:
881 DEBUGP(4, dev, "M_BAD_CARD\n");
882
883 if (dev->cwarn == 0 || dev->cwarn == 10) {
884 set_bit(IS_BAD_CARD, &dev->flags);
885 dev_warn(&dev->p_dev->dev, MODULE_NAME ": ");
886 if (test_bit(IS_BAD_CSUM, &dev->flags)) {
887 DEBUGP(4, dev, "ATR checksum (0x%.2x, should "
888 "be zero) failed\n", dev->atr_csum);
889 }
890#ifdef CM4000_DEBUG
891 else if (test_bit(IS_BAD_LENGTH, &dev->flags)) {
892 DEBUGP(4, dev, "ATR length error\n");
893 } else {
894 DEBUGP(4, dev, "card damaged or wrong way "
895 "inserted\n");
896 }
897#endif
898 dev->cwarn = 0;
899 wake_up_interruptible(&dev->atrq);
900 }
901 dev->cwarn++;
902 dev->mdelay = T_100MSEC;
903 dev->mstate = M_FETCH_ATR;
904 break;
905 default:
906 DEBUGP(7, dev, "Unknown action\n");
907 break;
908 }
909
910release_io:
911 DEBUGP(7, dev, "release_io\n");
912 clear_bit(LOCK_IO, &dev->flags);
913 wake_up_interruptible(&dev->ioq);
914
915return_with_timer:
916 DEBUGP(7, dev, "<- monitor_card (returns with timer)\n");
917 mod_timer(&dev->timer, jiffies + dev->mdelay);
918 clear_bit(LOCK_MONITOR, &dev->flags);
919}
920
921
922
923static ssize_t cmm_read(struct file *filp, __user char *buf, size_t count,
924 loff_t *ppos)
925{
926 struct cm4000_dev *dev = filp->private_data;
927 unsigned int iobase = dev->p_dev->resource[0]->start;
928 ssize_t rc;
929 int i, j, k;
930
931 DEBUGP(2, dev, "-> cmm_read(%s,%d)\n", current->comm, current->pid);
932
933 if (count == 0)
934 return 0;
935
936 if (!pcmcia_dev_present(dev->p_dev) ||
937 test_bit(IS_CMM_ABSENT, &dev->flags))
938 return -ENODEV;
939
940 if (test_bit(IS_BAD_CSUM, &dev->flags))
941 return -EIO;
942
943
944 if (wait_event_interruptible
945 (dev->atrq,
946 ((filp->f_flags & O_NONBLOCK)
947 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
948 if (filp->f_flags & O_NONBLOCK)
949 return -EAGAIN;
950 return -ERESTARTSYS;
951 }
952
953 if (test_bit(IS_ATR_VALID, &dev->flags) == 0)
954 return -EIO;
955
956
957 if (wait_event_interruptible
958 (dev->readq,
959 ((filp->f_flags & O_NONBLOCK) || (dev->rpos < dev->rlen)))) {
960 if (filp->f_flags & O_NONBLOCK)
961 return -EAGAIN;
962 return -ERESTARTSYS;
963 }
964
965
966 if (wait_event_interruptible
967 (dev->ioq,
968 ((filp->f_flags & O_NONBLOCK)
969 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
970 if (filp->f_flags & O_NONBLOCK)
971 return -EAGAIN;
972 return -ERESTARTSYS;
973 }
974
975 rc = 0;
976 dev->flags0 = inb(REG_FLAGS0(iobase));
977 if ((dev->flags0 & 1) == 0
978 || dev->flags0 == 0xff) {
979 clear_bit(IS_ATR_VALID, &dev->flags);
980 if (dev->flags0 & 1) {
981 set_bit(IS_CMM_ABSENT, &dev->flags);
982 rc = -ENODEV;
983 } else {
984 rc = -EIO;
985 }
986 goto release_io;
987 }
988
989 DEBUGP(4, dev, "begin read answer\n");
990 j = min(count, (size_t)(dev->rlen - dev->rpos));
991 k = dev->rpos;
992 if (k + j > 255)
993 j = 256 - k;
994 DEBUGP(4, dev, "read1 j=%d\n", j);
995 for (i = 0; i < j; i++) {
996 xoutb(k++, REG_BUF_ADDR(iobase));
997 dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
998 }
999 j = min(count, (size_t)(dev->rlen - dev->rpos));
1000 if (k + j > 255) {
1001 DEBUGP(4, dev, "read2 j=%d\n", j);
1002 dev->flags1 |= 0x10;
1003 xoutb(dev->flags1, REG_FLAGS1(iobase));
1004 for (; i < j; i++) {
1005 xoutb(k++, REG_BUF_ADDR(iobase));
1006 dev->rbuf[i] = xinb(REG_BUF_DATA(iobase));
1007 }
1008 }
1009
1010 if (dev->proto == 0 && count > dev->rlen - dev->rpos && i) {
1011 DEBUGP(4, dev, "T=0 and count > buffer\n");
1012 dev->rbuf[i] = dev->rbuf[i - 1];
1013 dev->rbuf[i - 1] = dev->procbyte;
1014 j++;
1015 }
1016 count = j;
1017
1018 dev->rpos = dev->rlen + 1;
1019
1020
1021 DEBUGP(4, dev, "Clear T1Active\n");
1022 dev->flags1 &= 0xdf;
1023 xoutb(dev->flags1, REG_FLAGS1(iobase));
1024
1025 xoutb(0, REG_FLAGS1(iobase));
1026
1027 if (!io_detect_cm4000(iobase, dev)) {
1028 rc = -ENODEV;
1029 goto release_io;
1030 }
1031
1032 if (test_bit(IS_INVREV, &dev->flags) && count > 0)
1033 str_invert_revert(dev->rbuf, count);
1034
1035 if (copy_to_user(buf, dev->rbuf, count))
1036 rc = -EFAULT;
1037
1038release_io:
1039 clear_bit(LOCK_IO, &dev->flags);
1040 wake_up_interruptible(&dev->ioq);
1041
1042 DEBUGP(2, dev, "<- cmm_read returns: rc = %zi\n",
1043 (rc < 0 ? rc : count));
1044 return rc < 0 ? rc : count;
1045}
1046
1047static ssize_t cmm_write(struct file *filp, const char __user *buf,
1048 size_t count, loff_t *ppos)
1049{
1050 struct cm4000_dev *dev = filp->private_data;
1051 unsigned int iobase = dev->p_dev->resource[0]->start;
1052 unsigned short s;
1053 unsigned char tmp;
1054 unsigned char infolen;
1055 unsigned char sendT0;
1056 unsigned short nsend;
1057 unsigned short nr;
1058 ssize_t rc;
1059 int i;
1060
1061 DEBUGP(2, dev, "-> cmm_write(%s,%d)\n", current->comm, current->pid);
1062
1063 if (count == 0)
1064 return 0;
1065
1066 if (dev->proto == 0 && count < 4) {
1067
1068 DEBUGP(4, dev, "T0 short write\n");
1069 return -EIO;
1070 }
1071
1072 nr = count & 0x1ff;
1073
1074 sendT0 = dev->proto ? 0 : nr > 5 ? 0x08 : 0;
1075
1076 if (!pcmcia_dev_present(dev->p_dev) ||
1077 test_bit(IS_CMM_ABSENT, &dev->flags))
1078 return -ENODEV;
1079
1080 if (test_bit(IS_BAD_CSUM, &dev->flags)) {
1081 DEBUGP(4, dev, "bad csum\n");
1082 return -EIO;
1083 }
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096 if (wait_event_interruptible
1097 (dev->atrq,
1098 ((filp->f_flags & O_NONBLOCK)
1099 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags) != 0)))) {
1100 if (filp->f_flags & O_NONBLOCK)
1101 return -EAGAIN;
1102 return -ERESTARTSYS;
1103 }
1104
1105 if (test_bit(IS_ATR_VALID, &dev->flags) == 0) {
1106 DEBUGP(4, dev, "invalid ATR\n");
1107 return -EIO;
1108 }
1109
1110
1111 if (wait_event_interruptible
1112 (dev->ioq,
1113 ((filp->f_flags & O_NONBLOCK)
1114 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags) == 0)))) {
1115 if (filp->f_flags & O_NONBLOCK)
1116 return -EAGAIN;
1117 return -ERESTARTSYS;
1118 }
1119
1120 if (copy_from_user(dev->sbuf, buf, ((count > 512) ? 512 : count)))
1121 return -EFAULT;
1122
1123 rc = 0;
1124 dev->flags0 = inb(REG_FLAGS0(iobase));
1125 if ((dev->flags0 & 1) == 0
1126 || dev->flags0 == 0xff) {
1127 clear_bit(IS_ATR_VALID, &dev->flags);
1128 if (dev->flags0 & 1) {
1129 set_bit(IS_CMM_ABSENT, &dev->flags);
1130 rc = -ENODEV;
1131 } else {
1132 DEBUGP(4, dev, "IO error\n");
1133 rc = -EIO;
1134 }
1135 goto release_io;
1136 }
1137
1138 xoutb(0x80, REG_FLAGS0(iobase));
1139
1140 if (!io_detect_cm4000(iobase, dev)) {
1141 rc = -ENODEV;
1142 goto release_io;
1143 }
1144
1145
1146 dev->flags1 |= (sendT0);
1147
1148 set_cardparameter(dev);
1149
1150
1151 tmp = inb(REG_FLAGS1(iobase));
1152
1153 dev->flags1 = 0x20
1154 | (sendT0)
1155 | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)
1156 | (((dev->baudv - 1) & 0x0100) >> 8);
1157 DEBUGP(1, dev, "set dev->flags1 = 0x%.2x\n", dev->flags1);
1158 xoutb(dev->flags1, REG_FLAGS1(iobase));
1159
1160
1161 DEBUGP(4, dev, "Xmit data\n");
1162 for (i = 0; i < nr; i++) {
1163 if (i >= 256) {
1164 dev->flags1 = 0x20
1165 | (sendT0)
1166
1167 | (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)
1168 | (((dev->baudv - 1) & 0x0100) >> 8)
1169 | 0x10;
1170 DEBUGP(4, dev, "dev->flags = 0x%.2x - set address "
1171 "high\n", dev->flags1);
1172 xoutb(dev->flags1, REG_FLAGS1(iobase));
1173 }
1174 if (test_bit(IS_INVREV, &dev->flags)) {
1175 DEBUGP(4, dev, "Apply inverse convention for 0x%.2x "
1176 "-> 0x%.2x\n", (unsigned char)dev->sbuf[i],
1177 invert_revert(dev->sbuf[i]));
1178 xoutb(i, REG_BUF_ADDR(iobase));
1179 xoutb(invert_revert(dev->sbuf[i]),
1180 REG_BUF_DATA(iobase));
1181 } else {
1182 xoutb(i, REG_BUF_ADDR(iobase));
1183 xoutb(dev->sbuf[i], REG_BUF_DATA(iobase));
1184 }
1185 }
1186 DEBUGP(4, dev, "Xmit done\n");
1187
1188 if (dev->proto == 0) {
1189
1190 if (nr == 4) {
1191 DEBUGP(4, dev, "T=0 assumes 0 byte reply\n");
1192 xoutb(i, REG_BUF_ADDR(iobase));
1193 if (test_bit(IS_INVREV, &dev->flags))
1194 xoutb(0xff, REG_BUF_DATA(iobase));
1195 else
1196 xoutb(0x00, REG_BUF_DATA(iobase));
1197 }
1198
1199
1200 if (sendT0)
1201 nsend = nr;
1202 else {
1203 if (nr == 4)
1204 nsend = 5;
1205 else {
1206 nsend = 5 + (unsigned char)dev->sbuf[4];
1207 if (dev->sbuf[4] == 0)
1208 nsend += 0x100;
1209 }
1210 }
1211 } else
1212 nsend = nr;
1213
1214
1215 if (test_bit(IS_INVREV, &dev->flags)) {
1216 DEBUGP(4, dev, "T=0 set Procedure byte (inverse-reverse) "
1217 "0x%.2x\n", invert_revert(dev->sbuf[1]));
1218 xoutb(invert_revert(dev->sbuf[1]), REG_NUM_BYTES(iobase));
1219 } else {
1220 DEBUGP(4, dev, "T=0 set Procedure byte 0x%.2x\n", dev->sbuf[1]);
1221 xoutb(dev->sbuf[1], REG_NUM_BYTES(iobase));
1222 }
1223
1224 DEBUGP(1, dev, "set NumSendBytes = 0x%.2x\n",
1225 (unsigned char)(nsend & 0xff));
1226 xoutb((unsigned char)(nsend & 0xff), REG_NUM_SEND(iobase));
1227
1228 DEBUGP(1, dev, "Trigger CARDMAN CONTROLLER (0x%.2x)\n",
1229 0x40
1230 | (dev->flags0 & 2 ? 0 : 4)
1231 |(dev->proto ? 0x10 : 0x08)
1232 |(nsend & 0x100) >> 8 );
1233 xoutb(0x40
1234 | (dev->flags0 & 2 ? 0 : 4)
1235 |(dev->proto ? 0x10 : 0x08)
1236 |(nsend & 0x100) >> 8,
1237 REG_FLAGS0(iobase));
1238
1239
1240 if (dev->proto == 1) {
1241 DEBUGP(4, dev, "Wait for xmit done\n");
1242 for (i = 0; i < 1000; i++) {
1243 if (inb(REG_FLAGS0(iobase)) & 0x08)
1244 break;
1245 msleep_interruptible(10);
1246 }
1247 if (i == 1000) {
1248 DEBUGP(4, dev, "timeout waiting for xmit done\n");
1249 rc = -EIO;
1250 goto release_io;
1251 }
1252 }
1253
1254
1255
1256 infolen = 0;
1257 if (dev->proto) {
1258
1259 for (i = 0; i < 6000; i++) {
1260 io_read_num_rec_bytes(iobase, &s);
1261 if (s >= 3) {
1262 infolen = inb(REG_FLAGS1(iobase));
1263 DEBUGP(4, dev, "infolen=%d\n", infolen);
1264 break;
1265 }
1266 msleep_interruptible(10);
1267 }
1268 if (i == 6000) {
1269 DEBUGP(4, dev, "timeout waiting for infoLen\n");
1270 rc = -EIO;
1271 goto release_io;
1272 }
1273 } else
1274 clear_bit(IS_PROCBYTE_PRESENT, &dev->flags);
1275
1276
1277 io_read_num_rec_bytes(iobase, &dev->rlen);
1278 for (i = 0; i < 600; i++) {
1279 if (dev->proto) {
1280 if (dev->rlen >= infolen + 4)
1281 break;
1282 }
1283 msleep_interruptible(10);
1284
1285 io_read_num_rec_bytes(iobase, &s);
1286 if (s > dev->rlen) {
1287 DEBUGP(1, dev, "NumRecBytes inc (reset timeout)\n");
1288 i = 0;
1289 dev->rlen = s;
1290 }
1291
1292
1293
1294
1295
1296
1297
1298 else if (dev->proto == 0) {
1299 if ((inb(REG_BUF_ADDR(iobase)) & 0x80)) {
1300
1301 DEBUGP(1, dev, "NoProcedure byte set\n");
1302
1303 } else {
1304
1305 DEBUGP(1, dev, "NoProcedure byte unset "
1306 "(reset timeout)\n");
1307 dev->procbyte = inb(REG_FLAGS1(iobase));
1308 DEBUGP(1, dev, "Read procedure byte 0x%.2x\n",
1309 dev->procbyte);
1310 i = 0;
1311 }
1312 if (inb(REG_FLAGS0(iobase)) & 0x08) {
1313 DEBUGP(1, dev, "T0Done flag (read reply)\n");
1314 break;
1315 }
1316 }
1317 if (dev->proto)
1318 infolen = inb(REG_FLAGS1(iobase));
1319 }
1320 if (i == 600) {
1321 DEBUGP(1, dev, "timeout waiting for numRecBytes\n");
1322 rc = -EIO;
1323 goto release_io;
1324 } else {
1325 if (dev->proto == 0) {
1326 DEBUGP(1, dev, "Wait for T0Done bit to be set\n");
1327 for (i = 0; i < 1000; i++) {
1328 if (inb(REG_FLAGS0(iobase)) & 0x08)
1329 break;
1330 msleep_interruptible(10);
1331 }
1332 if (i == 1000) {
1333 DEBUGP(1, dev, "timeout waiting for T0Done\n");
1334 rc = -EIO;
1335 goto release_io;
1336 }
1337
1338 dev->procbyte = inb(REG_FLAGS1(iobase));
1339 DEBUGP(4, dev, "Read procedure byte 0x%.2x\n",
1340 dev->procbyte);
1341
1342 io_read_num_rec_bytes(iobase, &dev->rlen);
1343 DEBUGP(4, dev, "Read NumRecBytes = %i\n", dev->rlen);
1344
1345 }
1346 }
1347
1348 dev->rpos = dev->proto ? 0 : nr == 4 ? 5 : nr > dev->rlen ? 5 : nr;
1349 DEBUGP(4, dev, "dev->rlen = %i, dev->rpos = %i, nr = %i\n",
1350 dev->rlen, dev->rpos, nr);
1351
1352release_io:
1353 DEBUGP(4, dev, "Reset SM\n");
1354 xoutb(0x80, REG_FLAGS0(iobase));
1355
1356 if (rc < 0) {
1357 DEBUGP(4, dev, "Write failed but clear T_Active\n");
1358 dev->flags1 &= 0xdf;
1359 xoutb(dev->flags1, REG_FLAGS1(iobase));
1360 }
1361
1362 clear_bit(LOCK_IO, &dev->flags);
1363 wake_up_interruptible(&dev->ioq);
1364 wake_up_interruptible(&dev->readq);
1365
1366
1367 memset((char *)dev->sbuf, 0, 512);
1368
1369
1370 DEBUGP(2, dev, "<- cmm_write\n");
1371 return rc < 0 ? rc : nr;
1372}
1373
1374static void start_monitor(struct cm4000_dev *dev)
1375{
1376 DEBUGP(3, dev, "-> start_monitor\n");
1377 if (!dev->monitor_running) {
1378 DEBUGP(5, dev, "create, init and add timer\n");
1379 timer_setup(&dev->timer, monitor_card, 0);
1380 dev->monitor_running = 1;
1381 mod_timer(&dev->timer, jiffies);
1382 } else
1383 DEBUGP(5, dev, "monitor already running\n");
1384 DEBUGP(3, dev, "<- start_monitor\n");
1385}
1386
1387static void stop_monitor(struct cm4000_dev *dev)
1388{
1389 DEBUGP(3, dev, "-> stop_monitor\n");
1390 if (dev->monitor_running) {
1391 DEBUGP(5, dev, "stopping monitor\n");
1392 terminate_monitor(dev);
1393
1394 clear_bit(IS_ATR_VALID, &dev->flags);
1395 clear_bit(IS_ATR_PRESENT, &dev->flags);
1396 } else
1397 DEBUGP(5, dev, "monitor already stopped\n");
1398 DEBUGP(3, dev, "<- stop_monitor\n");
1399}
1400
1401static long cmm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1402{
1403 struct cm4000_dev *dev = filp->private_data;
1404 unsigned int iobase = dev->p_dev->resource[0]->start;
1405 struct inode *inode = file_inode(filp);
1406 struct pcmcia_device *link;
1407 int rc;
1408 void __user *argp = (void __user *)arg;
1409#ifdef CM4000_DEBUG
1410 char *ioctl_names[CM_IOC_MAXNR + 1] = {
1411 [_IOC_NR(CM_IOCGSTATUS)] "CM_IOCGSTATUS",
1412 [_IOC_NR(CM_IOCGATR)] "CM_IOCGATR",
1413 [_IOC_NR(CM_IOCARDOFF)] "CM_IOCARDOFF",
1414 [_IOC_NR(CM_IOCSPTS)] "CM_IOCSPTS",
1415 [_IOC_NR(CM_IOSDBGLVL)] "CM4000_DBGLVL",
1416 };
1417 DEBUGP(3, dev, "cmm_ioctl(device=%d.%d) %s\n", imajor(inode),
1418 iminor(inode), ioctl_names[_IOC_NR(cmd)]);
1419#endif
1420
1421 mutex_lock(&cmm_mutex);
1422 rc = -ENODEV;
1423 link = dev_table[iminor(inode)];
1424 if (!pcmcia_dev_present(link)) {
1425 DEBUGP(4, dev, "DEV_OK false\n");
1426 goto out;
1427 }
1428
1429 if (test_bit(IS_CMM_ABSENT, &dev->flags)) {
1430 DEBUGP(4, dev, "CMM_ABSENT flag set\n");
1431 goto out;
1432 }
1433 rc = -EINVAL;
1434
1435 if (_IOC_TYPE(cmd) != CM_IOC_MAGIC) {
1436 DEBUGP(4, dev, "ioctype mismatch\n");
1437 goto out;
1438 }
1439 if (_IOC_NR(cmd) > CM_IOC_MAXNR) {
1440 DEBUGP(4, dev, "iocnr mismatch\n");
1441 goto out;
1442 }
1443 rc = 0;
1444
1445 switch (cmd) {
1446 case CM_IOCGSTATUS:
1447 DEBUGP(4, dev, " ... in CM_IOCGSTATUS\n");
1448 {
1449 int status;
1450
1451
1452
1453 status = dev->flags0 & 3;
1454 if (test_bit(IS_ATR_PRESENT, &dev->flags))
1455 status |= CM_ATR_PRESENT;
1456 if (test_bit(IS_ATR_VALID, &dev->flags))
1457 status |= CM_ATR_VALID;
1458 if (test_bit(IS_CMM_ABSENT, &dev->flags))
1459 status |= CM_NO_READER;
1460 if (test_bit(IS_BAD_CARD, &dev->flags))
1461 status |= CM_BAD_CARD;
1462 if (copy_to_user(argp, &status, sizeof(int)))
1463 rc = -EFAULT;
1464 }
1465 break;
1466 case CM_IOCGATR:
1467 DEBUGP(4, dev, "... in CM_IOCGATR\n");
1468 {
1469 struct atreq __user *atreq = argp;
1470 int tmp;
1471
1472 if (wait_event_interruptible
1473 (dev->atrq,
1474 ((filp->f_flags & O_NONBLOCK)
1475 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
1476 != 0)))) {
1477 if (filp->f_flags & O_NONBLOCK)
1478 rc = -EAGAIN;
1479 else
1480 rc = -ERESTARTSYS;
1481 break;
1482 }
1483
1484 rc = -EFAULT;
1485 if (test_bit(IS_ATR_VALID, &dev->flags) == 0) {
1486 tmp = -1;
1487 if (copy_to_user(&(atreq->atr_len), &tmp,
1488 sizeof(int)))
1489 break;
1490 } else {
1491 if (copy_to_user(atreq->atr, dev->atr,
1492 dev->atr_len))
1493 break;
1494
1495 tmp = dev->atr_len;
1496 if (copy_to_user(&(atreq->atr_len), &tmp, sizeof(int)))
1497 break;
1498 }
1499 rc = 0;
1500 break;
1501 }
1502 case CM_IOCARDOFF:
1503
1504#ifdef CM4000_DEBUG
1505 DEBUGP(4, dev, "... in CM_IOCARDOFF\n");
1506 if (dev->flags0 & 0x01) {
1507 DEBUGP(4, dev, " Card inserted\n");
1508 } else {
1509 DEBUGP(2, dev, " No card inserted\n");
1510 }
1511 if (dev->flags0 & 0x02) {
1512 DEBUGP(4, dev, " Card powered\n");
1513 } else {
1514 DEBUGP(2, dev, " Card not powered\n");
1515 }
1516#endif
1517
1518
1519 if ((dev->flags0 & 0x01) && (dev->flags0 & 0x02)) {
1520
1521
1522 if (wait_event_interruptible
1523 (dev->ioq,
1524 ((filp->f_flags & O_NONBLOCK)
1525 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
1526 == 0)))) {
1527 if (filp->f_flags & O_NONBLOCK)
1528 rc = -EAGAIN;
1529 else
1530 rc = -ERESTARTSYS;
1531 break;
1532 }
1533
1534 DEBUGP(4, dev, "Set Flags0=0x42 \n");
1535 xoutb(0x42, REG_FLAGS0(iobase));
1536 clear_bit(IS_ATR_PRESENT, &dev->flags);
1537 clear_bit(IS_ATR_VALID, &dev->flags);
1538 dev->mstate = M_CARDOFF;
1539 clear_bit(LOCK_IO, &dev->flags);
1540 if (wait_event_interruptible
1541 (dev->atrq,
1542 ((filp->f_flags & O_NONBLOCK)
1543 || (test_bit(IS_ATR_VALID, (void *)&dev->flags) !=
1544 0)))) {
1545 if (filp->f_flags & O_NONBLOCK)
1546 rc = -EAGAIN;
1547 else
1548 rc = -ERESTARTSYS;
1549 break;
1550 }
1551 }
1552
1553 clear_bit(LOCK_IO, &dev->flags);
1554 wake_up_interruptible(&dev->ioq);
1555
1556 rc = 0;
1557 break;
1558 case CM_IOCSPTS:
1559 {
1560 struct ptsreq krnptsreq;
1561
1562 if (copy_from_user(&krnptsreq, argp,
1563 sizeof(struct ptsreq))) {
1564 rc = -EFAULT;
1565 break;
1566 }
1567
1568 rc = 0;
1569 DEBUGP(4, dev, "... in CM_IOCSPTS\n");
1570
1571 if (wait_event_interruptible
1572 (dev->atrq,
1573 ((filp->f_flags & O_NONBLOCK)
1574 || (test_bit(IS_ATR_PRESENT, (void *)&dev->flags)
1575 != 0)))) {
1576 if (filp->f_flags & O_NONBLOCK)
1577 rc = -EAGAIN;
1578 else
1579 rc = -ERESTARTSYS;
1580 break;
1581 }
1582
1583 if (wait_event_interruptible
1584 (dev->ioq,
1585 ((filp->f_flags & O_NONBLOCK)
1586 || (test_and_set_bit(LOCK_IO, (void *)&dev->flags)
1587 == 0)))) {
1588 if (filp->f_flags & O_NONBLOCK)
1589 rc = -EAGAIN;
1590 else
1591 rc = -ERESTARTSYS;
1592 break;
1593 }
1594
1595 if ((rc = set_protocol(dev, &krnptsreq)) != 0) {
1596
1597 dev->mstate = M_FETCH_ATR;
1598 clear_bit(IS_ATR_VALID, &dev->flags);
1599 }
1600
1601 clear_bit(LOCK_IO, &dev->flags);
1602 wake_up_interruptible(&dev->ioq);
1603
1604 }
1605 break;
1606#ifdef CM4000_DEBUG
1607 case CM_IOSDBGLVL:
1608 rc = -ENOTTY;
1609 break;
1610#endif
1611 default:
1612 DEBUGP(4, dev, "... in default (unknown IOCTL code)\n");
1613 rc = -ENOTTY;
1614 }
1615out:
1616 mutex_unlock(&cmm_mutex);
1617 return rc;
1618}
1619
1620static int cmm_open(struct inode *inode, struct file *filp)
1621{
1622 struct cm4000_dev *dev;
1623 struct pcmcia_device *link;
1624 int minor = iminor(inode);
1625 int ret;
1626
1627 if (minor >= CM4000_MAX_DEV)
1628 return -ENODEV;
1629
1630 mutex_lock(&cmm_mutex);
1631 link = dev_table[minor];
1632 if (link == NULL || !pcmcia_dev_present(link)) {
1633 ret = -ENODEV;
1634 goto out;
1635 }
1636
1637 if (link->open) {
1638 ret = -EBUSY;
1639 goto out;
1640 }
1641
1642 dev = link->priv;
1643 filp->private_data = dev;
1644
1645 DEBUGP(2, dev, "-> cmm_open(device=%d.%d process=%s,%d)\n",
1646 imajor(inode), minor, current->comm, current->pid);
1647
1648
1649
1650
1651
1652 ZERO_DEV(dev);
1653
1654
1655
1656
1657
1658
1659
1660 if (filp->f_flags & O_NONBLOCK) {
1661 ret = -EAGAIN;
1662 goto out;
1663 }
1664
1665 dev->mdelay = T_50MSEC;
1666
1667
1668 start_monitor(dev);
1669
1670 link->open = 1;
1671
1672 DEBUGP(2, dev, "<- cmm_open\n");
1673 ret = stream_open(inode, filp);
1674out:
1675 mutex_unlock(&cmm_mutex);
1676 return ret;
1677}
1678
1679static int cmm_close(struct inode *inode, struct file *filp)
1680{
1681 struct cm4000_dev *dev;
1682 struct pcmcia_device *link;
1683 int minor = iminor(inode);
1684
1685 if (minor >= CM4000_MAX_DEV)
1686 return -ENODEV;
1687
1688 link = dev_table[minor];
1689 if (link == NULL)
1690 return -ENODEV;
1691
1692 dev = link->priv;
1693
1694 DEBUGP(2, dev, "-> cmm_close(maj/min=%d.%d)\n",
1695 imajor(inode), minor);
1696
1697 stop_monitor(dev);
1698
1699 ZERO_DEV(dev);
1700
1701 link->open = 0;
1702 wake_up(&dev->devq);
1703
1704 DEBUGP(2, dev, "cmm_close\n");
1705 return 0;
1706}
1707
1708static void cmm_cm4000_release(struct pcmcia_device * link)
1709{
1710 struct cm4000_dev *dev = link->priv;
1711
1712
1713
1714
1715 DEBUGP(3, dev, "-> cmm_cm4000_release\n");
1716 while (link->open) {
1717 printk(KERN_INFO MODULE_NAME ": delaying release until "
1718 "process has terminated\n");
1719
1720
1721
1722
1723 wait_event(dev->devq, (link->open == 0));
1724 }
1725
1726 DEBUGP(3, dev, "<- cmm_cm4000_release\n");
1727 return;
1728}
1729
1730
1731
1732static int cm4000_config_check(struct pcmcia_device *p_dev, void *priv_data)
1733{
1734 return pcmcia_request_io(p_dev);
1735}
1736
1737static int cm4000_config(struct pcmcia_device * link, int devno)
1738{
1739 link->config_flags |= CONF_AUTO_SET_IO;
1740
1741
1742 if (pcmcia_loop_config(link, cm4000_config_check, NULL))
1743 goto cs_release;
1744
1745 if (pcmcia_enable_device(link))
1746 goto cs_release;
1747
1748 return 0;
1749
1750cs_release:
1751 cm4000_release(link);
1752 return -ENODEV;
1753}
1754
1755static int cm4000_suspend(struct pcmcia_device *link)
1756{
1757 struct cm4000_dev *dev;
1758
1759 dev = link->priv;
1760 stop_monitor(dev);
1761
1762 return 0;
1763}
1764
1765static int cm4000_resume(struct pcmcia_device *link)
1766{
1767 struct cm4000_dev *dev;
1768
1769 dev = link->priv;
1770 if (link->open)
1771 start_monitor(dev);
1772
1773 return 0;
1774}
1775
1776static void cm4000_release(struct pcmcia_device *link)
1777{
1778 cmm_cm4000_release(link);
1779 pcmcia_disable_device(link);
1780}
1781
1782static int cm4000_probe(struct pcmcia_device *link)
1783{
1784 struct cm4000_dev *dev;
1785 int i, ret;
1786
1787 for (i = 0; i < CM4000_MAX_DEV; i++)
1788 if (dev_table[i] == NULL)
1789 break;
1790
1791 if (i == CM4000_MAX_DEV) {
1792 printk(KERN_NOTICE MODULE_NAME ": all devices in use\n");
1793 return -ENODEV;
1794 }
1795
1796
1797 dev = kzalloc(sizeof(struct cm4000_dev), GFP_KERNEL);
1798 if (dev == NULL)
1799 return -ENOMEM;
1800
1801 dev->p_dev = link;
1802 link->priv = dev;
1803 dev_table[i] = link;
1804
1805 init_waitqueue_head(&dev->devq);
1806 init_waitqueue_head(&dev->ioq);
1807 init_waitqueue_head(&dev->atrq);
1808 init_waitqueue_head(&dev->readq);
1809
1810 ret = cm4000_config(link, i);
1811 if (ret) {
1812 dev_table[i] = NULL;
1813 kfree(dev);
1814 return ret;
1815 }
1816
1817 device_create(cmm_class, NULL, MKDEV(major, i), NULL, "cmm%d", i);
1818
1819 return 0;
1820}
1821
1822static void cm4000_detach(struct pcmcia_device *link)
1823{
1824 struct cm4000_dev *dev = link->priv;
1825 int devno;
1826
1827
1828 for (devno = 0; devno < CM4000_MAX_DEV; devno++)
1829 if (dev_table[devno] == link)
1830 break;
1831 if (devno == CM4000_MAX_DEV)
1832 return;
1833
1834 stop_monitor(dev);
1835
1836 cm4000_release(link);
1837
1838 dev_table[devno] = NULL;
1839 kfree(dev);
1840
1841 device_destroy(cmm_class, MKDEV(major, devno));
1842
1843 return;
1844}
1845
1846static const struct file_operations cm4000_fops = {
1847 .owner = THIS_MODULE,
1848 .read = cmm_read,
1849 .write = cmm_write,
1850 .unlocked_ioctl = cmm_ioctl,
1851 .open = cmm_open,
1852 .release= cmm_close,
1853 .llseek = no_llseek,
1854};
1855
1856static const struct pcmcia_device_id cm4000_ids[] = {
1857 PCMCIA_DEVICE_MANF_CARD(0x0223, 0x0002),
1858 PCMCIA_DEVICE_PROD_ID12("CardMan", "4000", 0x2FB368CA, 0xA2BD8C39),
1859 PCMCIA_DEVICE_NULL,
1860};
1861MODULE_DEVICE_TABLE(pcmcia, cm4000_ids);
1862
1863static struct pcmcia_driver cm4000_driver = {
1864 .owner = THIS_MODULE,
1865 .name = "cm4000_cs",
1866 .probe = cm4000_probe,
1867 .remove = cm4000_detach,
1868 .suspend = cm4000_suspend,
1869 .resume = cm4000_resume,
1870 .id_table = cm4000_ids,
1871};
1872
1873static int __init cmm_init(void)
1874{
1875 int rc;
1876
1877 cmm_class = class_create(THIS_MODULE, "cardman_4000");
1878 if (IS_ERR(cmm_class))
1879 return PTR_ERR(cmm_class);
1880
1881 major = register_chrdev(0, DEVICE_NAME, &cm4000_fops);
1882 if (major < 0) {
1883 printk(KERN_WARNING MODULE_NAME
1884 ": could not get major number\n");
1885 class_destroy(cmm_class);
1886 return major;
1887 }
1888
1889 rc = pcmcia_register_driver(&cm4000_driver);
1890 if (rc < 0) {
1891 unregister_chrdev(major, DEVICE_NAME);
1892 class_destroy(cmm_class);
1893 return rc;
1894 }
1895
1896 return 0;
1897}
1898
1899static void __exit cmm_exit(void)
1900{
1901 pcmcia_unregister_driver(&cm4000_driver);
1902 unregister_chrdev(major, DEVICE_NAME);
1903 class_destroy(cmm_class);
1904};
1905
1906module_init(cmm_init);
1907module_exit(cmm_exit);
1908MODULE_LICENSE("Dual BSD/GPL");
1909