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8#include <linux/bitops.h>
9#include <linux/gpio/driver.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/mutex.h>
13#include <linux/of_device.h>
14#include <linux/of_gpio.h>
15#include <linux/seq_file.h>
16#include <linux/spi/spi.h>
17#include <linux/regmap.h>
18
19
20#define XRA_GSR 0x00
21#define XRA_OCR 0x02
22#define XRA_PIR 0x04
23#define XRA_GCR 0x06
24#define XRA_PUR 0x08
25#define XRA_IER 0x0A
26#define XRA_TSCR 0x0C
27#define XRA_ISR 0x0E
28#define XRA_REIR 0x10
29#define XRA_FEIR 0x12
30#define XRA_IFR 0x14
31#define XRA_LAST 0x15
32
33struct xra1403 {
34 struct gpio_chip chip;
35 struct regmap *regmap;
36};
37
38static const struct regmap_config xra1403_regmap_cfg = {
39 .reg_bits = 7,
40 .pad_bits = 1,
41 .val_bits = 8,
42
43 .max_register = XRA_LAST,
44};
45
46static unsigned int to_reg(unsigned int reg, unsigned int offset)
47{
48 return reg + (offset > 7);
49}
50
51static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
52{
53 struct xra1403 *xra = gpiochip_get_data(chip);
54
55 return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
56 BIT(offset % 8), BIT(offset % 8));
57}
58
59static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
60 int value)
61{
62 int ret;
63 struct xra1403 *xra = gpiochip_get_data(chip);
64
65 ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
66 BIT(offset % 8), 0);
67 if (ret)
68 return ret;
69
70 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
71 BIT(offset % 8), value ? BIT(offset % 8) : 0);
72
73 return ret;
74}
75
76static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
77{
78 int ret;
79 unsigned int val;
80 struct xra1403 *xra = gpiochip_get_data(chip);
81
82 ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
83 if (ret)
84 return ret;
85
86 if (val & BIT(offset % 8))
87 return GPIO_LINE_DIRECTION_IN;
88
89 return GPIO_LINE_DIRECTION_OUT;
90}
91
92static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
93{
94 int ret;
95 unsigned int val;
96 struct xra1403 *xra = gpiochip_get_data(chip);
97
98 ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
99 if (ret)
100 return ret;
101
102 return !!(val & BIT(offset % 8));
103}
104
105static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
106{
107 int ret;
108 struct xra1403 *xra = gpiochip_get_data(chip);
109
110 ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
111 BIT(offset % 8), value ? BIT(offset % 8) : 0);
112 if (ret)
113 dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
114 offset, ret);
115}
116
117#ifdef CONFIG_DEBUG_FS
118static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
119{
120 int reg;
121 struct xra1403 *xra = gpiochip_get_data(chip);
122 int value[XRA_LAST];
123 int i;
124 unsigned int gcr;
125 unsigned int gsr;
126
127 seq_puts(s, "xra reg:");
128 for (reg = 0; reg <= XRA_LAST; reg++)
129 seq_printf(s, " %2.2x", reg);
130 seq_puts(s, "\n value:");
131 for (reg = 0; reg < XRA_LAST; reg++) {
132 regmap_read(xra->regmap, reg, &value[reg]);
133 seq_printf(s, " %2.2x", value[reg]);
134 }
135 seq_puts(s, "\n");
136
137 gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
138 gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
139 for (i = 0; i < chip->ngpio; i++) {
140 const char *label = gpiochip_is_requested(chip, i);
141
142 if (!label)
143 continue;
144
145 seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
146 chip->base + i, label,
147 (gcr & BIT(i)) ? "in" : "out",
148 (gsr & BIT(i)) ? "hi" : "lo");
149 }
150}
151#else
152#define xra1403_dbg_show NULL
153#endif
154
155static int xra1403_probe(struct spi_device *spi)
156{
157 struct xra1403 *xra;
158 struct gpio_desc *reset_gpio;
159 int ret;
160
161 xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
162 if (!xra)
163 return -ENOMEM;
164
165
166 reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
167 if (IS_ERR(reset_gpio))
168 dev_warn(&spi->dev, "Could not get reset-gpios\n");
169
170 xra->chip.direction_input = xra1403_direction_input;
171 xra->chip.direction_output = xra1403_direction_output;
172 xra->chip.get_direction = xra1403_get_direction;
173 xra->chip.get = xra1403_get;
174 xra->chip.set = xra1403_set;
175
176 xra->chip.dbg_show = xra1403_dbg_show;
177
178 xra->chip.ngpio = 16;
179 xra->chip.label = "xra1403";
180
181 xra->chip.base = -1;
182 xra->chip.can_sleep = true;
183 xra->chip.parent = &spi->dev;
184 xra->chip.owner = THIS_MODULE;
185
186 xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
187 if (IS_ERR(xra->regmap)) {
188 ret = PTR_ERR(xra->regmap);
189 dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
190 return ret;
191 }
192
193 ret = devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
194 if (ret < 0) {
195 dev_err(&spi->dev, "Unable to register gpiochip\n");
196 return ret;
197 }
198
199 spi_set_drvdata(spi, xra);
200
201 return 0;
202}
203
204static const struct spi_device_id xra1403_ids[] = {
205 { "xra1403" },
206 {},
207};
208MODULE_DEVICE_TABLE(spi, xra1403_ids);
209
210static const struct of_device_id xra1403_spi_of_match[] = {
211 { .compatible = "exar,xra1403" },
212 {},
213};
214MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
215
216static struct spi_driver xra1403_driver = {
217 .probe = xra1403_probe,
218 .id_table = xra1403_ids,
219 .driver = {
220 .name = "xra1403",
221 .of_match_table = of_match_ptr(xra1403_spi_of_match),
222 },
223};
224
225module_spi_driver(xra1403_driver);
226
227MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
228MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
229MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
230MODULE_LICENSE("GPL v2");
231