LXR linux/drivers/gpu/drm/amd/display/dc/inc/hw

   1/*
   2 * Copyright 2015 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#ifndef __DC_HW_SEQUENCER_H__
  27#define __DC_HW_SEQUENCER_H__
  28#include "dc_types.h"
  29#include "clock_source.h"
  30#include "inc/hw/timing_generator.h"
  31#include "inc/hw/opp.h"
  32#include "inc/hw/link_encoder.h"
  33#include "core_status.h"
  34
  35enum vline_select {
  36        VLINE0,
  37        VLINE1
  38};
  39
  40struct pipe_ctx;
  41struct dc_state;
  42struct dc_stream_status;
  43struct dc_writeback_info;
  44struct dchub_init_data;
  45struct dc_static_screen_params;
  46struct resource_pool;
  47struct dc_phy_addr_space_config;
  48struct dc_virtual_addr_space_config;
  49struct dpp;
  50struct dce_hwseq;
  51
  52struct hw_sequencer_funcs {
  53        /* Embedded Display Related */
  54        void (*edp_power_control)(struct dc_link *link, bool enable);
  55        void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
  56
  57        /* Pipe Programming Related */
  58        void (*init_hw)(struct dc *dc);
  59        void (*enable_accelerated_mode)(struct dc *dc,
  60                        struct dc_state *context);
  61        enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
  62                        struct dc_state *context);
  63        void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
  64        void (*apply_ctx_for_surface)(struct dc *dc,
  65                        const struct dc_stream_state *stream,
  66                        int num_planes, struct dc_state *context);
  67        void (*program_front_end_for_ctx)(struct dc *dc,
  68                        struct dc_state *context);
  69        void (*post_unlock_program_front_end)(struct dc *dc,
  70                        struct dc_state *context);
  71        void (*update_plane_addr)(const struct dc *dc,
  72                        struct pipe_ctx *pipe_ctx);
  73        void (*update_dchub)(struct dce_hwseq *hws,
  74                        struct dchub_init_data *dh_data);
  75        void (*wait_for_mpcc_disconnect)(struct dc *dc,
  76                        struct resource_pool *res_pool,
  77                        struct pipe_ctx *pipe_ctx);
  78        void (*edp_backlight_control)(
  79                        struct dc_link *link,
  80                        bool enable);
  81        void (*program_triplebuffer)(const struct dc *dc,
  82                struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
  83        void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
  84        void (*power_down)(struct dc *dc);
  85
  86        /* Pipe Lock Related */
  87        void (*pipe_control_lock)(struct dc *dc,
  88                        struct pipe_ctx *pipe, bool lock);
  89        void (*interdependent_update_lock)(struct dc *dc,
  90                        struct dc_state *context, bool lock);
  91        void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
  92                        bool flip_immediate);
  93        void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);
  94
  95        /* Timing Related */
  96        void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
  97                        struct crtc_position *position);
  98        int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx);
  99        void (*calc_vupdate_position)(
 100                        struct dc *dc,
 101                        struct pipe_ctx *pipe_ctx,
 102                        uint32_t *start_line,
 103                        uint32_t *end_line);
 104        void (*enable_per_frame_crtc_position_reset)(struct dc *dc,
 105                        int group_size, struct pipe_ctx *grouped_pipes[]);
 106        void (*enable_timing_synchronization)(struct dc *dc,
 107                        int group_index, int group_size,
 108                        struct pipe_ctx *grouped_pipes[]);
 109        void (*setup_periodic_interrupt)(struct dc *dc,
 110                        struct pipe_ctx *pipe_ctx,
 111                        enum vline_select vline);
 112        void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
 113                        unsigned int vmin, unsigned int vmax,
 114                        unsigned int vmid, unsigned int vmid_frame_number);
 115        void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
 116                        int num_pipes,
 117                        const struct dc_static_screen_params *events);
 118
 119        /* Stream Related */
 120        void (*enable_stream)(struct pipe_ctx *pipe_ctx);
 121        void (*disable_stream)(struct pipe_ctx *pipe_ctx);
 122        void (*blank_stream)(struct pipe_ctx *pipe_ctx);
 123        void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
 124                        struct dc_link_settings *link_settings);
 125
 126        /* Bandwidth Related */
 127        void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
 128        bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
 129        void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
 130
 131        /* Infopacket Related */
 132        void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
 133        void (*send_immediate_sdp_message)(
 134                        struct pipe_ctx *pipe_ctx,
 135                        const uint8_t *custom_sdp_message,
 136                        unsigned int sdp_message_size);
 137        void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
 138        void (*set_dmdata_attributes)(struct pipe_ctx *pipe);
 139        void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx);
 140        bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx);
 141
 142        /* Cursor Related */
 143        void (*set_cursor_position)(struct pipe_ctx *pipe);
 144        void (*set_cursor_attribute)(struct pipe_ctx *pipe);
 145        void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
 146
 147        /* Colour Related */
 148        void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx);
 149        void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx,
 150                        enum dc_color_space colorspace,
 151                        uint16_t *matrix, int opp_id);
 152
 153        /* VM Related */
 154        int (*init_sys_ctx)(struct dce_hwseq *hws,
 155                        struct dc *dc,
 156                        struct dc_phy_addr_space_config *pa_config);
 157        void (*init_vm_ctx)(struct dce_hwseq *hws,
 158                        struct dc *dc,
 159                        struct dc_virtual_addr_space_config *va_config,
 160                        int vmid);
 161
 162        /* Writeback Related */
 163        void (*update_writeback)(struct dc *dc,
 164                        struct dc_writeback_info *wb_info,
 165                        struct dc_state *context);
 166        void (*enable_writeback)(struct dc *dc,
 167                        struct dc_writeback_info *wb_info,
 168                        struct dc_state *context);
 169        void (*disable_writeback)(struct dc *dc,
 170                        unsigned int dwb_pipe_inst);
 171
 172        bool (*mmhubbub_warmup)(struct dc *dc,
 173                        unsigned int num_dwb,
 174                        struct dc_writeback_info *wb_info);
 175
 176        /* Clock Related */
 177        enum dc_status (*set_clock)(struct dc *dc,
 178                        enum dc_clock_type clock_type,
 179                        uint32_t clk_khz, uint32_t stepping);
 180        void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
 181                        struct dc_clock_config *clock_cfg);
 182        void (*optimize_pwr_state)(const struct dc *dc,
 183                        struct dc_state *context);
 184        void (*exit_optimized_pwr_state)(const struct dc *dc,
 185                        struct dc_state *context);
 186
 187        /* Audio Related */
 188        void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
 189        void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx);
 190
 191        /* Stereo 3D Related */
 192        void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc);
 193
 194        /* HW State Logging Related */
 195        void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx);
 196        void (*get_hw_state)(struct dc *dc, char *pBuf,
 197                        unsigned int bufSize, unsigned int mask);
 198        void (*clear_status_bits)(struct dc *dc, unsigned int mask);
 199
 200        bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx,
 201                        uint32_t backlight_pwm_u16_16,
 202                        uint32_t frame_ramp);
 203
 204        void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx);
 205
 206
 207};
 208
 209void color_space_to_black_color(
 210        const struct dc *dc,
 211        enum dc_color_space colorspace,
 212        struct tg_color *black_color);
 213
 214bool hwss_wait_for_blank_complete(
 215                struct timing_generator *tg);
 216
 217const uint16_t *find_color_matrix(
 218                enum dc_color_space color_space,
 219                uint32_t *array_size);
 220
 221#endif /* __DC_HW_SEQUENCER_H__ */
 222