LXR linux/drivers/gpu/drm/i915/gt/uc/intel_guc

   1/* SPDX-License-Identifier: MIT */
   2/*
   3 * Copyright © 2014-2019 Intel Corporation
   4 */
   5
   6#ifndef _INTEL_GUC_LOG_H_
   7#define _INTEL_GUC_LOG_H_
   8
   9#include <linux/mutex.h>
  10#include <linux/relay.h>
  11#include <linux/workqueue.h>
  12
  13#include "intel_guc_fwif.h"
  14#include "i915_gem.h"
  15
  16struct intel_guc;
  17
  18#ifdef CONFIG_DRM_I915_DEBUG_GUC
  19#define CRASH_BUFFER_SIZE       SZ_2M
  20#define DPC_BUFFER_SIZE         SZ_8M
  21#define ISR_BUFFER_SIZE         SZ_8M
  22#else
  23#define CRASH_BUFFER_SIZE       SZ_8K
  24#define DPC_BUFFER_SIZE         SZ_32K
  25#define ISR_BUFFER_SIZE         SZ_32K
  26#endif
  27
  28/*
  29 * While we're using plain log level in i915, GuC controls are much more...
  30 * "elaborate"? We have a couple of bits for verbosity, separate bit for actual
  31 * log enabling, and separate bit for default logging - which "conveniently"
  32 * ignores the enable bit.
  33 */
  34#define GUC_LOG_LEVEL_DISABLED          0
  35#define GUC_LOG_LEVEL_NON_VERBOSE       1
  36#define GUC_LOG_LEVEL_IS_ENABLED(x)     ((x) > GUC_LOG_LEVEL_DISABLED)
  37#define GUC_LOG_LEVEL_IS_VERBOSE(x)     ((x) > GUC_LOG_LEVEL_NON_VERBOSE)
  38#define GUC_LOG_LEVEL_TO_VERBOSITY(x) ({                \
  39        typeof(x) _x = (x);                             \
  40        GUC_LOG_LEVEL_IS_VERBOSE(_x) ? _x - 2 : 0;      \
  41})
  42#define GUC_VERBOSITY_TO_LOG_LEVEL(x)   ((x) + 2)
  43#define GUC_LOG_LEVEL_MAX GUC_VERBOSITY_TO_LOG_LEVEL(GUC_LOG_VERBOSITY_MAX)
  44
  45struct intel_guc_log {
  46        u32 level;
  47        struct i915_vma *vma;
  48        struct {
  49                void *buf_addr;
  50                bool started;
  51                struct work_struct flush_work;
  52                struct rchan *channel;
  53                struct mutex lock;
  54                u32 full_count;
  55        } relay;
  56        /* logging related stats */
  57        struct {
  58                u32 sampled_overflow;
  59                u32 overflow;
  60                u32 flush;
  61        } stats[GUC_MAX_LOG_BUFFER];
  62};
  63
  64void intel_guc_log_init_early(struct intel_guc_log *log);
  65int intel_guc_log_create(struct intel_guc_log *log);
  66void intel_guc_log_destroy(struct intel_guc_log *log);
  67
  68int intel_guc_log_set_level(struct intel_guc_log *log, u32 level);
  69bool intel_guc_log_relay_created(const struct intel_guc_log *log);
  70int intel_guc_log_relay_open(struct intel_guc_log *log);
  71int intel_guc_log_relay_start(struct intel_guc_log *log);
  72void intel_guc_log_relay_flush(struct intel_guc_log *log);
  73void intel_guc_log_relay_close(struct intel_guc_log *log);
  74
  75void intel_guc_log_handle_flush_event(struct intel_guc_log *log);
  76
  77static inline u32 intel_guc_log_get_level(struct intel_guc_log *log)
  78{
  79        return log->level;
  80}
  81
  82void intel_guc_log_info(struct intel_guc_log *log, struct drm_printer *p);
  83int intel_guc_log_dump(struct intel_guc_log *log, struct drm_printer *p,
  84                       bool dump_load_err);
  85
  86#endif
  87