linux/drivers/gpu/host1x/hw/debug_hw.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) 2010 Google, Inc.
   4 * Author: Erik Gilling <konkers@android.com>
   5 *
   6 * Copyright (C) 2011-2013 NVIDIA Corporation
   7 */
   8
   9#include "../dev.h"
  10#include "../debug.h"
  11#include "../cdma.h"
  12#include "../channel.h"
  13
  14#define HOST1X_DEBUG_MAX_PAGE_OFFSET 102400
  15
  16enum {
  17        HOST1X_OPCODE_SETCLASS  = 0x00,
  18        HOST1X_OPCODE_INCR      = 0x01,
  19        HOST1X_OPCODE_NONINCR   = 0x02,
  20        HOST1X_OPCODE_MASK      = 0x03,
  21        HOST1X_OPCODE_IMM       = 0x04,
  22        HOST1X_OPCODE_RESTART   = 0x05,
  23        HOST1X_OPCODE_GATHER    = 0x06,
  24        HOST1X_OPCODE_SETSTRMID = 0x07,
  25        HOST1X_OPCODE_SETAPPID  = 0x08,
  26        HOST1X_OPCODE_SETPYLD   = 0x09,
  27        HOST1X_OPCODE_INCR_W    = 0x0a,
  28        HOST1X_OPCODE_NONINCR_W = 0x0b,
  29        HOST1X_OPCODE_GATHER_W  = 0x0c,
  30        HOST1X_OPCODE_RESTART_W = 0x0d,
  31        HOST1X_OPCODE_EXTEND    = 0x0e,
  32};
  33
  34enum {
  35        HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK      = 0x00,
  36        HOST1X_OPCODE_EXTEND_RELEASE_MLOCK      = 0x01,
  37};
  38
  39#define INVALID_PAYLOAD                         0xffffffff
  40
  41static unsigned int show_channel_command(struct output *o, u32 val,
  42                                         u32 *payload)
  43{
  44        unsigned int mask, subop, num, opcode;
  45
  46        opcode = val >> 28;
  47
  48        switch (opcode) {
  49        case HOST1X_OPCODE_SETCLASS:
  50                mask = val & 0x3f;
  51                if (mask) {
  52                        host1x_debug_cont(o, "SETCL(class=%03x, offset=%03x, mask=%02x, [",
  53                                            val >> 6 & 0x3ff,
  54                                            val >> 16 & 0xfff, mask);
  55                        return hweight8(mask);
  56                }
  57
  58                host1x_debug_cont(o, "SETCL(class=%03x)\n", val >> 6 & 0x3ff);
  59                return 0;
  60
  61        case HOST1X_OPCODE_INCR:
  62                num = val & 0xffff;
  63                host1x_debug_cont(o, "INCR(offset=%03x, [",
  64                                    val >> 16 & 0xfff);
  65                if (!num)
  66                        host1x_debug_cont(o, "])\n");
  67
  68                return num;
  69
  70        case HOST1X_OPCODE_NONINCR:
  71                num = val & 0xffff;
  72                host1x_debug_cont(o, "NONINCR(offset=%03x, [",
  73                                    val >> 16 & 0xfff);
  74                if (!num)
  75                        host1x_debug_cont(o, "])\n");
  76
  77                return num;
  78
  79        case HOST1X_OPCODE_MASK:
  80                mask = val & 0xffff;
  81                host1x_debug_cont(o, "MASK(offset=%03x, mask=%03x, [",
  82                                    val >> 16 & 0xfff, mask);
  83                if (!mask)
  84                        host1x_debug_cont(o, "])\n");
  85
  86                return hweight16(mask);
  87
  88        case HOST1X_OPCODE_IMM:
  89                host1x_debug_cont(o, "IMM(offset=%03x, data=%03x)\n",
  90                                    val >> 16 & 0xfff, val & 0xffff);
  91                return 0;
  92
  93        case HOST1X_OPCODE_RESTART:
  94                host1x_debug_cont(o, "RESTART(offset=%08x)\n", val << 4);
  95                return 0;
  96
  97        case HOST1X_OPCODE_GATHER:
  98                host1x_debug_cont(o, "GATHER(offset=%03x, insert=%d, type=%d, count=%04x, addr=[",
  99                                    val >> 16 & 0xfff, val >> 15 & 0x1,
 100                                    val >> 14 & 0x1, val & 0x3fff);
 101                return 1;
 102
 103#if HOST1X_HW >= 6
 104        case HOST1X_OPCODE_SETSTRMID:
 105                host1x_debug_cont(o, "SETSTRMID(offset=%06x)\n",
 106                                  val & 0x3fffff);
 107                return 0;
 108
 109        case HOST1X_OPCODE_SETAPPID:
 110                host1x_debug_cont(o, "SETAPPID(appid=%02x)\n", val & 0xff);
 111                return 0;
 112
 113        case HOST1X_OPCODE_SETPYLD:
 114                *payload = val & 0xffff;
 115                host1x_debug_cont(o, "SETPYLD(data=%04x)\n", *payload);
 116                return 0;
 117
 118        case HOST1X_OPCODE_INCR_W:
 119        case HOST1X_OPCODE_NONINCR_W:
 120                host1x_debug_cont(o, "%s(offset=%06x, ",
 121                                  opcode == HOST1X_OPCODE_INCR_W ?
 122                                        "INCR_W" : "NONINCR_W",
 123                                  val & 0x3fffff);
 124                if (*payload == 0) {
 125                        host1x_debug_cont(o, "[])\n");
 126                        return 0;
 127                } else if (*payload == INVALID_PAYLOAD) {
 128                        host1x_debug_cont(o, "unknown)\n");
 129                        return 0;
 130                } else {
 131                        host1x_debug_cont(o, "[");
 132                        return *payload;
 133                }
 134
 135        case HOST1X_OPCODE_GATHER_W:
 136                host1x_debug_cont(o, "GATHER_W(count=%04x, addr=[",
 137                                  val & 0x3fff);
 138                return 2;
 139#endif
 140
 141        case HOST1X_OPCODE_EXTEND:
 142                subop = val >> 24 & 0xf;
 143                if (subop == HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK)
 144                        host1x_debug_cont(o, "ACQUIRE_MLOCK(index=%d)\n",
 145                                            val & 0xff);
 146                else if (subop == HOST1X_OPCODE_EXTEND_RELEASE_MLOCK)
 147                        host1x_debug_cont(o, "RELEASE_MLOCK(index=%d)\n",
 148                                            val & 0xff);
 149                else
 150                        host1x_debug_cont(o, "EXTEND_UNKNOWN(%08x)\n", val);
 151                return 0;
 152
 153        default:
 154                host1x_debug_cont(o, "UNKNOWN\n");
 155                return 0;
 156        }
 157}
 158
 159static void show_gather(struct output *o, phys_addr_t phys_addr,
 160                        unsigned int words, struct host1x_cdma *cdma,
 161                        phys_addr_t pin_addr, u32 *map_addr)
 162{
 163        /* Map dmaget cursor to corresponding mem handle */
 164        u32 offset = phys_addr - pin_addr;
 165        unsigned int data_count = 0, i;
 166        u32 payload = INVALID_PAYLOAD;
 167
 168        /*
 169         * Sometimes we're given different hardware address to the same
 170         * page - in these cases the offset will get an invalid number and
 171         * we just have to bail out.
 172         */
 173        if (offset > HOST1X_DEBUG_MAX_PAGE_OFFSET) {
 174                host1x_debug_output(o, "[address mismatch]\n");
 175                return;
 176        }
 177
 178        for (i = 0; i < words; i++) {
 179                u32 addr = phys_addr + i * 4;
 180                u32 val = *(map_addr + offset / 4 + i);
 181
 182                if (!data_count) {
 183                        host1x_debug_output(o, "%08x: %08x: ", addr, val);
 184                        data_count = show_channel_command(o, val, &payload);
 185                } else {
 186                        host1x_debug_cont(o, "%08x%s", val,
 187                                            data_count > 1 ? ", " : "])\n");
 188                        data_count--;
 189                }
 190        }
 191}
 192
 193static void show_channel_gathers(struct output *o, struct host1x_cdma *cdma)
 194{
 195        struct host1x_job *job;
 196
 197        list_for_each_entry(job, &cdma->sync_queue, list) {
 198                unsigned int i;
 199
 200                host1x_debug_output(o, "\n%p: JOB, syncpt_id=%d, syncpt_val=%d, first_get=%08x, timeout=%d num_slots=%d, num_handles=%d\n",
 201                                    job, job->syncpt_id, job->syncpt_end,
 202                                    job->first_get, job->timeout,
 203                                    job->num_slots, job->num_unpins);
 204
 205                for (i = 0; i < job->num_gathers; i++) {
 206                        struct host1x_job_gather *g = &job->gathers[i];
 207                        u32 *mapped;
 208
 209                        if (job->gather_copy_mapped)
 210                                mapped = (u32 *)job->gather_copy_mapped;
 211                        else
 212                                mapped = host1x_bo_mmap(g->bo);
 213
 214                        if (!mapped) {
 215                                host1x_debug_output(o, "[could not mmap]\n");
 216                                continue;
 217                        }
 218
 219                        host1x_debug_output(o, "    GATHER at %pad+%#x, %d words\n",
 220                                            &g->base, g->offset, g->words);
 221
 222                        show_gather(o, g->base + g->offset, g->words, cdma,
 223                                    g->base, mapped);
 224
 225                        if (!job->gather_copy_mapped)
 226                                host1x_bo_munmap(g->bo, mapped);
 227                }
 228        }
 229}
 230
 231#if HOST1X_HW >= 6
 232#include "debug_hw_1x06.c"
 233#else
 234#include "debug_hw_1x01.c"
 235#endif
 236
 237static const struct host1x_debug_ops host1x_debug_ops = {
 238        .show_channel_cdma = host1x_debug_show_channel_cdma,
 239        .show_channel_fifo = host1x_debug_show_channel_fifo,
 240        .show_mlocks = host1x_debug_show_mlocks,
 241};
 242