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49#include <linux/kernel.h>
50#include <linux/module.h>
51#include <linux/delay.h>
52#include <linux/iio/events.h>
53#include <linux/iio/iio.h>
54#include <linux/iio/sysfs.h>
55#include <linux/interrupt.h>
56#include <linux/irq.h>
57#include <linux/pm.h>
58#include <linux/property.h>
59#include <linux/regmap.h>
60#include <linux/bitfield.h>
61
62#include <linux/platform_data/st_sensors_pdata.h>
63
64#include "st_lsm6dsx.h"
65
66#define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
67
68#define ST_LSM6DSX_TS_SENSITIVITY 25000UL
69
70static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
71 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
72 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
73 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
74 IIO_CHAN_SOFT_TIMESTAMP(3),
75};
76
77static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
78 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
79 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
80 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
81 IIO_CHAN_SOFT_TIMESTAMP(3),
82};
83
84static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
85 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
86 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
87 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
88 IIO_CHAN_SOFT_TIMESTAMP(3),
89};
90
91static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
92 {
93 .wai = 0x68,
94 .reset = {
95 .addr = 0x22,
96 .mask = BIT(0),
97 },
98 .boot = {
99 .addr = 0x22,
100 .mask = BIT(7),
101 },
102 .bdu = {
103 .addr = 0x22,
104 .mask = BIT(6),
105 },
106 .max_fifo_size = 32,
107 .id = {
108 {
109 .hw_id = ST_LSM9DS1_ID,
110 .name = ST_LSM9DS1_DEV_NAME,
111 }, {
112 .hw_id = ST_LSM6DS0_ID,
113 .name = ST_LSM6DS0_DEV_NAME,
114 },
115 },
116 .channels = {
117 [ST_LSM6DSX_ID_ACC] = {
118 .chan = st_lsm6dsx_acc_channels,
119 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
120 },
121 [ST_LSM6DSX_ID_GYRO] = {
122 .chan = st_lsm6ds0_gyro_channels,
123 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
124 },
125 },
126 .odr_table = {
127 [ST_LSM6DSX_ID_ACC] = {
128 .reg = {
129 .addr = 0x20,
130 .mask = GENMASK(7, 5),
131 },
132 .odr_avl[0] = { 10000, 0x01 },
133 .odr_avl[1] = { 50000, 0x02 },
134 .odr_avl[2] = { 119000, 0x03 },
135 .odr_avl[3] = { 238000, 0x04 },
136 .odr_avl[4] = { 476000, 0x05 },
137 .odr_avl[5] = { 952000, 0x06 },
138 .odr_len = 6,
139 },
140 [ST_LSM6DSX_ID_GYRO] = {
141 .reg = {
142 .addr = 0x10,
143 .mask = GENMASK(7, 5),
144 },
145 .odr_avl[0] = { 14900, 0x01 },
146 .odr_avl[1] = { 59500, 0x02 },
147 .odr_avl[2] = { 119000, 0x03 },
148 .odr_avl[3] = { 238000, 0x04 },
149 .odr_avl[4] = { 476000, 0x05 },
150 .odr_avl[5] = { 952000, 0x06 },
151 .odr_len = 6,
152 },
153 },
154 .fs_table = {
155 [ST_LSM6DSX_ID_ACC] = {
156 .reg = {
157 .addr = 0x20,
158 .mask = GENMASK(4, 3),
159 },
160 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
161 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
162 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
163 .fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 },
164 .fs_len = 4,
165 },
166 [ST_LSM6DSX_ID_GYRO] = {
167 .reg = {
168 .addr = 0x10,
169 .mask = GENMASK(4, 3),
170 },
171
172 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
173 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
174 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
175 .fs_len = 3,
176 },
177 },
178 .irq_config = {
179 .irq1 = {
180 .addr = 0x0c,
181 .mask = BIT(3),
182 },
183 .irq2 = {
184 .addr = 0x0d,
185 .mask = BIT(3),
186 },
187 .hla = {
188 .addr = 0x22,
189 .mask = BIT(5),
190 },
191 .od = {
192 .addr = 0x22,
193 .mask = BIT(4),
194 },
195 },
196 },
197 {
198 .wai = 0x69,
199 .reset = {
200 .addr = 0x12,
201 .mask = BIT(0),
202 },
203 .boot = {
204 .addr = 0x12,
205 .mask = BIT(7),
206 },
207 .bdu = {
208 .addr = 0x12,
209 .mask = BIT(6),
210 },
211 .max_fifo_size = 1365,
212 .id = {
213 {
214 .hw_id = ST_LSM6DS3_ID,
215 .name = ST_LSM6DS3_DEV_NAME,
216 },
217 },
218 .channels = {
219 [ST_LSM6DSX_ID_ACC] = {
220 .chan = st_lsm6dsx_acc_channels,
221 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
222 },
223 [ST_LSM6DSX_ID_GYRO] = {
224 .chan = st_lsm6dsx_gyro_channels,
225 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
226 },
227 },
228 .odr_table = {
229 [ST_LSM6DSX_ID_ACC] = {
230 .reg = {
231 .addr = 0x10,
232 .mask = GENMASK(7, 4),
233 },
234 .odr_avl[0] = { 12500, 0x01 },
235 .odr_avl[1] = { 26000, 0x02 },
236 .odr_avl[2] = { 52000, 0x03 },
237 .odr_avl[3] = { 104000, 0x04 },
238 .odr_avl[4] = { 208000, 0x05 },
239 .odr_avl[5] = { 416000, 0x06 },
240 .odr_len = 6,
241 },
242 [ST_LSM6DSX_ID_GYRO] = {
243 .reg = {
244 .addr = 0x11,
245 .mask = GENMASK(7, 4),
246 },
247 .odr_avl[0] = { 12500, 0x01 },
248 .odr_avl[1] = { 26000, 0x02 },
249 .odr_avl[2] = { 52000, 0x03 },
250 .odr_avl[3] = { 104000, 0x04 },
251 .odr_avl[4] = { 208000, 0x05 },
252 .odr_avl[5] = { 416000, 0x06 },
253 .odr_len = 6,
254 },
255 },
256 .fs_table = {
257 [ST_LSM6DSX_ID_ACC] = {
258 .reg = {
259 .addr = 0x10,
260 .mask = GENMASK(3, 2),
261 },
262 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
263 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
264 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
265 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
266 .fs_len = 4,
267 },
268 [ST_LSM6DSX_ID_GYRO] = {
269 .reg = {
270 .addr = 0x11,
271 .mask = GENMASK(3, 2),
272 },
273 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
274 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
275 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
276 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
277 .fs_len = 4,
278 },
279 },
280 .irq_config = {
281 .irq1 = {
282 .addr = 0x0d,
283 .mask = BIT(3),
284 },
285 .irq2 = {
286 .addr = 0x0e,
287 .mask = BIT(3),
288 },
289 .lir = {
290 .addr = 0x58,
291 .mask = BIT(0),
292 },
293 .irq1_func = {
294 .addr = 0x5e,
295 .mask = BIT(5),
296 },
297 .irq2_func = {
298 .addr = 0x5f,
299 .mask = BIT(5),
300 },
301 .hla = {
302 .addr = 0x12,
303 .mask = BIT(5),
304 },
305 .od = {
306 .addr = 0x12,
307 .mask = BIT(4),
308 },
309 },
310 .decimator = {
311 [ST_LSM6DSX_ID_ACC] = {
312 .addr = 0x08,
313 .mask = GENMASK(2, 0),
314 },
315 [ST_LSM6DSX_ID_GYRO] = {
316 .addr = 0x08,
317 .mask = GENMASK(5, 3),
318 },
319 },
320 .fifo_ops = {
321 .update_fifo = st_lsm6dsx_update_fifo,
322 .read_fifo = st_lsm6dsx_read_fifo,
323 .fifo_th = {
324 .addr = 0x06,
325 .mask = GENMASK(11, 0),
326 },
327 .fifo_diff = {
328 .addr = 0x3a,
329 .mask = GENMASK(11, 0),
330 },
331 .th_wl = 3,
332 },
333 .ts_settings = {
334 .timer_en = {
335 .addr = 0x58,
336 .mask = BIT(7),
337 },
338 .hr_timer = {
339 .addr = 0x5c,
340 .mask = BIT(4),
341 },
342 .fifo_en = {
343 .addr = 0x07,
344 .mask = BIT(7),
345 },
346 .decimator = {
347 .addr = 0x09,
348 .mask = GENMASK(5, 3),
349 },
350 },
351 .event_settings = {
352 .wakeup_reg = {
353 .addr = 0x5B,
354 .mask = GENMASK(5, 0),
355 },
356 .wakeup_src_reg = 0x1b,
357 .wakeup_src_status_mask = BIT(3),
358 .wakeup_src_z_mask = BIT(0),
359 .wakeup_src_y_mask = BIT(1),
360 .wakeup_src_x_mask = BIT(2),
361 },
362 },
363 {
364 .wai = 0x69,
365 .reset = {
366 .addr = 0x12,
367 .mask = BIT(0),
368 },
369 .boot = {
370 .addr = 0x12,
371 .mask = BIT(7),
372 },
373 .bdu = {
374 .addr = 0x12,
375 .mask = BIT(6),
376 },
377 .max_fifo_size = 682,
378 .id = {
379 {
380 .hw_id = ST_LSM6DS3H_ID,
381 .name = ST_LSM6DS3H_DEV_NAME,
382 },
383 },
384 .channels = {
385 [ST_LSM6DSX_ID_ACC] = {
386 .chan = st_lsm6dsx_acc_channels,
387 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
388 },
389 [ST_LSM6DSX_ID_GYRO] = {
390 .chan = st_lsm6dsx_gyro_channels,
391 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
392 },
393 },
394 .odr_table = {
395 [ST_LSM6DSX_ID_ACC] = {
396 .reg = {
397 .addr = 0x10,
398 .mask = GENMASK(7, 4),
399 },
400 .odr_avl[0] = { 12500, 0x01 },
401 .odr_avl[1] = { 26000, 0x02 },
402 .odr_avl[2] = { 52000, 0x03 },
403 .odr_avl[3] = { 104000, 0x04 },
404 .odr_avl[4] = { 208000, 0x05 },
405 .odr_avl[5] = { 416000, 0x06 },
406 .odr_len = 6,
407 },
408 [ST_LSM6DSX_ID_GYRO] = {
409 .reg = {
410 .addr = 0x11,
411 .mask = GENMASK(7, 4),
412 },
413 .odr_avl[0] = { 12500, 0x01 },
414 .odr_avl[1] = { 26000, 0x02 },
415 .odr_avl[2] = { 52000, 0x03 },
416 .odr_avl[3] = { 104000, 0x04 },
417 .odr_avl[4] = { 208000, 0x05 },
418 .odr_avl[5] = { 416000, 0x06 },
419 .odr_len = 6,
420 },
421 },
422 .fs_table = {
423 [ST_LSM6DSX_ID_ACC] = {
424 .reg = {
425 .addr = 0x10,
426 .mask = GENMASK(3, 2),
427 },
428 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
429 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
430 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
431 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
432 .fs_len = 4,
433 },
434 [ST_LSM6DSX_ID_GYRO] = {
435 .reg = {
436 .addr = 0x11,
437 .mask = GENMASK(3, 2),
438 },
439 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
440 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
441 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
442 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
443 .fs_len = 4,
444 },
445 },
446 .irq_config = {
447 .irq1 = {
448 .addr = 0x0d,
449 .mask = BIT(3),
450 },
451 .irq2 = {
452 .addr = 0x0e,
453 .mask = BIT(3),
454 },
455 .lir = {
456 .addr = 0x58,
457 .mask = BIT(0),
458 },
459 .irq1_func = {
460 .addr = 0x5e,
461 .mask = BIT(5),
462 },
463 .irq2_func = {
464 .addr = 0x5f,
465 .mask = BIT(5),
466 },
467 .hla = {
468 .addr = 0x12,
469 .mask = BIT(5),
470 },
471 .od = {
472 .addr = 0x12,
473 .mask = BIT(4),
474 },
475 },
476 .decimator = {
477 [ST_LSM6DSX_ID_ACC] = {
478 .addr = 0x08,
479 .mask = GENMASK(2, 0),
480 },
481 [ST_LSM6DSX_ID_GYRO] = {
482 .addr = 0x08,
483 .mask = GENMASK(5, 3),
484 },
485 },
486 .fifo_ops = {
487 .update_fifo = st_lsm6dsx_update_fifo,
488 .read_fifo = st_lsm6dsx_read_fifo,
489 .fifo_th = {
490 .addr = 0x06,
491 .mask = GENMASK(11, 0),
492 },
493 .fifo_diff = {
494 .addr = 0x3a,
495 .mask = GENMASK(11, 0),
496 },
497 .th_wl = 3,
498 },
499 .ts_settings = {
500 .timer_en = {
501 .addr = 0x58,
502 .mask = BIT(7),
503 },
504 .hr_timer = {
505 .addr = 0x5c,
506 .mask = BIT(4),
507 },
508 .fifo_en = {
509 .addr = 0x07,
510 .mask = BIT(7),
511 },
512 .decimator = {
513 .addr = 0x09,
514 .mask = GENMASK(5, 3),
515 },
516 },
517 .event_settings = {
518 .wakeup_reg = {
519 .addr = 0x5B,
520 .mask = GENMASK(5, 0),
521 },
522 .wakeup_src_reg = 0x1b,
523 .wakeup_src_status_mask = BIT(3),
524 .wakeup_src_z_mask = BIT(0),
525 .wakeup_src_y_mask = BIT(1),
526 .wakeup_src_x_mask = BIT(2),
527 },
528 },
529 {
530 .wai = 0x6a,
531 .reset = {
532 .addr = 0x12,
533 .mask = BIT(0),
534 },
535 .boot = {
536 .addr = 0x12,
537 .mask = BIT(7),
538 },
539 .bdu = {
540 .addr = 0x12,
541 .mask = BIT(6),
542 },
543 .max_fifo_size = 682,
544 .id = {
545 {
546 .hw_id = ST_LSM6DSL_ID,
547 .name = ST_LSM6DSL_DEV_NAME,
548 }, {
549 .hw_id = ST_LSM6DSM_ID,
550 .name = ST_LSM6DSM_DEV_NAME,
551 }, {
552 .hw_id = ST_ISM330DLC_ID,
553 .name = ST_ISM330DLC_DEV_NAME,
554 }, {
555 .hw_id = ST_LSM6DS3TRC_ID,
556 .name = ST_LSM6DS3TRC_DEV_NAME,
557 },
558 },
559 .channels = {
560 [ST_LSM6DSX_ID_ACC] = {
561 .chan = st_lsm6dsx_acc_channels,
562 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
563 },
564 [ST_LSM6DSX_ID_GYRO] = {
565 .chan = st_lsm6dsx_gyro_channels,
566 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
567 },
568 },
569 .odr_table = {
570 [ST_LSM6DSX_ID_ACC] = {
571 .reg = {
572 .addr = 0x10,
573 .mask = GENMASK(7, 4),
574 },
575 .odr_avl[0] = { 12500, 0x01 },
576 .odr_avl[1] = { 26000, 0x02 },
577 .odr_avl[2] = { 52000, 0x03 },
578 .odr_avl[3] = { 104000, 0x04 },
579 .odr_avl[4] = { 208000, 0x05 },
580 .odr_avl[5] = { 416000, 0x06 },
581 .odr_len = 6,
582 },
583 [ST_LSM6DSX_ID_GYRO] = {
584 .reg = {
585 .addr = 0x11,
586 .mask = GENMASK(7, 4),
587 },
588 .odr_avl[0] = { 12500, 0x01 },
589 .odr_avl[1] = { 26000, 0x02 },
590 .odr_avl[2] = { 52000, 0x03 },
591 .odr_avl[3] = { 104000, 0x04 },
592 .odr_avl[4] = { 208000, 0x05 },
593 .odr_avl[5] = { 416000, 0x06 },
594 .odr_len = 6,
595 },
596 },
597 .fs_table = {
598 [ST_LSM6DSX_ID_ACC] = {
599 .reg = {
600 .addr = 0x10,
601 .mask = GENMASK(3, 2),
602 },
603 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
604 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
605 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
606 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
607 .fs_len = 4,
608 },
609 [ST_LSM6DSX_ID_GYRO] = {
610 .reg = {
611 .addr = 0x11,
612 .mask = GENMASK(3, 2),
613 },
614 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
615 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
616 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
617 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
618 .fs_len = 4,
619 },
620 },
621 .irq_config = {
622 .irq1 = {
623 .addr = 0x0d,
624 .mask = BIT(3),
625 },
626 .irq2 = {
627 .addr = 0x0e,
628 .mask = BIT(3),
629 },
630 .lir = {
631 .addr = 0x58,
632 .mask = BIT(0),
633 },
634 .irq1_func = {
635 .addr = 0x5e,
636 .mask = BIT(5),
637 },
638 .irq2_func = {
639 .addr = 0x5f,
640 .mask = BIT(5),
641 },
642 .hla = {
643 .addr = 0x12,
644 .mask = BIT(5),
645 },
646 .od = {
647 .addr = 0x12,
648 .mask = BIT(4),
649 },
650 },
651 .decimator = {
652 [ST_LSM6DSX_ID_ACC] = {
653 .addr = 0x08,
654 .mask = GENMASK(2, 0),
655 },
656 [ST_LSM6DSX_ID_GYRO] = {
657 .addr = 0x08,
658 .mask = GENMASK(5, 3),
659 },
660 [ST_LSM6DSX_ID_EXT0] = {
661 .addr = 0x09,
662 .mask = GENMASK(2, 0),
663 },
664 },
665 .fifo_ops = {
666 .update_fifo = st_lsm6dsx_update_fifo,
667 .read_fifo = st_lsm6dsx_read_fifo,
668 .fifo_th = {
669 .addr = 0x06,
670 .mask = GENMASK(10, 0),
671 },
672 .fifo_diff = {
673 .addr = 0x3a,
674 .mask = GENMASK(10, 0),
675 },
676 .th_wl = 3,
677 },
678 .ts_settings = {
679 .timer_en = {
680 .addr = 0x19,
681 .mask = BIT(5),
682 },
683 .hr_timer = {
684 .addr = 0x5c,
685 .mask = BIT(4),
686 },
687 .fifo_en = {
688 .addr = 0x07,
689 .mask = BIT(7),
690 },
691 .decimator = {
692 .addr = 0x09,
693 .mask = GENMASK(5, 3),
694 },
695 },
696 .shub_settings = {
697 .page_mux = {
698 .addr = 0x01,
699 .mask = BIT(7),
700 },
701 .master_en = {
702 .addr = 0x1a,
703 .mask = BIT(0),
704 },
705 .pullup_en = {
706 .addr = 0x1a,
707 .mask = BIT(3),
708 },
709 .aux_sens = {
710 .addr = 0x04,
711 .mask = GENMASK(5, 4),
712 },
713 .wr_once = {
714 .addr = 0x07,
715 .mask = BIT(5),
716 },
717 .emb_func = {
718 .addr = 0x19,
719 .mask = BIT(2),
720 },
721 .num_ext_dev = 1,
722 .shub_out = {
723 .addr = 0x2e,
724 },
725 .slv0_addr = 0x02,
726 .dw_slv0_addr = 0x0e,
727 .pause = 0x7,
728 },
729 .event_settings = {
730 .enable_reg = {
731 .addr = 0x58,
732 .mask = BIT(7),
733 },
734 .wakeup_reg = {
735 .addr = 0x5B,
736 .mask = GENMASK(5, 0),
737 },
738 .wakeup_src_reg = 0x1b,
739 .wakeup_src_status_mask = BIT(3),
740 .wakeup_src_z_mask = BIT(0),
741 .wakeup_src_y_mask = BIT(1),
742 .wakeup_src_x_mask = BIT(2),
743 },
744 },
745 {
746 .wai = 0x6c,
747 .reset = {
748 .addr = 0x12,
749 .mask = BIT(0),
750 },
751 .boot = {
752 .addr = 0x12,
753 .mask = BIT(7),
754 },
755 .bdu = {
756 .addr = 0x12,
757 .mask = BIT(6),
758 },
759 .max_fifo_size = 512,
760 .id = {
761 {
762 .hw_id = ST_LSM6DSO_ID,
763 .name = ST_LSM6DSO_DEV_NAME,
764 }, {
765 .hw_id = ST_LSM6DSOX_ID,
766 .name = ST_LSM6DSOX_DEV_NAME,
767 },
768 },
769 .channels = {
770 [ST_LSM6DSX_ID_ACC] = {
771 .chan = st_lsm6dsx_acc_channels,
772 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
773 },
774 [ST_LSM6DSX_ID_GYRO] = {
775 .chan = st_lsm6dsx_gyro_channels,
776 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
777 },
778 },
779 .drdy_mask = {
780 .addr = 0x13,
781 .mask = BIT(3),
782 },
783 .odr_table = {
784 [ST_LSM6DSX_ID_ACC] = {
785 .reg = {
786 .addr = 0x10,
787 .mask = GENMASK(7, 4),
788 },
789 .odr_avl[0] = { 12500, 0x01 },
790 .odr_avl[1] = { 26000, 0x02 },
791 .odr_avl[2] = { 52000, 0x03 },
792 .odr_avl[3] = { 104000, 0x04 },
793 .odr_avl[4] = { 208000, 0x05 },
794 .odr_avl[5] = { 416000, 0x06 },
795 .odr_avl[6] = { 833000, 0x07 },
796 .odr_len = 7,
797 },
798 [ST_LSM6DSX_ID_GYRO] = {
799 .reg = {
800 .addr = 0x11,
801 .mask = GENMASK(7, 4),
802 },
803 .odr_avl[0] = { 12500, 0x01 },
804 .odr_avl[1] = { 26000, 0x02 },
805 .odr_avl[2] = { 52000, 0x03 },
806 .odr_avl[3] = { 104000, 0x04 },
807 .odr_avl[4] = { 208000, 0x05 },
808 .odr_avl[5] = { 416000, 0x06 },
809 .odr_avl[6] = { 833000, 0x07 },
810 .odr_len = 7,
811 },
812 },
813 .fs_table = {
814 [ST_LSM6DSX_ID_ACC] = {
815 .reg = {
816 .addr = 0x10,
817 .mask = GENMASK(3, 2),
818 },
819 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
820 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
821 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
822 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
823 .fs_len = 4,
824 },
825 [ST_LSM6DSX_ID_GYRO] = {
826 .reg = {
827 .addr = 0x11,
828 .mask = GENMASK(3, 2),
829 },
830 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
831 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
832 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
833 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
834 .fs_len = 4,
835 },
836 },
837 .irq_config = {
838 .irq1 = {
839 .addr = 0x0d,
840 .mask = BIT(3),
841 },
842 .irq2 = {
843 .addr = 0x0e,
844 .mask = BIT(3),
845 },
846 .lir = {
847 .addr = 0x56,
848 .mask = BIT(0),
849 },
850 .clear_on_read = {
851 .addr = 0x56,
852 .mask = BIT(6),
853 },
854 .irq1_func = {
855 .addr = 0x5e,
856 .mask = BIT(5),
857 },
858 .irq2_func = {
859 .addr = 0x5f,
860 .mask = BIT(5),
861 },
862 .hla = {
863 .addr = 0x12,
864 .mask = BIT(5),
865 },
866 .od = {
867 .addr = 0x12,
868 .mask = BIT(4),
869 },
870 },
871 .batch = {
872 [ST_LSM6DSX_ID_ACC] = {
873 .addr = 0x09,
874 .mask = GENMASK(3, 0),
875 },
876 [ST_LSM6DSX_ID_GYRO] = {
877 .addr = 0x09,
878 .mask = GENMASK(7, 4),
879 },
880 },
881 .fifo_ops = {
882 .update_fifo = st_lsm6dsx_update_fifo,
883 .read_fifo = st_lsm6dsx_read_tagged_fifo,
884 .fifo_th = {
885 .addr = 0x07,
886 .mask = GENMASK(8, 0),
887 },
888 .fifo_diff = {
889 .addr = 0x3a,
890 .mask = GENMASK(9, 0),
891 },
892 .th_wl = 1,
893 },
894 .ts_settings = {
895 .timer_en = {
896 .addr = 0x19,
897 .mask = BIT(5),
898 },
899 .decimator = {
900 .addr = 0x0a,
901 .mask = GENMASK(7, 6),
902 },
903 .freq_fine = 0x63,
904 },
905 .shub_settings = {
906 .page_mux = {
907 .addr = 0x01,
908 .mask = BIT(6),
909 },
910 .master_en = {
911 .sec_page = true,
912 .addr = 0x14,
913 .mask = BIT(2),
914 },
915 .pullup_en = {
916 .sec_page = true,
917 .addr = 0x14,
918 .mask = BIT(3),
919 },
920 .aux_sens = {
921 .addr = 0x14,
922 .mask = GENMASK(1, 0),
923 },
924 .wr_once = {
925 .addr = 0x14,
926 .mask = BIT(6),
927 },
928 .num_ext_dev = 3,
929 .shub_out = {
930 .sec_page = true,
931 .addr = 0x02,
932 },
933 .slv0_addr = 0x15,
934 .dw_slv0_addr = 0x21,
935 .batch_en = BIT(3),
936 },
937 .event_settings = {
938 .enable_reg = {
939 .addr = 0x58,
940 .mask = BIT(7),
941 },
942 .wakeup_reg = {
943 .addr = 0x5b,
944 .mask = GENMASK(5, 0),
945 },
946 .wakeup_src_reg = 0x1b,
947 .wakeup_src_status_mask = BIT(3),
948 .wakeup_src_z_mask = BIT(0),
949 .wakeup_src_y_mask = BIT(1),
950 .wakeup_src_x_mask = BIT(2),
951 },
952 },
953 {
954 .wai = 0x6b,
955 .reset = {
956 .addr = 0x12,
957 .mask = BIT(0),
958 },
959 .boot = {
960 .addr = 0x12,
961 .mask = BIT(7),
962 },
963 .bdu = {
964 .addr = 0x12,
965 .mask = BIT(6),
966 },
967 .max_fifo_size = 512,
968 .id = {
969 {
970 .hw_id = ST_ASM330LHH_ID,
971 .name = ST_ASM330LHH_DEV_NAME,
972 },
973 },
974 .channels = {
975 [ST_LSM6DSX_ID_ACC] = {
976 .chan = st_lsm6dsx_acc_channels,
977 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
978 },
979 [ST_LSM6DSX_ID_GYRO] = {
980 .chan = st_lsm6dsx_gyro_channels,
981 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
982 },
983 },
984 .drdy_mask = {
985 .addr = 0x13,
986 .mask = BIT(3),
987 },
988 .odr_table = {
989 [ST_LSM6DSX_ID_ACC] = {
990 .reg = {
991 .addr = 0x10,
992 .mask = GENMASK(7, 4),
993 },
994 .odr_avl[0] = { 12500, 0x01 },
995 .odr_avl[1] = { 26000, 0x02 },
996 .odr_avl[2] = { 52000, 0x03 },
997 .odr_avl[3] = { 104000, 0x04 },
998 .odr_avl[4] = { 208000, 0x05 },
999 .odr_avl[5] = { 416000, 0x06 },
1000 .odr_avl[6] = { 833000, 0x07 },
1001 .odr_len = 7,
1002 },
1003 [ST_LSM6DSX_ID_GYRO] = {
1004 .reg = {
1005 .addr = 0x11,
1006 .mask = GENMASK(7, 4),
1007 },
1008 .odr_avl[0] = { 12500, 0x01 },
1009 .odr_avl[1] = { 26000, 0x02 },
1010 .odr_avl[2] = { 52000, 0x03 },
1011 .odr_avl[3] = { 104000, 0x04 },
1012 .odr_avl[4] = { 208000, 0x05 },
1013 .odr_avl[5] = { 416000, 0x06 },
1014 .odr_avl[6] = { 833000, 0x07 },
1015 .odr_len = 7,
1016 },
1017 },
1018 .fs_table = {
1019 [ST_LSM6DSX_ID_ACC] = {
1020 .reg = {
1021 .addr = 0x10,
1022 .mask = GENMASK(3, 2),
1023 },
1024 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
1025 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
1026 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
1027 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
1028 .fs_len = 4,
1029 },
1030 [ST_LSM6DSX_ID_GYRO] = {
1031 .reg = {
1032 .addr = 0x11,
1033 .mask = GENMASK(3, 2),
1034 },
1035 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
1036 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
1037 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
1038 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
1039 .fs_len = 4,
1040 },
1041 },
1042 .irq_config = {
1043 .irq1 = {
1044 .addr = 0x0d,
1045 .mask = BIT(3),
1046 },
1047 .irq2 = {
1048 .addr = 0x0e,
1049 .mask = BIT(3),
1050 },
1051 .lir = {
1052 .addr = 0x56,
1053 .mask = BIT(0),
1054 },
1055 .clear_on_read = {
1056 .addr = 0x56,
1057 .mask = BIT(6),
1058 },
1059 .irq1_func = {
1060 .addr = 0x5e,
1061 .mask = BIT(5),
1062 },
1063 .irq2_func = {
1064 .addr = 0x5f,
1065 .mask = BIT(5),
1066 },
1067 .hla = {
1068 .addr = 0x12,
1069 .mask = BIT(5),
1070 },
1071 .od = {
1072 .addr = 0x12,
1073 .mask = BIT(4),
1074 },
1075 },
1076 .batch = {
1077 [ST_LSM6DSX_ID_ACC] = {
1078 .addr = 0x09,
1079 .mask = GENMASK(3, 0),
1080 },
1081 [ST_LSM6DSX_ID_GYRO] = {
1082 .addr = 0x09,
1083 .mask = GENMASK(7, 4),
1084 },
1085 },
1086 .fifo_ops = {
1087 .update_fifo = st_lsm6dsx_update_fifo,
1088 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1089 .fifo_th = {
1090 .addr = 0x07,
1091 .mask = GENMASK(8, 0),
1092 },
1093 .fifo_diff = {
1094 .addr = 0x3a,
1095 .mask = GENMASK(9, 0),
1096 },
1097 .th_wl = 1,
1098 },
1099 .ts_settings = {
1100 .timer_en = {
1101 .addr = 0x19,
1102 .mask = BIT(5),
1103 },
1104 .decimator = {
1105 .addr = 0x0a,
1106 .mask = GENMASK(7, 6),
1107 },
1108 .freq_fine = 0x63,
1109 },
1110 .event_settings = {
1111 .enable_reg = {
1112 .addr = 0x58,
1113 .mask = BIT(7),
1114 },
1115 .wakeup_reg = {
1116 .addr = 0x5B,
1117 .mask = GENMASK(5, 0),
1118 },
1119 .wakeup_src_reg = 0x1b,
1120 .wakeup_src_status_mask = BIT(3),
1121 .wakeup_src_z_mask = BIT(0),
1122 .wakeup_src_y_mask = BIT(1),
1123 .wakeup_src_x_mask = BIT(2),
1124 },
1125 },
1126 {
1127 .wai = 0x6b,
1128 .reset = {
1129 .addr = 0x12,
1130 .mask = BIT(0),
1131 },
1132 .boot = {
1133 .addr = 0x12,
1134 .mask = BIT(7),
1135 },
1136 .bdu = {
1137 .addr = 0x12,
1138 .mask = BIT(6),
1139 },
1140 .max_fifo_size = 512,
1141 .id = {
1142 {
1143 .hw_id = ST_LSM6DSR_ID,
1144 .name = ST_LSM6DSR_DEV_NAME,
1145 }, {
1146 .hw_id = ST_ISM330DHCX_ID,
1147 .name = ST_ISM330DHCX_DEV_NAME,
1148 }, {
1149 .hw_id = ST_LSM6DSRX_ID,
1150 .name = ST_LSM6DSRX_DEV_NAME,
1151 },
1152 },
1153 .channels = {
1154 [ST_LSM6DSX_ID_ACC] = {
1155 .chan = st_lsm6dsx_acc_channels,
1156 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1157 },
1158 [ST_LSM6DSX_ID_GYRO] = {
1159 .chan = st_lsm6dsx_gyro_channels,
1160 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1161 },
1162 },
1163 .drdy_mask = {
1164 .addr = 0x13,
1165 .mask = BIT(3),
1166 },
1167 .odr_table = {
1168 [ST_LSM6DSX_ID_ACC] = {
1169 .reg = {
1170 .addr = 0x10,
1171 .mask = GENMASK(7, 4),
1172 },
1173 .odr_avl[0] = { 12500, 0x01 },
1174 .odr_avl[1] = { 26000, 0x02 },
1175 .odr_avl[2] = { 52000, 0x03 },
1176 .odr_avl[3] = { 104000, 0x04 },
1177 .odr_avl[4] = { 208000, 0x05 },
1178 .odr_avl[5] = { 416000, 0x06 },
1179 .odr_avl[6] = { 833000, 0x07 },
1180 .odr_len = 7,
1181 },
1182 [ST_LSM6DSX_ID_GYRO] = {
1183 .reg = {
1184 .addr = 0x11,
1185 .mask = GENMASK(7, 4),
1186 },
1187 .odr_avl[0] = { 12500, 0x01 },
1188 .odr_avl[1] = { 26000, 0x02 },
1189 .odr_avl[2] = { 52000, 0x03 },
1190 .odr_avl[3] = { 104000, 0x04 },
1191 .odr_avl[4] = { 208000, 0x05 },
1192 .odr_avl[5] = { 416000, 0x06 },
1193 .odr_avl[6] = { 833000, 0x07 },
1194 .odr_len = 7,
1195 },
1196 },
1197 .fs_table = {
1198 [ST_LSM6DSX_ID_ACC] = {
1199 .reg = {
1200 .addr = 0x10,
1201 .mask = GENMASK(3, 2),
1202 },
1203 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 },
1204 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
1205 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
1206 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
1207 .fs_len = 4,
1208 },
1209 [ST_LSM6DSX_ID_GYRO] = {
1210 .reg = {
1211 .addr = 0x11,
1212 .mask = GENMASK(3, 2),
1213 },
1214 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 },
1215 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
1216 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
1217 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
1218 .fs_len = 4,
1219 },
1220 },
1221 .irq_config = {
1222 .irq1 = {
1223 .addr = 0x0d,
1224 .mask = BIT(3),
1225 },
1226 .irq2 = {
1227 .addr = 0x0e,
1228 .mask = BIT(3),
1229 },
1230 .lir = {
1231 .addr = 0x56,
1232 .mask = BIT(0),
1233 },
1234 .clear_on_read = {
1235 .addr = 0x56,
1236 .mask = BIT(6),
1237 },
1238 .irq1_func = {
1239 .addr = 0x5e,
1240 .mask = BIT(5),
1241 },
1242 .irq2_func = {
1243 .addr = 0x5f,
1244 .mask = BIT(5),
1245 },
1246 .hla = {
1247 .addr = 0x12,
1248 .mask = BIT(5),
1249 },
1250 .od = {
1251 .addr = 0x12,
1252 .mask = BIT(4),
1253 },
1254 },
1255 .batch = {
1256 [ST_LSM6DSX_ID_ACC] = {
1257 .addr = 0x09,
1258 .mask = GENMASK(3, 0),
1259 },
1260 [ST_LSM6DSX_ID_GYRO] = {
1261 .addr = 0x09,
1262 .mask = GENMASK(7, 4),
1263 },
1264 },
1265 .fifo_ops = {
1266 .update_fifo = st_lsm6dsx_update_fifo,
1267 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1268 .fifo_th = {
1269 .addr = 0x07,
1270 .mask = GENMASK(8, 0),
1271 },
1272 .fifo_diff = {
1273 .addr = 0x3a,
1274 .mask = GENMASK(9, 0),
1275 },
1276 .th_wl = 1,
1277 },
1278 .ts_settings = {
1279 .timer_en = {
1280 .addr = 0x19,
1281 .mask = BIT(5),
1282 },
1283 .decimator = {
1284 .addr = 0x0a,
1285 .mask = GENMASK(7, 6),
1286 },
1287 .freq_fine = 0x63,
1288 },
1289 .shub_settings = {
1290 .page_mux = {
1291 .addr = 0x01,
1292 .mask = BIT(6),
1293 },
1294 .master_en = {
1295 .sec_page = true,
1296 .addr = 0x14,
1297 .mask = BIT(2),
1298 },
1299 .pullup_en = {
1300 .sec_page = true,
1301 .addr = 0x14,
1302 .mask = BIT(3),
1303 },
1304 .aux_sens = {
1305 .addr = 0x14,
1306 .mask = GENMASK(1, 0),
1307 },
1308 .wr_once = {
1309 .addr = 0x14,
1310 .mask = BIT(6),
1311 },
1312 .num_ext_dev = 3,
1313 .shub_out = {
1314 .sec_page = true,
1315 .addr = 0x02,
1316 },
1317 .slv0_addr = 0x15,
1318 .dw_slv0_addr = 0x21,
1319 .batch_en = BIT(3),
1320 },
1321 .event_settings = {
1322 .enable_reg = {
1323 .addr = 0x58,
1324 .mask = BIT(7),
1325 },
1326 .wakeup_reg = {
1327 .addr = 0x5B,
1328 .mask = GENMASK(5, 0),
1329 },
1330 .wakeup_src_reg = 0x1b,
1331 .wakeup_src_status_mask = BIT(3),
1332 .wakeup_src_z_mask = BIT(0),
1333 .wakeup_src_y_mask = BIT(1),
1334 .wakeup_src_x_mask = BIT(2),
1335 }
1336 },
1337};
1338
1339int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1340{
1341 const struct st_lsm6dsx_shub_settings *hub_settings;
1342 unsigned int data;
1343 int err;
1344
1345 hub_settings = &hw->settings->shub_settings;
1346 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1347 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1348 hub_settings->page_mux.mask, data);
1349 usleep_range(100, 150);
1350
1351 return err;
1352}
1353
1354static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1355 const char **name)
1356{
1357 int err, i, j, data;
1358
1359 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1360 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1361 if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1362 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1363 break;
1364 }
1365 if (j < ST_LSM6DSX_MAX_ID)
1366 break;
1367 }
1368
1369 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1370 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1371 return -ENODEV;
1372 }
1373
1374 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1375 if (err < 0) {
1376 dev_err(hw->dev, "failed to read whoami register\n");
1377 return err;
1378 }
1379
1380 if (data != st_lsm6dsx_sensor_settings[i].wai) {
1381 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1382 return -ENODEV;
1383 }
1384
1385 *name = st_lsm6dsx_sensor_settings[i].id[j].name;
1386 hw->settings = &st_lsm6dsx_sensor_settings[i];
1387
1388 return 0;
1389}
1390
1391static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1392 u32 gain)
1393{
1394 const struct st_lsm6dsx_fs_table_entry *fs_table;
1395 unsigned int data;
1396 int i, err;
1397
1398 fs_table = &sensor->hw->settings->fs_table[sensor->id];
1399 for (i = 0; i < fs_table->fs_len; i++) {
1400 if (fs_table->fs_avl[i].gain == gain)
1401 break;
1402 }
1403
1404 if (i == fs_table->fs_len)
1405 return -EINVAL;
1406
1407 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1408 fs_table->reg.mask);
1409 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1410 fs_table->reg.mask, data);
1411 if (err < 0)
1412 return err;
1413
1414 sensor->gain = gain;
1415
1416 return 0;
1417}
1418
1419int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1420{
1421 const struct st_lsm6dsx_odr_table_entry *odr_table;
1422 int i;
1423
1424 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1425 for (i = 0; i < odr_table->odr_len; i++) {
1426
1427
1428
1429
1430 if (odr_table->odr_avl[i].milli_hz >= odr)
1431 break;
1432 }
1433
1434 if (i == odr_table->odr_len)
1435 return -EINVAL;
1436
1437 *val = odr_table->odr_avl[i].val;
1438 return odr_table->odr_avl[i].milli_hz;
1439}
1440
1441static int
1442st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1443 enum st_lsm6dsx_sensor_id id)
1444{
1445 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1446
1447 if (odr > 0) {
1448 if (hw->enable_mask & BIT(id))
1449 return max_t(u32, ref->odr, odr);
1450 else
1451 return odr;
1452 } else {
1453 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1454 }
1455}
1456
1457static int
1458st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1459{
1460 struct st_lsm6dsx_sensor *ref_sensor = sensor;
1461 struct st_lsm6dsx_hw *hw = sensor->hw;
1462 const struct st_lsm6dsx_reg *reg;
1463 unsigned int data;
1464 u8 val = 0;
1465 int err;
1466
1467 switch (sensor->id) {
1468 case ST_LSM6DSX_ID_EXT0:
1469 case ST_LSM6DSX_ID_EXT1:
1470 case ST_LSM6DSX_ID_EXT2:
1471 case ST_LSM6DSX_ID_ACC: {
1472 u32 odr;
1473 int i;
1474
1475
1476
1477
1478
1479
1480
1481 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1482 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1483 if (!hw->iio_devs[i] || i == sensor->id)
1484 continue;
1485
1486 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1487 if (odr != req_odr)
1488
1489 return 0;
1490 }
1491 break;
1492 }
1493 default:
1494 break;
1495 }
1496
1497 if (req_odr > 0) {
1498 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1499 if (err < 0)
1500 return err;
1501 }
1502
1503 reg = &hw->settings->odr_table[ref_sensor->id].reg;
1504 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1505 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1506}
1507
1508static int
1509__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1510 bool enable)
1511{
1512 struct st_lsm6dsx_hw *hw = sensor->hw;
1513 u32 odr = enable ? sensor->odr : 0;
1514 int err;
1515
1516 err = st_lsm6dsx_set_odr(sensor, odr);
1517 if (err < 0)
1518 return err;
1519
1520 if (enable)
1521 hw->enable_mask |= BIT(sensor->id);
1522 else
1523 hw->enable_mask &= ~BIT(sensor->id);
1524
1525 return 0;
1526}
1527
1528static int
1529st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
1530{
1531 struct st_lsm6dsx_hw *hw = sensor->hw;
1532
1533 if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
1534 return 0;
1535
1536 return hw->enable_event;
1537}
1538
1539int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1540 bool enable)
1541{
1542 if (st_lsm6dsx_check_events(sensor, enable))
1543 return 0;
1544
1545 return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1546}
1547
1548static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1549 u8 addr, int *val)
1550{
1551 struct st_lsm6dsx_hw *hw = sensor->hw;
1552 int err, delay;
1553 __le16 data;
1554
1555 err = st_lsm6dsx_sensor_set_enable(sensor, true);
1556 if (err < 0)
1557 return err;
1558
1559 delay = 1000000000 / sensor->odr;
1560 usleep_range(delay, 2 * delay);
1561
1562 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1563 if (err < 0)
1564 return err;
1565
1566 if (!hw->enable_event) {
1567 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1568 if (err < 0)
1569 return err;
1570 }
1571
1572 *val = (s16)le16_to_cpu(data);
1573
1574 return IIO_VAL_INT;
1575}
1576
1577static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1578 struct iio_chan_spec const *ch,
1579 int *val, int *val2, long mask)
1580{
1581 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1582 int ret;
1583
1584 switch (mask) {
1585 case IIO_CHAN_INFO_RAW:
1586 ret = iio_device_claim_direct_mode(iio_dev);
1587 if (ret)
1588 break;
1589
1590 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1591 iio_device_release_direct_mode(iio_dev);
1592 break;
1593 case IIO_CHAN_INFO_SAMP_FREQ:
1594 *val = sensor->odr / 1000;
1595 *val2 = (sensor->odr % 1000) * 1000;
1596 ret = IIO_VAL_INT_PLUS_MICRO;
1597 break;
1598 case IIO_CHAN_INFO_SCALE:
1599 *val = 0;
1600 *val2 = sensor->gain;
1601 ret = IIO_VAL_INT_PLUS_MICRO;
1602 break;
1603 default:
1604 ret = -EINVAL;
1605 break;
1606 }
1607
1608 return ret;
1609}
1610
1611static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1612 struct iio_chan_spec const *chan,
1613 int val, int val2, long mask)
1614{
1615 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1616 int err;
1617
1618 err = iio_device_claim_direct_mode(iio_dev);
1619 if (err)
1620 return err;
1621
1622 switch (mask) {
1623 case IIO_CHAN_INFO_SCALE:
1624 err = st_lsm6dsx_set_full_scale(sensor, val2);
1625 break;
1626 case IIO_CHAN_INFO_SAMP_FREQ: {
1627 u8 data;
1628
1629 val = val * 1000 + val2 / 1000;
1630 val = st_lsm6dsx_check_odr(sensor, val, &data);
1631 if (val < 0)
1632 err = val;
1633 else
1634 sensor->odr = val;
1635 break;
1636 }
1637 default:
1638 err = -EINVAL;
1639 break;
1640 }
1641
1642 iio_device_release_direct_mode(iio_dev);
1643
1644 return err;
1645}
1646
1647static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state)
1648{
1649 const struct st_lsm6dsx_reg *reg;
1650 unsigned int data;
1651 int err;
1652
1653 if (!hw->settings->irq_config.irq1_func.addr)
1654 return -ENOTSUPP;
1655
1656 reg = &hw->settings->event_settings.enable_reg;
1657 if (reg->addr) {
1658 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
1659 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1660 reg->mask, data);
1661 if (err < 0)
1662 return err;
1663 }
1664
1665
1666 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
1667 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
1668 hw->irq_routing->mask, data);
1669}
1670
1671static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
1672 const struct iio_chan_spec *chan,
1673 enum iio_event_type type,
1674 enum iio_event_direction dir,
1675 enum iio_event_info info,
1676 int *val, int *val2)
1677{
1678 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1679 struct st_lsm6dsx_hw *hw = sensor->hw;
1680
1681 if (type != IIO_EV_TYPE_THRESH)
1682 return -EINVAL;
1683
1684 *val2 = 0;
1685 *val = hw->event_threshold;
1686
1687 return IIO_VAL_INT;
1688}
1689
1690static int
1691st_lsm6dsx_write_event(struct iio_dev *iio_dev,
1692 const struct iio_chan_spec *chan,
1693 enum iio_event_type type,
1694 enum iio_event_direction dir,
1695 enum iio_event_info info,
1696 int val, int val2)
1697{
1698 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1699 struct st_lsm6dsx_hw *hw = sensor->hw;
1700 const struct st_lsm6dsx_reg *reg;
1701 unsigned int data;
1702 int err;
1703
1704 if (type != IIO_EV_TYPE_THRESH)
1705 return -EINVAL;
1706
1707 if (val < 0 || val > 31)
1708 return -EINVAL;
1709
1710 reg = &hw->settings->event_settings.wakeup_reg;
1711 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1712 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1713 reg->mask, data);
1714 if (err < 0)
1715 return -EINVAL;
1716
1717 hw->event_threshold = val;
1718
1719 return 0;
1720}
1721
1722static int
1723st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
1724 const struct iio_chan_spec *chan,
1725 enum iio_event_type type,
1726 enum iio_event_direction dir)
1727{
1728 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1729 struct st_lsm6dsx_hw *hw = sensor->hw;
1730
1731 if (type != IIO_EV_TYPE_THRESH)
1732 return -EINVAL;
1733
1734 return !!(hw->enable_event & BIT(chan->channel2));
1735}
1736
1737static int
1738st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
1739 const struct iio_chan_spec *chan,
1740 enum iio_event_type type,
1741 enum iio_event_direction dir, int state)
1742{
1743 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1744 struct st_lsm6dsx_hw *hw = sensor->hw;
1745 u8 enable_event;
1746 int err;
1747
1748 if (type != IIO_EV_TYPE_THRESH)
1749 return -EINVAL;
1750
1751 if (state) {
1752 enable_event = hw->enable_event | BIT(chan->channel2);
1753
1754
1755 if (hw->enable_event)
1756 goto out;
1757 } else {
1758 enable_event = hw->enable_event & ~BIT(chan->channel2);
1759
1760
1761 if (enable_event)
1762 goto out;
1763 }
1764
1765
1766 if (hw->enable_event == enable_event)
1767 return 0;
1768
1769 err = st_lsm6dsx_event_setup(hw, state);
1770 if (err < 0)
1771 return err;
1772
1773 mutex_lock(&hw->conf_lock);
1774 if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
1775 err = __st_lsm6dsx_sensor_set_enable(sensor, state);
1776 mutex_unlock(&hw->conf_lock);
1777 if (err < 0)
1778 return err;
1779
1780out:
1781 hw->enable_event = enable_event;
1782
1783 return 0;
1784}
1785
1786int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
1787{
1788 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1789 struct st_lsm6dsx_hw *hw = sensor->hw;
1790 int err;
1791
1792 if (val < 1 || val > hw->settings->max_fifo_size)
1793 return -EINVAL;
1794
1795 mutex_lock(&hw->conf_lock);
1796
1797 err = st_lsm6dsx_update_watermark(sensor, val);
1798
1799 mutex_unlock(&hw->conf_lock);
1800
1801 if (err < 0)
1802 return err;
1803
1804 sensor->watermark = val;
1805
1806 return 0;
1807}
1808
1809static ssize_t
1810st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
1811 struct device_attribute *attr,
1812 char *buf)
1813{
1814 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1815 const struct st_lsm6dsx_odr_table_entry *odr_table;
1816 int i, len = 0;
1817
1818 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1819 for (i = 0; i < odr_table->odr_len; i++)
1820 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ",
1821 odr_table->odr_avl[i].milli_hz / 1000,
1822 odr_table->odr_avl[i].milli_hz % 1000);
1823 buf[len - 1] = '\n';
1824
1825 return len;
1826}
1827
1828static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
1829 struct device_attribute *attr,
1830 char *buf)
1831{
1832 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1833 const struct st_lsm6dsx_fs_table_entry *fs_table;
1834 struct st_lsm6dsx_hw *hw = sensor->hw;
1835 int i, len = 0;
1836
1837 fs_table = &hw->settings->fs_table[sensor->id];
1838 for (i = 0; i < fs_table->fs_len; i++)
1839 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ",
1840 fs_table->fs_avl[i].gain);
1841 buf[len - 1] = '\n';
1842
1843 return len;
1844}
1845
1846static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
1847static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
1848 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1849static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
1850 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1851
1852static struct attribute *st_lsm6dsx_acc_attributes[] = {
1853 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1854 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
1855 NULL,
1856};
1857
1858static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
1859 .attrs = st_lsm6dsx_acc_attributes,
1860};
1861
1862static const struct iio_info st_lsm6dsx_acc_info = {
1863 .attrs = &st_lsm6dsx_acc_attribute_group,
1864 .read_raw = st_lsm6dsx_read_raw,
1865 .write_raw = st_lsm6dsx_write_raw,
1866 .read_event_value = st_lsm6dsx_read_event,
1867 .write_event_value = st_lsm6dsx_write_event,
1868 .read_event_config = st_lsm6dsx_read_event_config,
1869 .write_event_config = st_lsm6dsx_write_event_config,
1870 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1871};
1872
1873static struct attribute *st_lsm6dsx_gyro_attributes[] = {
1874 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1875 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
1876 NULL,
1877};
1878
1879static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
1880 .attrs = st_lsm6dsx_gyro_attributes,
1881};
1882
1883static const struct iio_info st_lsm6dsx_gyro_info = {
1884 .attrs = &st_lsm6dsx_gyro_attribute_group,
1885 .read_raw = st_lsm6dsx_read_raw,
1886 .write_raw = st_lsm6dsx_write_raw,
1887 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1888};
1889
1890static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
1891{
1892 struct device *dev = hw->dev;
1893
1894 if (!dev_fwnode(dev))
1895 return -EINVAL;
1896
1897 return device_property_read_u32(dev, "st,drdy-int-pin", drdy_pin);
1898}
1899
1900static int
1901st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
1902 const struct st_lsm6dsx_reg **drdy_reg)
1903{
1904 int err = 0, drdy_pin;
1905
1906 if (st_lsm6dsx_get_drdy_pin(hw, &drdy_pin) < 0) {
1907 struct st_sensors_platform_data *pdata;
1908 struct device *dev = hw->dev;
1909
1910 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1911 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
1912 }
1913
1914 switch (drdy_pin) {
1915 case 1:
1916 hw->irq_routing = &hw->settings->irq_config.irq1_func;
1917 *drdy_reg = &hw->settings->irq_config.irq1;
1918 break;
1919 case 2:
1920 hw->irq_routing = &hw->settings->irq_config.irq2_func;
1921 *drdy_reg = &hw->settings->irq_config.irq2;
1922 break;
1923 default:
1924 dev_err(hw->dev, "unsupported data ready pin\n");
1925 err = -EINVAL;
1926 break;
1927 }
1928
1929 return err;
1930}
1931
1932static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
1933{
1934 const struct st_lsm6dsx_shub_settings *hub_settings;
1935 struct st_sensors_platform_data *pdata;
1936 struct device *dev = hw->dev;
1937 unsigned int data;
1938 int err = 0;
1939
1940 hub_settings = &hw->settings->shub_settings;
1941
1942 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1943 if ((dev_fwnode(dev) && device_property_read_bool(dev, "st,pullups")) ||
1944 (pdata && pdata->pullups)) {
1945 if (hub_settings->pullup_en.sec_page) {
1946 err = st_lsm6dsx_set_page(hw, true);
1947 if (err < 0)
1948 return err;
1949 }
1950
1951 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
1952 err = regmap_update_bits(hw->regmap,
1953 hub_settings->pullup_en.addr,
1954 hub_settings->pullup_en.mask, data);
1955
1956 if (hub_settings->pullup_en.sec_page)
1957 st_lsm6dsx_set_page(hw, false);
1958
1959 if (err < 0)
1960 return err;
1961 }
1962
1963 if (hub_settings->aux_sens.addr) {
1964
1965 err = st_lsm6dsx_set_page(hw, true);
1966 if (err < 0)
1967 return err;
1968
1969 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
1970 err = regmap_update_bits(hw->regmap,
1971 hub_settings->aux_sens.addr,
1972 hub_settings->aux_sens.mask, data);
1973
1974 st_lsm6dsx_set_page(hw, false);
1975
1976 if (err < 0)
1977 return err;
1978 }
1979
1980 if (hub_settings->emb_func.addr) {
1981 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
1982 err = regmap_update_bits(hw->regmap,
1983 hub_settings->emb_func.addr,
1984 hub_settings->emb_func.mask, data);
1985 }
1986
1987 return err;
1988}
1989
1990static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
1991{
1992 const struct st_lsm6dsx_hw_ts_settings *ts_settings;
1993 int err, val;
1994
1995 ts_settings = &hw->settings->ts_settings;
1996
1997 if (ts_settings->timer_en.addr) {
1998 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
1999 err = regmap_update_bits(hw->regmap,
2000 ts_settings->timer_en.addr,
2001 ts_settings->timer_en.mask, val);
2002 if (err < 0)
2003 return err;
2004 }
2005
2006
2007 if (ts_settings->hr_timer.addr) {
2008 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
2009 err = regmap_update_bits(hw->regmap,
2010 ts_settings->hr_timer.addr,
2011 ts_settings->hr_timer.mask, val);
2012 if (err < 0)
2013 return err;
2014 }
2015
2016
2017 if (ts_settings->fifo_en.addr) {
2018 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
2019 err = regmap_update_bits(hw->regmap,
2020 ts_settings->fifo_en.addr,
2021 ts_settings->fifo_en.mask, val);
2022 if (err < 0)
2023 return err;
2024 }
2025
2026
2027 hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY;
2028 if (ts_settings->freq_fine) {
2029 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
2030 if (err < 0)
2031 return err;
2032
2033
2034
2035
2036
2037
2038
2039
2040 hw->ts_gain -= ((s8)val * 37500) / 1000;
2041 }
2042
2043 return 0;
2044}
2045
2046static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
2047{
2048 const struct st_lsm6dsx_reg *reg;
2049 int err;
2050
2051
2052
2053
2054
2055
2056
2057 err = st_lsm6dsx_flush_fifo(hw);
2058 if (err < 0 && err != -ENOTSUPP)
2059 return err;
2060
2061
2062 reg = &hw->settings->reset;
2063 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2064 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2065 if (err < 0)
2066 return err;
2067
2068 msleep(50);
2069
2070
2071 reg = &hw->settings->boot;
2072 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2073 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2074 if (err < 0)
2075 return err;
2076
2077 msleep(50);
2078
2079 return 0;
2080}
2081
2082static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
2083{
2084 const struct st_lsm6dsx_reg *reg;
2085 int err;
2086
2087 err = st_lsm6dsx_reset_device(hw);
2088 if (err < 0)
2089 return err;
2090
2091
2092 reg = &hw->settings->bdu;
2093 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2094 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2095 if (err < 0)
2096 return err;
2097
2098
2099 err = st_lsm6dsx_get_drdy_reg(hw, ®);
2100 if (err < 0)
2101 return err;
2102
2103 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2104 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2105 if (err < 0)
2106 return err;
2107
2108
2109 if (hw->settings->irq_config.lir.addr) {
2110 reg = &hw->settings->irq_config.lir;
2111 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2112 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2113 if (err < 0)
2114 return err;
2115
2116
2117 if (hw->settings->irq_config.clear_on_read.addr) {
2118 reg = &hw->settings->irq_config.clear_on_read;
2119 err = regmap_update_bits(hw->regmap,
2120 reg->addr, reg->mask,
2121 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2122 if (err < 0)
2123 return err;
2124 }
2125 }
2126
2127
2128 if (hw->settings->drdy_mask.addr) {
2129 reg = &hw->settings->drdy_mask;
2130 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2131 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2132 if (err < 0)
2133 return err;
2134 }
2135
2136 err = st_lsm6dsx_init_shub(hw);
2137 if (err < 0)
2138 return err;
2139
2140 return st_lsm6dsx_init_hw_timer(hw);
2141}
2142
2143static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
2144 enum st_lsm6dsx_sensor_id id,
2145 const char *name)
2146{
2147 struct st_lsm6dsx_sensor *sensor;
2148 struct iio_dev *iio_dev;
2149
2150 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
2151 if (!iio_dev)
2152 return NULL;
2153
2154 iio_dev->modes = INDIO_DIRECT_MODE;
2155 iio_dev->dev.parent = hw->dev;
2156 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
2157 iio_dev->channels = hw->settings->channels[id].chan;
2158 iio_dev->num_channels = hw->settings->channels[id].len;
2159
2160 sensor = iio_priv(iio_dev);
2161 sensor->id = id;
2162 sensor->hw = hw;
2163 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2164 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2165 sensor->watermark = 1;
2166
2167 switch (id) {
2168 case ST_LSM6DSX_ID_ACC:
2169 iio_dev->info = &st_lsm6dsx_acc_info;
2170 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2171 name);
2172 break;
2173 case ST_LSM6DSX_ID_GYRO:
2174 iio_dev->info = &st_lsm6dsx_gyro_info;
2175 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2176 name);
2177 break;
2178 default:
2179 return NULL;
2180 }
2181 iio_dev->name = sensor->name;
2182
2183 return iio_dev;
2184}
2185
2186static bool
2187st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2188{
2189 const struct st_lsm6dsx_event_settings *event_settings;
2190 int err, data;
2191 s64 timestamp;
2192
2193 if (!hw->enable_event)
2194 return false;
2195
2196 event_settings = &hw->settings->event_settings;
2197 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
2198 &data, sizeof(data));
2199 if (err < 0)
2200 return false;
2201
2202 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2203 if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
2204 (hw->enable_event & BIT(IIO_MOD_Z)))
2205 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2206 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2207 0,
2208 IIO_MOD_Z,
2209 IIO_EV_TYPE_THRESH,
2210 IIO_EV_DIR_EITHER),
2211 timestamp);
2212
2213 if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
2214 (hw->enable_event & BIT(IIO_MOD_Y)))
2215 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2216 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2217 0,
2218 IIO_MOD_Y,
2219 IIO_EV_TYPE_THRESH,
2220 IIO_EV_DIR_EITHER),
2221 timestamp);
2222
2223 if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
2224 (hw->enable_event & BIT(IIO_MOD_X)))
2225 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2226 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2227 0,
2228 IIO_MOD_X,
2229 IIO_EV_TYPE_THRESH,
2230 IIO_EV_DIR_EITHER),
2231 timestamp);
2232
2233 return data & event_settings->wakeup_src_status_mask;
2234}
2235
2236static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2237{
2238 struct st_lsm6dsx_hw *hw = private;
2239 bool event;
2240 int count;
2241
2242 event = st_lsm6dsx_report_motion_event(hw);
2243
2244 if (!hw->settings->fifo_ops.read_fifo)
2245 return event ? IRQ_HANDLED : IRQ_NONE;
2246
2247 mutex_lock(&hw->fifo_lock);
2248 count = hw->settings->fifo_ops.read_fifo(hw);
2249 mutex_unlock(&hw->fifo_lock);
2250
2251 return count || event ? IRQ_HANDLED : IRQ_NONE;
2252}
2253
2254static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2255{
2256 struct st_sensors_platform_data *pdata;
2257 const struct st_lsm6dsx_reg *reg;
2258 struct device *dev = hw->dev;
2259 unsigned long irq_type;
2260 bool irq_active_low;
2261 int err;
2262
2263 irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
2264
2265 switch (irq_type) {
2266 case IRQF_TRIGGER_HIGH:
2267 case IRQF_TRIGGER_RISING:
2268 irq_active_low = false;
2269 break;
2270 case IRQF_TRIGGER_LOW:
2271 case IRQF_TRIGGER_FALLING:
2272 irq_active_low = true;
2273 break;
2274 default:
2275 dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2276 return -EINVAL;
2277 }
2278
2279 reg = &hw->settings->irq_config.hla;
2280 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2281 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2282 reg->mask));
2283 if (err < 0)
2284 return err;
2285
2286 pdata = (struct st_sensors_platform_data *)dev->platform_data;
2287 if ((dev_fwnode(dev) && device_property_read_bool(dev, "drive-open-drain")) ||
2288 (pdata && pdata->open_drain)) {
2289 reg = &hw->settings->irq_config.od;
2290 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2291 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2292 if (err < 0)
2293 return err;
2294
2295 irq_type |= IRQF_SHARED;
2296 }
2297
2298 err = devm_request_threaded_irq(hw->dev, hw->irq,
2299 NULL,
2300 st_lsm6dsx_handler_thread,
2301 irq_type | IRQF_ONESHOT,
2302 "lsm6dsx", hw);
2303 if (err) {
2304 dev_err(hw->dev, "failed to request trigger irq %d\n",
2305 hw->irq);
2306 return err;
2307 }
2308
2309 return 0;
2310}
2311
2312int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2313 struct regmap *regmap)
2314{
2315 struct st_sensors_platform_data *pdata = dev->platform_data;
2316 const struct st_lsm6dsx_shub_settings *hub_settings;
2317 struct st_lsm6dsx_hw *hw;
2318 const char *name = NULL;
2319 int i, err;
2320
2321 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2322 if (!hw)
2323 return -ENOMEM;
2324
2325 dev_set_drvdata(dev, (void *)hw);
2326
2327 mutex_init(&hw->fifo_lock);
2328 mutex_init(&hw->conf_lock);
2329 mutex_init(&hw->page_lock);
2330
2331 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2332 if (!hw->buff)
2333 return -ENOMEM;
2334
2335 hw->dev = dev;
2336 hw->irq = irq;
2337 hw->regmap = regmap;
2338
2339 err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2340 if (err < 0)
2341 return err;
2342
2343 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2344 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2345 if (!hw->iio_devs[i])
2346 return -ENOMEM;
2347 }
2348
2349 err = st_lsm6dsx_init_device(hw);
2350 if (err < 0)
2351 return err;
2352
2353 hub_settings = &hw->settings->shub_settings;
2354 if (hub_settings->master_en.addr) {
2355 err = st_lsm6dsx_shub_probe(hw, name);
2356 if (err < 0)
2357 return err;
2358 }
2359
2360 if (hw->irq > 0) {
2361 err = st_lsm6dsx_irq_setup(hw);
2362 if (err < 0)
2363 return err;
2364
2365 err = st_lsm6dsx_fifo_setup(hw);
2366 if (err < 0)
2367 return err;
2368 }
2369
2370 err = iio_read_mount_matrix(hw->dev, "mount-matrix", &hw->orientation);
2371 if (err)
2372 return err;
2373
2374 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2375 if (!hw->iio_devs[i])
2376 continue;
2377
2378 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2379 if (err)
2380 return err;
2381 }
2382
2383 if ((dev_fwnode(dev) && device_property_read_bool(dev, "wakeup-source")) ||
2384 (pdata && pdata->wakeup_source))
2385 device_init_wakeup(dev, true);
2386
2387 return 0;
2388}
2389EXPORT_SYMBOL(st_lsm6dsx_probe);
2390
2391static int __maybe_unused st_lsm6dsx_suspend(struct device *dev)
2392{
2393 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2394 struct st_lsm6dsx_sensor *sensor;
2395 int i, err = 0;
2396
2397 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2398 if (!hw->iio_devs[i])
2399 continue;
2400
2401 sensor = iio_priv(hw->iio_devs[i]);
2402 if (!(hw->enable_mask & BIT(sensor->id)))
2403 continue;
2404
2405 if (device_may_wakeup(dev) &&
2406 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
2407
2408 enable_irq_wake(hw->irq);
2409 continue;
2410 }
2411
2412 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2413 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2414 sensor->id == ST_LSM6DSX_ID_EXT2)
2415 err = st_lsm6dsx_shub_set_enable(sensor, false);
2416 else
2417 err = st_lsm6dsx_sensor_set_enable(sensor, false);
2418 if (err < 0)
2419 return err;
2420
2421 hw->suspend_mask |= BIT(sensor->id);
2422 }
2423
2424 if (hw->fifo_mask)
2425 err = st_lsm6dsx_flush_fifo(hw);
2426
2427 return err;
2428}
2429
2430static int __maybe_unused st_lsm6dsx_resume(struct device *dev)
2431{
2432 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2433 struct st_lsm6dsx_sensor *sensor;
2434 int i, err = 0;
2435
2436 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2437 if (!hw->iio_devs[i])
2438 continue;
2439
2440 sensor = iio_priv(hw->iio_devs[i]);
2441 if (device_may_wakeup(dev) &&
2442 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
2443 disable_irq_wake(hw->irq);
2444
2445 if (!(hw->suspend_mask & BIT(sensor->id)))
2446 continue;
2447
2448 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2449 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2450 sensor->id == ST_LSM6DSX_ID_EXT2)
2451 err = st_lsm6dsx_shub_set_enable(sensor, true);
2452 else
2453 err = st_lsm6dsx_sensor_set_enable(sensor, true);
2454 if (err < 0)
2455 return err;
2456
2457 hw->suspend_mask &= ~BIT(sensor->id);
2458 }
2459
2460 if (hw->fifo_mask)
2461 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
2462
2463 return err;
2464}
2465
2466const struct dev_pm_ops st_lsm6dsx_pm_ops = {
2467 SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume)
2468};
2469EXPORT_SYMBOL(st_lsm6dsx_pm_ops);
2470
2471MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
2472MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
2473MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
2474MODULE_LICENSE("GPL v2");
2475
