linux/drivers/media/dvb-frontends/lgs8gxx_priv.h
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   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 *    Support for Legend Silicon GB20600 (a.k.a DMB-TH) demodulator
   4 *    LGS8913, LGS8GL5, LGS8G75
   5 *    experimental support LGS8G42, LGS8G52
   6 *
   7 *    Copyright (C) 2007-2009 David T.L. Wong <davidtlwong@gmail.com>
   8 *    Copyright (C) 2008 Sirius International (Hong Kong) Limited
   9 *    Timothy Lee <timothy.lee@siriushk.com> (for initial work on LGS8GL5)
  10 */
  11
  12#ifndef LGS8913_PRIV_H
  13#define LGS8913_PRIV_H
  14
  15struct lgs8gxx_state {
  16        struct i2c_adapter *i2c;
  17        /* configuration settings */
  18        const struct lgs8gxx_config *config;
  19        struct dvb_frontend frontend;
  20        u16 curr_gi; /* current guard interval */
  21};
  22
  23#define SC_MASK         0x1C    /* Sub-Carrier Modulation Mask */
  24#define SC_QAM64        0x10    /* 64QAM modulation */
  25#define SC_QAM32        0x0C    /* 32QAM modulation */
  26#define SC_QAM16        0x08    /* 16QAM modulation */
  27#define SC_QAM4NR       0x04    /* 4QAM-NR modulation */
  28#define SC_QAM4         0x00    /* 4QAM modulation */
  29
  30#define LGS_FEC_MASK    0x03    /* FEC Rate Mask */
  31#define LGS_FEC_0_4     0x00    /* FEC Rate 0.4 */
  32#define LGS_FEC_0_6     0x01    /* FEC Rate 0.6 */
  33#define LGS_FEC_0_8     0x02    /* FEC Rate 0.8 */
  34
  35#define TIM_MASK          0x20  /* Time Interleave Length Mask */
  36#define TIM_LONG          0x20  /* Time Interleave Length = 720 */
  37#define TIM_MIDDLE     0x00   /* Time Interleave Length = 240 */
  38
  39#define CF_MASK 0x80    /* Control Frame Mask */
  40#define CF_EN   0x80    /* Control Frame On */
  41
  42#define GI_MASK 0x03    /* Guard Interval Mask */
  43#define GI_420  0x00    /* 1/9 Guard Interval */
  44#define GI_595  0x01    /* */
  45#define GI_945  0x02    /* 1/4 Guard Interval */
  46
  47
  48#define TS_PARALLEL     0x00    /* Parallel TS Output a.k.a. SPI */
  49#define TS_SERIAL       0x01    /* Serial TS Output a.k.a. SSI */
  50#define TS_CLK_NORMAL           0x00    /* MPEG Clock Normal */
  51#define TS_CLK_INVERTED         0x02    /* MPEG Clock Inverted */
  52#define TS_CLK_GATED            0x00    /* MPEG clock gated */
  53#define TS_CLK_FREERUN          0x04    /* MPEG clock free running*/
  54
  55
  56#endif
  57