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4#ifndef __HNAE3_H
5#define __HNAE3_H
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24#include <linux/acpi.h>
25#include <linux/dcbnl.h>
26#include <linux/delay.h>
27#include <linux/device.h>
28#include <linux/module.h>
29#include <linux/netdevice.h>
30#include <linux/pci.h>
31#include <linux/types.h>
32
33#define HNAE3_MOD_VERSION "1.0"
34
35#define HNAE3_MIN_VECTOR_NUM 2
36
37
38#define HNAE3_DEV_ID_GE 0xA220
39#define HNAE3_DEV_ID_25GE 0xA221
40#define HNAE3_DEV_ID_25GE_RDMA 0xA222
41#define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223
42#define HNAE3_DEV_ID_50GE_RDMA 0xA224
43#define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225
44#define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226
45#define HNAE3_DEV_ID_100G_VF 0xA22E
46#define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F
47
48#define HNAE3_CLASS_NAME_SIZE 16
49
50#define HNAE3_DEV_INITED_B 0x0
51#define HNAE3_DEV_SUPPORT_ROCE_B 0x1
52#define HNAE3_DEV_SUPPORT_DCB_B 0x2
53#define HNAE3_KNIC_CLIENT_INITED_B 0x3
54#define HNAE3_UNIC_CLIENT_INITED_B 0x4
55#define HNAE3_ROCE_CLIENT_INITED_B 0x5
56#define HNAE3_DEV_SUPPORT_FD_B 0x6
57#define HNAE3_DEV_SUPPORT_GRO_B 0x7
58
59#define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
60 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
61
62#define hnae3_dev_roce_supported(hdev) \
63 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
64
65#define hnae3_dev_dcb_supported(hdev) \
66 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
67
68#define hnae3_dev_fd_supported(hdev) \
69 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B)
70
71#define hnae3_dev_gro_supported(hdev) \
72 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B)
73
74#define ring_ptr_move_fw(ring, p) \
75 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
76#define ring_ptr_move_bw(ring, p) \
77 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
78
79enum hns_desc_type {
80 DESC_TYPE_UNKNOWN,
81 DESC_TYPE_SKB,
82 DESC_TYPE_FRAGLIST_SKB,
83 DESC_TYPE_PAGE,
84};
85
86struct hnae3_handle;
87
88struct hnae3_queue {
89 void __iomem *io_base;
90 struct hnae3_ae_algo *ae_algo;
91 struct hnae3_handle *handle;
92 int tqp_index;
93 u32 buf_size;
94 u16 tx_desc_num;
95 u16 rx_desc_num;
96};
97
98struct hns3_mac_stats {
99 u64 tx_pause_cnt;
100 u64 rx_pause_cnt;
101};
102
103
104enum hnae3_loop {
105 HNAE3_LOOP_APP,
106 HNAE3_LOOP_SERIAL_SERDES,
107 HNAE3_LOOP_PARALLEL_SERDES,
108 HNAE3_LOOP_PHY,
109 HNAE3_LOOP_NONE,
110};
111
112enum hnae3_client_type {
113 HNAE3_CLIENT_KNIC,
114 HNAE3_CLIENT_ROCE,
115};
116
117
118enum hnae3_media_type {
119 HNAE3_MEDIA_TYPE_UNKNOWN,
120 HNAE3_MEDIA_TYPE_FIBER,
121 HNAE3_MEDIA_TYPE_COPPER,
122 HNAE3_MEDIA_TYPE_BACKPLANE,
123 HNAE3_MEDIA_TYPE_NONE,
124};
125
126
127enum hnae3_module_type {
128 HNAE3_MODULE_TYPE_UNKNOWN = 0x00,
129 HNAE3_MODULE_TYPE_FIBRE_LR = 0x01,
130 HNAE3_MODULE_TYPE_FIBRE_SR = 0x02,
131 HNAE3_MODULE_TYPE_AOC = 0x03,
132 HNAE3_MODULE_TYPE_CR = 0x04,
133 HNAE3_MODULE_TYPE_KR = 0x05,
134 HNAE3_MODULE_TYPE_TP = 0x06,
135};
136
137enum hnae3_fec_mode {
138 HNAE3_FEC_AUTO = 0,
139 HNAE3_FEC_BASER,
140 HNAE3_FEC_RS,
141 HNAE3_FEC_USER_DEF,
142};
143
144enum hnae3_reset_notify_type {
145 HNAE3_UP_CLIENT,
146 HNAE3_DOWN_CLIENT,
147 HNAE3_INIT_CLIENT,
148 HNAE3_UNINIT_CLIENT,
149};
150
151enum hnae3_hw_error_type {
152 HNAE3_PPU_POISON_ERROR,
153 HNAE3_CMDQ_ECC_ERROR,
154 HNAE3_IMP_RD_POISON_ERROR,
155};
156
157enum hnae3_reset_type {
158 HNAE3_VF_RESET,
159 HNAE3_VF_FUNC_RESET,
160 HNAE3_VF_PF_FUNC_RESET,
161 HNAE3_VF_FULL_RESET,
162 HNAE3_FLR_RESET,
163 HNAE3_FUNC_RESET,
164 HNAE3_GLOBAL_RESET,
165 HNAE3_IMP_RESET,
166 HNAE3_UNKNOWN_RESET,
167 HNAE3_NONE_RESET,
168 HNAE3_MAX_RESET,
169};
170
171enum hnae3_port_base_vlan_state {
172 HNAE3_PORT_BASE_VLAN_DISABLE,
173 HNAE3_PORT_BASE_VLAN_ENABLE,
174 HNAE3_PORT_BASE_VLAN_MODIFY,
175 HNAE3_PORT_BASE_VLAN_NOCHANGE,
176};
177
178struct hnae3_vector_info {
179 u8 __iomem *io_addr;
180 int vector;
181};
182
183#define HNAE3_RING_TYPE_B 0
184#define HNAE3_RING_TYPE_TX 0
185#define HNAE3_RING_TYPE_RX 1
186#define HNAE3_RING_GL_IDX_S 0
187#define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
188#define HNAE3_RING_GL_RX 0
189#define HNAE3_RING_GL_TX 1
190
191#define HNAE3_FW_VERSION_BYTE3_SHIFT 24
192#define HNAE3_FW_VERSION_BYTE3_MASK GENMASK(31, 24)
193#define HNAE3_FW_VERSION_BYTE2_SHIFT 16
194#define HNAE3_FW_VERSION_BYTE2_MASK GENMASK(23, 16)
195#define HNAE3_FW_VERSION_BYTE1_SHIFT 8
196#define HNAE3_FW_VERSION_BYTE1_MASK GENMASK(15, 8)
197#define HNAE3_FW_VERSION_BYTE0_SHIFT 0
198#define HNAE3_FW_VERSION_BYTE0_MASK GENMASK(7, 0)
199
200struct hnae3_ring_chain_node {
201 struct hnae3_ring_chain_node *next;
202 u32 tqp_index;
203 u32 flag;
204 u32 int_gl_idx;
205};
206
207#define HNAE3_IS_TX_RING(node) \
208 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
209
210struct hnae3_client_ops {
211 int (*init_instance)(struct hnae3_handle *handle);
212 void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
213 void (*link_status_change)(struct hnae3_handle *handle, bool state);
214 int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
215 int (*reset_notify)(struct hnae3_handle *handle,
216 enum hnae3_reset_notify_type type);
217 void (*process_hw_error)(struct hnae3_handle *handle,
218 enum hnae3_hw_error_type);
219};
220
221#define HNAE3_CLIENT_NAME_LENGTH 16
222struct hnae3_client {
223 char name[HNAE3_CLIENT_NAME_LENGTH];
224 unsigned long state;
225 enum hnae3_client_type type;
226 const struct hnae3_client_ops *ops;
227 struct list_head node;
228};
229
230struct hnae3_ae_dev {
231 struct pci_dev *pdev;
232 const struct hnae3_ae_ops *ops;
233 struct list_head node;
234 u32 flag;
235 unsigned long hw_err_reset_req;
236 void *priv;
237};
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380struct hnae3_ae_ops {
381 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
382 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
383 void (*flr_prepare)(struct hnae3_ae_dev *ae_dev);
384 void (*flr_done)(struct hnae3_ae_dev *ae_dev);
385 int (*init_client_instance)(struct hnae3_client *client,
386 struct hnae3_ae_dev *ae_dev);
387 void (*uninit_client_instance)(struct hnae3_client *client,
388 struct hnae3_ae_dev *ae_dev);
389 int (*start)(struct hnae3_handle *handle);
390 void (*stop)(struct hnae3_handle *handle);
391 int (*client_start)(struct hnae3_handle *handle);
392 void (*client_stop)(struct hnae3_handle *handle);
393 int (*get_status)(struct hnae3_handle *handle);
394 void (*get_ksettings_an_result)(struct hnae3_handle *handle,
395 u8 *auto_neg, u32 *speed, u8 *duplex);
396
397 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
398 u8 duplex);
399
400 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
401 u8 *module_type);
402 int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
403 void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
404 u8 *fec_mode);
405 int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
406 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
407 int (*set_loopback)(struct hnae3_handle *handle,
408 enum hnae3_loop loop_mode, bool en);
409
410 int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
411 bool en_mc_pmc);
412 void (*request_update_promisc_mode)(struct hnae3_handle *handle);
413 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
414
415 void (*get_pauseparam)(struct hnae3_handle *handle,
416 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
417 int (*set_pauseparam)(struct hnae3_handle *handle,
418 u32 auto_neg, u32 rx_en, u32 tx_en);
419
420 int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
421 int (*get_autoneg)(struct hnae3_handle *handle);
422 int (*restart_autoneg)(struct hnae3_handle *handle);
423 int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
424
425 void (*get_coalesce_usecs)(struct hnae3_handle *handle,
426 u32 *tx_usecs, u32 *rx_usecs);
427 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
428 u32 *tx_frames, u32 *rx_frames);
429 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
430 int (*set_coalesce_frames)(struct hnae3_handle *handle,
431 u32 coalesce_frames);
432 void (*get_coalesce_range)(struct hnae3_handle *handle,
433 u32 *tx_frames_low, u32 *rx_frames_low,
434 u32 *tx_frames_high, u32 *rx_frames_high,
435 u32 *tx_usecs_low, u32 *rx_usecs_low,
436 u32 *tx_usecs_high, u32 *rx_usecs_high);
437
438 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
439 int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
440 bool is_first);
441 int (*do_ioctl)(struct hnae3_handle *handle,
442 struct ifreq *ifr, int cmd);
443 int (*add_uc_addr)(struct hnae3_handle *handle,
444 const unsigned char *addr);
445 int (*rm_uc_addr)(struct hnae3_handle *handle,
446 const unsigned char *addr);
447 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
448 int (*add_mc_addr)(struct hnae3_handle *handle,
449 const unsigned char *addr);
450 int (*rm_mc_addr)(struct hnae3_handle *handle,
451 const unsigned char *addr);
452 void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
453 void (*update_stats)(struct hnae3_handle *handle,
454 struct net_device_stats *net_stats);
455 void (*get_stats)(struct hnae3_handle *handle, u64 *data);
456 void (*get_mac_stats)(struct hnae3_handle *handle,
457 struct hns3_mac_stats *mac_stats);
458 void (*get_strings)(struct hnae3_handle *handle,
459 u32 stringset, u8 *data);
460 int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
461
462 void (*get_regs)(struct hnae3_handle *handle, u32 *version,
463 void *data);
464 int (*get_regs_len)(struct hnae3_handle *handle);
465
466 u32 (*get_rss_key_size)(struct hnae3_handle *handle);
467 u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
468 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
469 u8 *hfunc);
470 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
471 const u8 *key, const u8 hfunc);
472 int (*set_rss_tuple)(struct hnae3_handle *handle,
473 struct ethtool_rxnfc *cmd);
474 int (*get_rss_tuple)(struct hnae3_handle *handle,
475 struct ethtool_rxnfc *cmd);
476
477 int (*get_tc_size)(struct hnae3_handle *handle);
478
479 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
480 struct hnae3_vector_info *vector_info);
481 int (*put_vector)(struct hnae3_handle *handle, int vector_num);
482 int (*map_ring_to_vector)(struct hnae3_handle *handle,
483 int vector_num,
484 struct hnae3_ring_chain_node *vr_chain);
485 int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
486 int vector_num,
487 struct hnae3_ring_chain_node *vr_chain);
488
489 int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
490 u32 (*get_fw_version)(struct hnae3_handle *handle);
491 void (*get_mdix_mode)(struct hnae3_handle *handle,
492 u8 *tp_mdix_ctrl, u8 *tp_mdix);
493
494 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
495 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
496 u16 vlan_id, bool is_kill);
497 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
498 u16 vlan, u8 qos, __be16 proto);
499 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
500 void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
501 enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
502 unsigned long *addr);
503 void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
504 enum hnae3_reset_type rst_type);
505 void (*get_channels)(struct hnae3_handle *handle,
506 struct ethtool_channels *ch);
507 void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
508 u16 *alloc_tqps, u16 *max_rss_size);
509 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
510 bool rxfh_configured);
511 void (*get_flowctrl_adv)(struct hnae3_handle *handle,
512 u32 *flowctrl_adv);
513 int (*set_led_id)(struct hnae3_handle *handle,
514 enum ethtool_phys_id_state status);
515 void (*get_link_mode)(struct hnae3_handle *handle,
516 unsigned long *supported,
517 unsigned long *advertising);
518 int (*add_fd_entry)(struct hnae3_handle *handle,
519 struct ethtool_rxnfc *cmd);
520 int (*del_fd_entry)(struct hnae3_handle *handle,
521 struct ethtool_rxnfc *cmd);
522 void (*del_all_fd_entries)(struct hnae3_handle *handle,
523 bool clear_list);
524 int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
525 struct ethtool_rxnfc *cmd);
526 int (*get_fd_rule_info)(struct hnae3_handle *handle,
527 struct ethtool_rxnfc *cmd);
528 int (*get_fd_all_rules)(struct hnae3_handle *handle,
529 struct ethtool_rxnfc *cmd, u32 *rule_locs);
530 void (*enable_fd)(struct hnae3_handle *handle, bool enable);
531 int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
532 u16 flow_id, struct flow_keys *fkeys);
533 int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf);
534 pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
535 bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
536 bool (*ae_dev_resetting)(struct hnae3_handle *handle);
537 unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
538 int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
539 u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
540 void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
541 int (*mac_connect_phy)(struct hnae3_handle *handle);
542 void (*mac_disconnect_phy)(struct hnae3_handle *handle);
543 int (*get_vf_config)(struct hnae3_handle *handle, int vf,
544 struct ifla_vf_info *ivf);
545 int (*set_vf_link_state)(struct hnae3_handle *handle, int vf,
546 int link_state);
547 int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf,
548 bool enable);
549 int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable);
550 int (*set_vf_rate)(struct hnae3_handle *handle, int vf,
551 int min_tx_rate, int max_tx_rate, bool force);
552 int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p);
553 int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset,
554 u32 len, u8 *data);
555 bool (*get_cmdq_stat)(struct hnae3_handle *handle);
556};
557
558struct hnae3_dcb_ops {
559
560 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
561 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
562 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
563 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
564
565
566 u8 (*getdcbx)(struct hnae3_handle *);
567 u8 (*setdcbx)(struct hnae3_handle *, u8);
568
569 int (*setup_tc)(struct hnae3_handle *, u8, u8 *);
570};
571
572struct hnae3_ae_algo {
573 const struct hnae3_ae_ops *ops;
574 struct list_head node;
575 const struct pci_device_id *pdev_id_table;
576};
577
578#define HNAE3_INT_NAME_LEN 32
579#define HNAE3_ITR_COUNTDOWN_START 100
580
581struct hnae3_tc_info {
582 u16 tqp_offset;
583 u16 tqp_count;
584 u8 tc;
585 bool enable;
586};
587
588#define HNAE3_MAX_TC 8
589#define HNAE3_MAX_USER_PRIO 8
590struct hnae3_knic_private_info {
591 struct net_device *netdev;
592 u16 rss_size;
593 u16 req_rss_size;
594 u16 rx_buf_len;
595 u16 num_tx_desc;
596 u16 num_rx_desc;
597
598 u8 num_tc;
599 u8 prio_tc[HNAE3_MAX_USER_PRIO];
600 struct hnae3_tc_info tc_info[HNAE3_MAX_TC];
601
602 u16 num_tqps;
603 struct hnae3_queue **tqp;
604 const struct hnae3_dcb_ops *dcb_ops;
605
606 u16 int_rl_setting;
607 enum pkt_hash_types rss_type;
608};
609
610struct hnae3_roce_private_info {
611 struct net_device *netdev;
612 void __iomem *roce_io_base;
613 int base_vector;
614 int num_vectors;
615
616
617
618
619
620 unsigned long reset_state;
621 unsigned long instance_state;
622 unsigned long state;
623};
624
625#define HNAE3_SUPPORT_APP_LOOPBACK BIT(0)
626#define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1)
627#define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2)
628#define HNAE3_SUPPORT_VF BIT(3)
629#define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4)
630
631#define HNAE3_USER_UPE BIT(0)
632#define HNAE3_USER_MPE BIT(1)
633#define HNAE3_BPE BIT(2)
634#define HNAE3_OVERFLOW_UPE BIT(3)
635#define HNAE3_OVERFLOW_MPE BIT(4)
636#define HNAE3_VLAN_FLTR BIT(5)
637#define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
638#define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
639
640struct hnae3_handle {
641 struct hnae3_client *client;
642 struct pci_dev *pdev;
643 void *priv;
644 struct hnae3_ae_algo *ae_algo;
645 u64 flags;
646
647 union {
648 struct net_device *netdev;
649 struct hnae3_knic_private_info kinfo;
650 struct hnae3_roce_private_info rinfo;
651 };
652
653 u32 numa_node_mask;
654
655 enum hnae3_port_base_vlan_state port_base_vlan_state;
656
657 u8 netdev_flags;
658 struct dentry *hnae3_dbgfs;
659
660
661 u32 msg_enable;
662};
663
664#define hnae3_set_field(origin, mask, shift, val) \
665 do { \
666 (origin) &= (~(mask)); \
667 (origin) |= ((val) << (shift)) & (mask); \
668 } while (0)
669#define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
670
671#define hnae3_set_bit(origin, shift, val) \
672 hnae3_set_field((origin), (0x1 << (shift)), (shift), (val))
673#define hnae3_get_bit(origin, shift) \
674 hnae3_get_field((origin), (0x1 << (shift)), (shift))
675
676int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
677void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
678
679void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
680void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
681
682void hnae3_unregister_client(struct hnae3_client *client);
683int hnae3_register_client(struct hnae3_client *client);
684
685void hnae3_set_client_init_flag(struct hnae3_client *client,
686 struct hnae3_ae_dev *ae_dev,
687 unsigned int inited);
688#endif
689