1
2#ifndef LINUX_B43_PHY_LP_H_
3#define LINUX_B43_PHY_LP_H_
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9#define B43_LPPHY_B_VERSION B43_PHY_CCK(0x00)
10#define B43_LPPHY_B_BBCONFIG B43_PHY_CCK(0x01)
11#define B43_LPPHY_B_RX_STAT0 B43_PHY_CCK(0x04)
12#define B43_LPPHY_B_RX_STAT1 B43_PHY_CCK(0x05)
13#define B43_LPPHY_B_CRS_THRESH B43_PHY_CCK(0x06)
14#define B43_LPPHY_B_TXERROR B43_PHY_CCK(0x07)
15#define B43_LPPHY_B_CHANNEL B43_PHY_CCK(0x08)
16#define B43_LPPHY_B_WORKAROUND B43_PHY_CCK(0x09)
17#define B43_LPPHY_B_TEST B43_PHY_CCK(0x0A)
18#define B43_LPPHY_B_FOURWIRE_ADDR B43_PHY_CCK(0x0B)
19#define B43_LPPHY_B_FOURWIRE_DATA_HI B43_PHY_CCK(0x0C)
20#define B43_LPPHY_B_FOURWIRE_DATA_LO B43_PHY_CCK(0x0D)
21#define B43_LPPHY_B_BIST_STAT B43_PHY_CCK(0x0E)
22#define B43_LPPHY_PA_RAMP_TX_TO B43_PHY_CCK(0x10)
23#define B43_LPPHY_RF_SYNTH_DC_TIMER B43_PHY_CCK(0x11)
24#define B43_LPPHY_PA_RAMP_TX_TIME_IN B43_PHY_CCK(0x12)
25#define B43_LPPHY_RX_FILTER_TIME_IN B43_PHY_CCK(0x13)
26#define B43_LPPHY_PLL_COEFF_S B43_PHY_CCK(0x18)
27#define B43_LPPHY_PLL_OUT B43_PHY_CCK(0x19)
28#define B43_LPPHY_RSSI_THRES B43_PHY_CCK(0x20)
29#define B43_LPPHY_IQ_THRES_HH B43_PHY_CCK(0x21)
30#define B43_LPPHY_IQ_THRES_H B43_PHY_CCK(0x22)
31#define B43_LPPHY_IQ_THRES_L B43_PHY_CCK(0x23)
32#define B43_LPPHY_IQ_THRES_LL B43_PHY_CCK(0x24)
33#define B43_LPPHY_AGC_GAIN B43_PHY_CCK(0x25)
34#define B43_LPPHY_LNA_GAIN_RANGE B43_PHY_CCK(0x26)
35#define B43_LPPHY_JSSI B43_PHY_CCK(0x27)
36#define B43_LPPHY_TSSI_CTL B43_PHY_CCK(0x28)
37#define B43_LPPHY_TSSI B43_PHY_CCK(0x29)
38#define B43_LPPHY_TR_LOSS B43_PHY_CCK(0x2A)
39#define B43_LPPHY_LO_LEAKAGE B43_PHY_CCK(0x2B)
40#define B43_LPPHY_LO_RSSIACC B43_PHY_CCK(0x2C)
41#define B43_LPPHY_LO_IQ_MAG_ACC B43_PHY_CCK(0x2D)
42#define B43_LPPHY_TX_DCOFFSET1 B43_PHY_CCK(0x2E)
43#define B43_LPPHY_TX_DCOFFSET2 B43_PHY_CCK(0x2F)
44#define B43_LPPHY_SYNCPEAKCNT B43_PHY_CCK(0x30)
45#define B43_LPPHY_SYNCFREQ B43_PHY_CCK(0x31)
46#define B43_LPPHY_SYNCDIVERSITYCTL B43_PHY_CCK(0x32)
47#define B43_LPPHY_PEAKENERGYL B43_PHY_CCK(0x33)
48#define B43_LPPHY_PEAKENERGYH B43_PHY_CCK(0x34)
49#define B43_LPPHY_SYNCCTL B43_PHY_CCK(0x35)
50#define B43_LPPHY_DSSSSTEP B43_PHY_CCK(0x38)
51#define B43_LPPHY_DSSSWARMUP B43_PHY_CCK(0x39)
52#define B43_LPPHY_DSSSSIGPOW B43_PHY_CCK(0x3D)
53#define B43_LPPHY_SFDDETECTBLOCKTIME B43_PHY_CCK(0x40)
54#define B43_LPPHY_SFDTO B43_PHY_CCK(0x41)
55#define B43_LPPHY_SFDCTL B43_PHY_CCK(0x42)
56#define B43_LPPHY_RXDBG B43_PHY_CCK(0x43)
57#define B43_LPPHY_RX_DELAYCOMP B43_PHY_CCK(0x44)
58#define B43_LPPHY_CRSDROPOUTTO B43_PHY_CCK(0x45)
59#define B43_LPPHY_PSEUDOSHORTTO B43_PHY_CCK(0x46)
60#define B43_LPPHY_PR3931 B43_PHY_CCK(0x47)
61#define B43_LPPHY_DSSSCOEFF1 B43_PHY_CCK(0x48)
62#define B43_LPPHY_DSSSCOEFF2 B43_PHY_CCK(0x49)
63#define B43_LPPHY_CCKCOEFF1 B43_PHY_CCK(0x4A)
64#define B43_LPPHY_CCKCOEFF2 B43_PHY_CCK(0x4B)
65#define B43_LPPHY_TRCORR B43_PHY_CCK(0x4C)
66#define B43_LPPHY_ANGLESCALE B43_PHY_CCK(0x4D)
67#define B43_LPPHY_OPTIONALMODES2 B43_PHY_CCK(0x4F)
68#define B43_LPPHY_CCKLMSSTEPSIZE B43_PHY_CCK(0x50)
69#define B43_LPPHY_DFEBYPASS B43_PHY_CCK(0x51)
70#define B43_LPPHY_CCKSTARTDELAYLONG B43_PHY_CCK(0x52)
71#define B43_LPPHY_CCKSTARTDELAYSHORT B43_PHY_CCK(0x53)
72#define B43_LPPHY_PPROCCHDELAY B43_PHY_CCK(0x54)
73#define B43_LPPHY_PPROCONOFF B43_PHY_CCK(0x55)
74#define B43_LPPHY_LNAGAINTWOBIT10 B43_PHY_CCK(0x5B)
75#define B43_LPPHY_LNAGAINTWOBIT32 B43_PHY_CCK(0x5C)
76#define B43_LPPHY_OPTIONALMODES B43_PHY_CCK(0x5D)
77#define B43_LPPHY_B_RX_STAT2 B43_PHY_CCK(0x5E)
78#define B43_LPPHY_B_RX_STAT3 B43_PHY_CCK(0x5F)
79#define B43_LPPHY_PWDNDACDELAY B43_PHY_CCK(0x63)
80#define B43_LPPHY_FINEDIGIGAIN_CTL B43_PHY_CCK(0x67)
81#define B43_LPPHY_LG2GAINTBLLNA8 B43_PHY_CCK(0x68)
82#define B43_LPPHY_LG2GAINTBLLNA28 B43_PHY_CCK(0x69)
83#define B43_LPPHY_GAINTBLLNATRSW B43_PHY_CCK(0x6A)
84#define B43_LPPHY_PEAKENERGY B43_PHY_CCK(0x6B)
85#define B43_LPPHY_LG2INITGAIN B43_PHY_CCK(0x6C)
86#define B43_LPPHY_BLANKCOUNTLNAPGA B43_PHY_CCK(0x6D)
87#define B43_LPPHY_LNAGAINTWOBIT54 B43_PHY_CCK(0x6E)
88#define B43_LPPHY_LNAGAINTWOBIT76 B43_PHY_CCK(0x6F)
89#define B43_LPPHY_JSSICTL B43_PHY_CCK(0x70)
90#define B43_LPPHY_LG2GAINTBLLNA44 B43_PHY_CCK(0x71)
91#define B43_LPPHY_LG2GAINTBLLNA62 B43_PHY_CCK(0x72)
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93
94#define B43_LPPHY_VERSION B43_PHY_OFDM(0x00)
95#define B43_LPPHY_BBCONFIG B43_PHY_OFDM(0x01)
96#define B43_LPPHY_RX_STAT0 B43_PHY_OFDM(0x04)
97#define B43_LPPHY_RX_STAT1 B43_PHY_OFDM(0x05)
98#define B43_LPPHY_TX_ERROR B43_PHY_OFDM(0x07)
99#define B43_LPPHY_CHANNEL B43_PHY_OFDM(0x08)
100#define B43_LPPHY_WORKAROUND B43_PHY_OFDM(0x09)
101#define B43_LPPHY_FOURWIRE_ADDR B43_PHY_OFDM(0x0B)
102#define B43_LPPHY_FOURWIREDATAHI B43_PHY_OFDM(0x0C)
103#define B43_LPPHY_FOURWIREDATALO B43_PHY_OFDM(0x0D)
104#define B43_LPPHY_BISTSTAT0 B43_PHY_OFDM(0x0E)
105#define B43_LPPHY_BISTSTAT1 B43_PHY_OFDM(0x0F)
106#define B43_LPPHY_CRSGAIN_CTL B43_PHY_OFDM(0x10)
107#define B43_LPPHY_OFDMPWR_THRESH0 B43_PHY_OFDM(0x11)
108#define B43_LPPHY_OFDMPWR_THRESH1 B43_PHY_OFDM(0x12)
109#define B43_LPPHY_OFDMPWR_THRESH2 B43_PHY_OFDM(0x13)
110#define B43_LPPHY_DSSSPWR_THRESH0 B43_PHY_OFDM(0x14)
111#define B43_LPPHY_DSSSPWR_THRESH1 B43_PHY_OFDM(0x15)
112#define B43_LPPHY_MINPWR_LEVEL B43_PHY_OFDM(0x16)
113#define B43_LPPHY_OFDMSYNCTHRESH0 B43_PHY_OFDM(0x17)
114#define B43_LPPHY_OFDMSYNCTHRESH1 B43_PHY_OFDM(0x18)
115#define B43_LPPHY_FINEFREQEST B43_PHY_OFDM(0x19)
116#define B43_LPPHY_IDLEAFTERPKTRXTO B43_PHY_OFDM(0x1A)
117#define B43_LPPHY_LTRN_CTL B43_PHY_OFDM(0x1B)
118#define B43_LPPHY_DCOFFSETTRANSIENT B43_PHY_OFDM(0x1C)
119#define B43_LPPHY_PREAMBLEINTO B43_PHY_OFDM(0x1D)
120#define B43_LPPHY_PREAMBLECONFIRMTO B43_PHY_OFDM(0x1E)
121#define B43_LPPHY_CLIPTHRESH B43_PHY_OFDM(0x1F)
122#define B43_LPPHY_CLIPCTRTHRESH B43_PHY_OFDM(0x20)
123#define B43_LPPHY_OFDMSYNCTIMER_CTL B43_PHY_OFDM(0x21)
124#define B43_LPPHY_WAITFORPHYSELTO B43_PHY_OFDM(0x22)
125#define B43_LPPHY_HIGAINDB B43_PHY_OFDM(0x23)
126#define B43_LPPHY_LOWGAINDB B43_PHY_OFDM(0x24)
127#define B43_LPPHY_VERYLOWGAINDB B43_PHY_OFDM(0x25)
128#define B43_LPPHY_GAINMISMATCH B43_PHY_OFDM(0x26)
129#define B43_LPPHY_GAINDIRECTMISMATCH B43_PHY_OFDM(0x27)
130#define B43_LPPHY_PWR_THRESH0 B43_PHY_OFDM(0x28)
131#define B43_LPPHY_PWR_THRESH1 B43_PHY_OFDM(0x29)
132#define B43_LPPHY_DETECTOR_DELAY_ADJUST B43_PHY_OFDM(0x2A)
133#define B43_LPPHY_REDUCED_DETECTOR_DELAY B43_PHY_OFDM(0x2B)
134#define B43_LPPHY_DATA_TO B43_PHY_OFDM(0x2C)
135#define B43_LPPHY_CORRELATOR_DIS_DELAY B43_PHY_OFDM(0x2D)
136#define B43_LPPHY_DIVERSITY_GAINBACK B43_PHY_OFDM(0x2E)
137#define B43_LPPHY_DSSS_CONFIRM_CNT B43_PHY_OFDM(0x2F)
138#define B43_LPPHY_DC_BLANK_INT B43_PHY_OFDM(0x30)
139#define B43_LPPHY_GAIN_MISMATCH_LIMIT B43_PHY_OFDM(0x31)
140#define B43_LPPHY_CRS_ED_THRESH B43_PHY_OFDM(0x32)
141#define B43_LPPHY_PHASE_SHIFT_CTL B43_PHY_OFDM(0x33)
142#define B43_LPPHY_INPUT_PWRDB B43_PHY_OFDM(0x34)
143#define B43_LPPHY_OFDM_SYNC_CTL B43_PHY_OFDM(0x35)
144#define B43_LPPHY_AFE_ADC_CTL_0 B43_PHY_OFDM(0x36)
145#define B43_LPPHY_AFE_ADC_CTL_1 B43_PHY_OFDM(0x37)
146#define B43_LPPHY_AFE_ADC_CTL_2 B43_PHY_OFDM(0x38)
147#define B43_LPPHY_AFE_DAC_CTL B43_PHY_OFDM(0x39)
148#define B43_LPPHY_AFE_CTL B43_PHY_OFDM(0x3A)
149#define B43_LPPHY_AFE_CTL_OVR B43_PHY_OFDM(0x3B)
150#define B43_LPPHY_AFE_CTL_OVRVAL B43_PHY_OFDM(0x3C)
151#define B43_LPPHY_AFE_RSSI_CTL_0 B43_PHY_OFDM(0x3D)
152#define B43_LPPHY_AFE_RSSI_CTL_1 B43_PHY_OFDM(0x3E)
153#define B43_LPPHY_AFE_RSSI_SEL B43_PHY_OFDM(0x3F)
154#define B43_LPPHY_RADAR_THRESH B43_PHY_OFDM(0x40)
155#define B43_LPPHY_RADAR_BLANK_INT B43_PHY_OFDM(0x41)
156#define B43_LPPHY_RADAR_MIN_FM_INT B43_PHY_OFDM(0x42)
157#define B43_LPPHY_RADAR_GAIN_TO B43_PHY_OFDM(0x43)
158#define B43_LPPHY_RADAR_PULSE_TO B43_PHY_OFDM(0x44)
159#define B43_LPPHY_RADAR_DETECT_FM_CTL B43_PHY_OFDM(0x45)
160#define B43_LPPHY_RADAR_DETECT_EN B43_PHY_OFDM(0x46)
161#define B43_LPPHY_RADAR_RD_DATA_REG B43_PHY_OFDM(0x47)
162#define B43_LPPHY_LP_PHY_CTL B43_PHY_OFDM(0x48)
163#define B43_LPPHY_CLASSIFIER_CTL B43_PHY_OFDM(0x49)
164#define B43_LPPHY_RESET_CTL B43_PHY_OFDM(0x4A)
165#define B43_LPPHY_CLKEN_CTL B43_PHY_OFDM(0x4B)
166#define B43_LPPHY_RF_OVERRIDE_0 B43_PHY_OFDM(0x4C)
167#define B43_LPPHY_RF_OVERRIDE_VAL_0 B43_PHY_OFDM(0x4D)
168#define B43_LPPHY_TR_LOOKUP_1 B43_PHY_OFDM(0x4E)
169#define B43_LPPHY_TR_LOOKUP_2 B43_PHY_OFDM(0x4F)
170#define B43_LPPHY_RSSISELLOOKUP1 B43_PHY_OFDM(0x50)
171#define B43_LPPHY_IQLO_CAL_CMD B43_PHY_OFDM(0x51)
172#define B43_LPPHY_IQLO_CAL_CMD_N_NUM B43_PHY_OFDM(0x52)
173#define B43_LPPHY_IQLO_CAL_CMD_G_CTL B43_PHY_OFDM(0x53)
174#define B43_LPPHY_MACINT_DBG_REGISTER B43_PHY_OFDM(0x54)
175#define B43_LPPHY_TABLE_ADDR B43_PHY_OFDM(0x55)
176#define B43_LPPHY_TABLEDATALO B43_PHY_OFDM(0x56)
177#define B43_LPPHY_TABLEDATAHI B43_PHY_OFDM(0x57)
178#define B43_LPPHY_PHY_CRS_ENABLE_ADDR B43_PHY_OFDM(0x58)
179#define B43_LPPHY_IDLETIME_CTL B43_PHY_OFDM(0x59)
180#define B43_LPPHY_IDLETIME_CRS_ON_LO B43_PHY_OFDM(0x5A)
181#define B43_LPPHY_IDLETIME_CRS_ON_HI B43_PHY_OFDM(0x5B)
182#define B43_LPPHY_IDLETIME_MEAS_TIME_LO B43_PHY_OFDM(0x5C)
183#define B43_LPPHY_IDLETIME_MEAS_TIME_HI B43_PHY_OFDM(0x5D)
184#define B43_LPPHY_RESET_LEN_OFDM_TX_ADDR B43_PHY_OFDM(0x5E)
185#define B43_LPPHY_RESET_LEN_OFDM_RX_ADDR B43_PHY_OFDM(0x5F)
186#define B43_LPPHY_REG_CRS_ENABLE B43_PHY_OFDM(0x60)
187#define B43_LPPHY_PLCP_TMT_STR0_CTR_MIN B43_PHY_OFDM(0x61)
188#define B43_LPPHY_PKT_FSM_RESET_LEN_VAL B43_PHY_OFDM(0x62)
189#define B43_LPPHY_READSYM2RESET_CTL B43_PHY_OFDM(0x63)
190#define B43_LPPHY_DC_FILTER_DELAY1 B43_PHY_OFDM(0x64)
191#define B43_LPPHY_PACKET_RX_ACTIVE_TO B43_PHY_OFDM(0x65)
192#define B43_LPPHY_ED_TOVAL B43_PHY_OFDM(0x66)
193#define B43_LPPHY_HOLD_CRS_ON_VAL B43_PHY_OFDM(0x67)
194#define B43_LPPHY_OFDM_TX_PHY_CRS_DELAY_VAL B43_PHY_OFDM(0x69)
195#define B43_LPPHY_CCK_TX_PHY_CRS_DELAY_VAL B43_PHY_OFDM(0x6A)
196#define B43_LPPHY_ED_ON_CONFIRM_TIMER_VAL B43_PHY_OFDM(0x6B)
197#define B43_LPPHY_ED_OFFSET_CONFIRM_TIMER_VAL B43_PHY_OFDM(0x6C)
198#define B43_LPPHY_PHY_CRS_OFFSET_TIMER_VAL B43_PHY_OFDM(0x6D)
199#define B43_LPPHY_ADC_COMPENSATION_CTL B43_PHY_OFDM(0x70)
200#define B43_LPPHY_LOG2_RBPSK_ADDR B43_PHY_OFDM(0x71)
201#define B43_LPPHY_LOG2_RQPSK_ADDR B43_PHY_OFDM(0x72)
202#define B43_LPPHY_LOG2_R16QAM_ADDR B43_PHY_OFDM(0x73)
203#define B43_LPPHY_LOG2_R64QAM_ADDR B43_PHY_OFDM(0x74)
204#define B43_LPPHY_OFFSET_BPSK_ADDR B43_PHY_OFDM(0x75)
205#define B43_LPPHY_OFFSET_QPSK_ADDR B43_PHY_OFDM(0x76)
206#define B43_LPPHY_OFFSET_16QAM_ADDR B43_PHY_OFDM(0x77)
207#define B43_LPPHY_OFFSET_64QAM_ADDR B43_PHY_OFDM(0x78)
208#define B43_LPPHY_ALPHA1 B43_PHY_OFDM(0x79)
209#define B43_LPPHY_ALPHA2 B43_PHY_OFDM(0x7A)
210#define B43_LPPHY_BETA1 B43_PHY_OFDM(0x7B)
211#define B43_LPPHY_BETA2 B43_PHY_OFDM(0x7C)
212#define B43_LPPHY_LOOP_NUM_ADDR B43_PHY_OFDM(0x7D)
213#define B43_LPPHY_STR_COLLMAX_SMPL_ADDR B43_PHY_OFDM(0x7E)
214#define B43_LPPHY_MAX_SMPL_COARSE_FINE_ADDR B43_PHY_OFDM(0x7F)
215#define B43_LPPHY_MAX_SMPL_COARSE_STR0CTR_ADDR B43_PHY_OFDM(0x80)
216#define B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR B43_PHY_OFDM(0x81)
217#define B43_LPPHY_IQ_NUM_SMPLS_ADDR B43_PHY_OFDM(0x82)
218#define B43_LPPHY_IQ_ACC_HI_ADDR B43_PHY_OFDM(0x83)
219#define B43_LPPHY_IQ_ACC_LO_ADDR B43_PHY_OFDM(0x84)
220#define B43_LPPHY_IQ_I_PWR_ACC_HI_ADDR B43_PHY_OFDM(0x85)
221#define B43_LPPHY_IQ_I_PWR_ACC_LO_ADDR B43_PHY_OFDM(0x86)
222#define B43_LPPHY_IQ_Q_PWR_ACC_HI_ADDR B43_PHY_OFDM(0x87)
223#define B43_LPPHY_IQ_Q_PWR_ACC_LO_ADDR B43_PHY_OFDM(0x88)
224#define B43_LPPHY_MAXNUMSTEPS B43_PHY_OFDM(0x89)
225#define B43_LPPHY_ROTORPHASE_ADDR B43_PHY_OFDM(0x8A)
226#define B43_LPPHY_ADVANCEDRETARDROTOR_ADDR B43_PHY_OFDM(0x8B)
227#define B43_LPPHY_RSSIADCDELAY_CTL_ADDR B43_PHY_OFDM(0x8D)
228#define B43_LPPHY_TSSISTAT_ADDR B43_PHY_OFDM(0x8E)
229#define B43_LPPHY_TEMPSENSESTAT_ADDR B43_PHY_OFDM(0x8F)
230#define B43_LPPHY_TEMPSENSE_CTL_ADDR B43_PHY_OFDM(0x90)
231#define B43_LPPHY_WRSSISTAT_ADDR B43_PHY_OFDM(0x91)
232#define B43_LPPHY_MUFACTORADDR B43_PHY_OFDM(0x92)
233#define B43_LPPHY_SCRAMSTATE_ADDR B43_PHY_OFDM(0x93)
234#define B43_LPPHY_TXHOLDOFFADDR B43_PHY_OFDM(0x94)
235#define B43_LPPHY_PKTGAINVAL_ADDR B43_PHY_OFDM(0x95)
236#define B43_LPPHY_COARSEESTIM_ADDR B43_PHY_OFDM(0x96)
237#define B43_LPPHY_STATE_TRANSITION_ADDR B43_PHY_OFDM(0x97)
238#define B43_LPPHY_TRN_OFFSET_ADDR B43_PHY_OFDM(0x98)
239#define B43_LPPHY_NUM_ROTOR_ADDR B43_PHY_OFDM(0x99)
240#define B43_LPPHY_VITERBI_OFFSET_ADDR B43_PHY_OFDM(0x9A)
241#define B43_LPPHY_SMPL_COLLECT_WAIT_ADDR B43_PHY_OFDM(0x9B)
242#define B43_LPPHY_A_PHY_CTL_ADDR B43_PHY_OFDM(0x9C)
243#define B43_LPPHY_NUM_PASS_THROUGH_ADDR B43_PHY_OFDM(0x9D)
244#define B43_LPPHY_RX_COMP_COEFF_S B43_PHY_OFDM(0x9E)
245#define B43_LPPHY_CPAROTATEVAL B43_PHY_OFDM(0x9F)
246#define B43_LPPHY_SMPL_PLAY_COUNT B43_PHY_OFDM(0xA0)
247#define B43_LPPHY_SMPL_PLAY_BUFFER_CTL B43_PHY_OFDM(0xA1)
248#define B43_LPPHY_FOURWIRE_CTL B43_PHY_OFDM(0xA2)
249#define B43_LPPHY_CPA_TAILCOUNT_VAL B43_PHY_OFDM(0xA3)
250#define B43_LPPHY_TX_PWR_CTL_CMD B43_PHY_OFDM(0xA4)
251#define B43_LPPHY_TX_PWR_CTL_CMD_MODE 0xE000
252#define B43_LPPHY_TX_PWR_CTL_CMD_MODE_OFF 0x0000
253#define B43_LPPHY_TX_PWR_CTL_CMD_MODE_SW 0x8000
254#define B43_LPPHY_TX_PWR_CTL_CMD_MODE_HW 0xE000
255#define B43_LPPHY_TX_PWR_CTL_NNUM B43_PHY_OFDM(0xA5)
256#define B43_LPPHY_TX_PWR_CTL_IDLETSSI B43_PHY_OFDM(0xA6)
257#define B43_LPPHY_TX_PWR_CTL_TARGETPWR B43_PHY_OFDM(0xA7)
258#define B43_LPPHY_TX_PWR_CTL_DELTAPWR_LIMIT B43_PHY_OFDM(0xA8)
259#define B43_LPPHY_TX_PWR_CTL_BASEINDEX B43_PHY_OFDM(0xA9)
260#define B43_LPPHY_TX_PWR_CTL_PWR_INDEX B43_PHY_OFDM(0xAA)
261#define B43_LPPHY_TX_PWR_CTL_STAT B43_PHY_OFDM(0xAB)
262#define B43_LPPHY_LP_RF_SIGNAL_LUT B43_PHY_OFDM(0xAC)
263#define B43_LPPHY_RX_RADIO_CTL_FILTER_STATE B43_PHY_OFDM(0xAD)
264#define B43_LPPHY_RX_RADIO_CTL B43_PHY_OFDM(0xAE)
265#define B43_LPPHY_NRSSI_STAT_ADDR B43_PHY_OFDM(0xAF)
266#define B43_LPPHY_RF_OVERRIDE_2 B43_PHY_OFDM(0xB0)
267#define B43_LPPHY_RF_OVERRIDE_2_VAL B43_PHY_OFDM(0xB1)
268#define B43_LPPHY_PS_CTL_OVERRIDE_VAL0 B43_PHY_OFDM(0xB2)
269#define B43_LPPHY_PS_CTL_OVERRIDE_VAL1 B43_PHY_OFDM(0xB3)
270#define B43_LPPHY_PS_CTL_OVERRIDE_VAL2 B43_PHY_OFDM(0xB4)
271#define B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL B43_PHY_OFDM(0xB5)
272#define B43_LPPHY_RX_GAIN_CTL_OVERRIDE_VAL B43_PHY_OFDM(0xB6)
273#define B43_LPPHY_AFE_DDFS B43_PHY_OFDM(0xB7)
274#define B43_LPPHY_AFE_DDFS_POINTER_INIT B43_PHY_OFDM(0xB8)
275#define B43_LPPHY_AFE_DDFS_INCR_INIT B43_PHY_OFDM(0xB9)
276#define B43_LPPHY_MRCNOISEREDUCTION B43_PHY_OFDM(0xBA)
277#define B43_LPPHY_TR_LOOKUP_3 B43_PHY_OFDM(0xBB)
278#define B43_LPPHY_TR_LOOKUP_4 B43_PHY_OFDM(0xBC)
279#define B43_LPPHY_RADAR_FIFO_STAT B43_PHY_OFDM(0xBD)
280#define B43_LPPHY_GPIO_OUTEN B43_PHY_OFDM(0xBE)
281#define B43_LPPHY_GPIO_SELECT B43_PHY_OFDM(0xBF)
282#define B43_LPPHY_GPIO_OUT B43_PHY_OFDM(0xC0)
283#define B43_LPPHY_4C3 B43_PHY_OFDM(0xC3)
284#define B43_LPPHY_4C4 B43_PHY_OFDM(0xC4)
285#define B43_LPPHY_4C5 B43_PHY_OFDM(0xC5)
286#define B43_LPPHY_TR_LOOKUP_5 B43_PHY_OFDM(0xC7)
287#define B43_LPPHY_TR_LOOKUP_6 B43_PHY_OFDM(0xC8)
288#define B43_LPPHY_TR_LOOKUP_7 B43_PHY_OFDM(0xC9)
289#define B43_LPPHY_TR_LOOKUP_8 B43_PHY_OFDM(0xCA)
290#define B43_LPPHY_RF_PWR_OVERRIDE B43_PHY_OFDM(0xD3)
291
292
293
294
295#define B43_LP_RADIO(radio_reg) (radio_reg)
296#define B43_LP_NORTH(radio_reg) B43_LP_RADIO(radio_reg)
297#define B43_LP_SOUTH(radio_reg) B43_LP_RADIO((radio_reg) | 0x4000)
298
299
300
301#define B2062_N_COMM1 B43_LP_NORTH(0x000)
302#define B2062_N_COMM2 B43_LP_NORTH(0x002)
303#define B2062_N_COMM3 B43_LP_NORTH(0x003)
304#define B2062_N_COMM4 B43_LP_NORTH(0x004)
305#define B2062_N_COMM5 B43_LP_NORTH(0x005)
306#define B2062_N_COMM6 B43_LP_NORTH(0x006)
307#define B2062_N_COMM7 B43_LP_NORTH(0x007)
308#define B2062_N_COMM8 B43_LP_NORTH(0x008)
309#define B2062_N_COMM9 B43_LP_NORTH(0x009)
310#define B2062_N_COMM10 B43_LP_NORTH(0x00A)
311#define B2062_N_COMM11 B43_LP_NORTH(0x00B)
312#define B2062_N_COMM12 B43_LP_NORTH(0x00C)
313#define B2062_N_COMM13 B43_LP_NORTH(0x00D)
314#define B2062_N_COMM14 B43_LP_NORTH(0x00E)
315#define B2062_N_COMM15 B43_LP_NORTH(0x00F)
316#define B2062_N_PDN_CTL0 B43_LP_NORTH(0x010)
317#define B2062_N_PDN_CTL1 B43_LP_NORTH(0x011)
318#define B2062_N_PDN_CTL2 B43_LP_NORTH(0x012)
319#define B2062_N_PDN_CTL3 B43_LP_NORTH(0x013)
320#define B2062_N_PDN_CTL4 B43_LP_NORTH(0x014)
321#define B2062_N_GEN_CTL0 B43_LP_NORTH(0x015)
322#define B2062_N_IQ_CALIB B43_LP_NORTH(0x016)
323#define B2062_N_LGENC B43_LP_NORTH(0x017)
324#define B2062_N_LGENA_LPF B43_LP_NORTH(0x018)
325#define B2062_N_LGENA_BIAS0 B43_LP_NORTH(0x019)
326#define B2062_N_LGNEA_BIAS1 B43_LP_NORTH(0x01A)
327#define B2062_N_LGENA_CTL0 B43_LP_NORTH(0x01B)
328#define B2062_N_LGENA_CTL1 B43_LP_NORTH(0x01C)
329#define B2062_N_LGENA_CTL2 B43_LP_NORTH(0x01D)
330#define B2062_N_LGENA_TUNE0 B43_LP_NORTH(0x01E)
331#define B2062_N_LGENA_TUNE1 B43_LP_NORTH(0x01F)
332#define B2062_N_LGENA_TUNE2 B43_LP_NORTH(0x020)
333#define B2062_N_LGENA_TUNE3 B43_LP_NORTH(0x021)
334#define B2062_N_LGENA_CTL3 B43_LP_NORTH(0x022)
335#define B2062_N_LGENA_CTL4 B43_LP_NORTH(0x023)
336#define B2062_N_LGENA_CTL5 B43_LP_NORTH(0x024)
337#define B2062_N_LGENA_CTL6 B43_LP_NORTH(0x025)
338#define B2062_N_LGENA_CTL7 B43_LP_NORTH(0x026)
339#define B2062_N_RXA_CTL0 B43_LP_NORTH(0x027)
340#define B2062_N_RXA_CTL1 B43_LP_NORTH(0x028)
341#define B2062_N_RXA_CTL2 B43_LP_NORTH(0x029)
342#define B2062_N_RXA_CTL3 B43_LP_NORTH(0x02A)
343#define B2062_N_RXA_CTL4 B43_LP_NORTH(0x02B)
344#define B2062_N_RXA_CTL5 B43_LP_NORTH(0x02C)
345#define B2062_N_RXA_CTL6 B43_LP_NORTH(0x02D)
346#define B2062_N_RXA_CTL7 B43_LP_NORTH(0x02E)
347#define B2062_N_RXBB_CTL0 B43_LP_NORTH(0x02F)
348#define B2062_N_RXBB_CTL1 B43_LP_NORTH(0x030)
349#define B2062_N_RXBB_CTL2 B43_LP_NORTH(0x031)
350#define B2062_N_RXBB_GAIN0 B43_LP_NORTH(0x032)
351#define B2062_N_RXBB_GAIN1 B43_LP_NORTH(0x033)
352#define B2062_N_RXBB_GAIN2 B43_LP_NORTH(0x034)
353#define B2062_N_RXBB_GAIN3 B43_LP_NORTH(0x035)
354#define B2062_N_RXBB_RSSI0 B43_LP_NORTH(0x036)
355#define B2062_N_RXBB_RSSI1 B43_LP_NORTH(0x037)
356#define B2062_N_RXBB_CALIB0 B43_LP_NORTH(0x038)
357#define B2062_N_RXBB_CALIB1 B43_LP_NORTH(0x039)
358#define B2062_N_RXBB_CALIB2 B43_LP_NORTH(0x03A)
359#define B2062_N_RXBB_BIAS0 B43_LP_NORTH(0x03B)
360#define B2062_N_RXBB_BIAS1 B43_LP_NORTH(0x03C)
361#define B2062_N_RXBB_BIAS2 B43_LP_NORTH(0x03D)
362#define B2062_N_RXBB_BIAS3 B43_LP_NORTH(0x03E)
363#define B2062_N_RXBB_BIAS4 B43_LP_NORTH(0x03F)
364#define B2062_N_RXBB_BIAS5 B43_LP_NORTH(0x040)
365#define B2062_N_RXBB_RSSI2 B43_LP_NORTH(0x041)
366#define B2062_N_RXBB_RSSI3 B43_LP_NORTH(0x042)
367#define B2062_N_RXBB_RSSI4 B43_LP_NORTH(0x043)
368#define B2062_N_RXBB_RSSI5 B43_LP_NORTH(0x044)
369#define B2062_N_TX_CTL0 B43_LP_NORTH(0x045)
370#define B2062_N_TX_CTL1 B43_LP_NORTH(0x046)
371#define B2062_N_TX_CTL2 B43_LP_NORTH(0x047)
372#define B2062_N_TX_CTL3 B43_LP_NORTH(0x048)
373#define B2062_N_TX_CTL4 B43_LP_NORTH(0x049)
374#define B2062_N_TX_CTL5 B43_LP_NORTH(0x04A)
375#define B2062_N_TX_CTL6 B43_LP_NORTH(0x04B)
376#define B2062_N_TX_CTL7 B43_LP_NORTH(0x04C)
377#define B2062_N_TX_CTL8 B43_LP_NORTH(0x04D)
378#define B2062_N_TX_CTL9 B43_LP_NORTH(0x04E)
379#define B2062_N_TX_CTL_A B43_LP_NORTH(0x04F)
380#define B2062_N_TX_GC2G B43_LP_NORTH(0x050)
381#define B2062_N_TX_GC5G B43_LP_NORTH(0x051)
382#define B2062_N_TX_TUNE B43_LP_NORTH(0x052)
383#define B2062_N_TX_PAD B43_LP_NORTH(0x053)
384#define B2062_N_TX_PGA B43_LP_NORTH(0x054)
385#define B2062_N_TX_PADAUX B43_LP_NORTH(0x055)
386#define B2062_N_TX_PGAAUX B43_LP_NORTH(0x056)
387#define B2062_N_TSSI_CTL0 B43_LP_NORTH(0x057)
388#define B2062_N_TSSI_CTL1 B43_LP_NORTH(0x058)
389#define B2062_N_TSSI_CTL2 B43_LP_NORTH(0x059)
390#define B2062_N_IQ_CALIB_CTL0 B43_LP_NORTH(0x05A)
391#define B2062_N_IQ_CALIB_CTL1 B43_LP_NORTH(0x05B)
392#define B2062_N_IQ_CALIB_CTL2 B43_LP_NORTH(0x05C)
393#define B2062_N_CALIB_TS B43_LP_NORTH(0x05D)
394#define B2062_N_CALIB_CTL0 B43_LP_NORTH(0x05E)
395#define B2062_N_CALIB_CTL1 B43_LP_NORTH(0x05F)
396#define B2062_N_CALIB_CTL2 B43_LP_NORTH(0x060)
397#define B2062_N_CALIB_CTL3 B43_LP_NORTH(0x061)
398#define B2062_N_CALIB_CTL4 B43_LP_NORTH(0x062)
399#define B2062_N_CALIB_DBG0 B43_LP_NORTH(0x063)
400#define B2062_N_CALIB_DBG1 B43_LP_NORTH(0x064)
401#define B2062_N_CALIB_DBG2 B43_LP_NORTH(0x065)
402#define B2062_N_CALIB_DBG3 B43_LP_NORTH(0x066)
403#define B2062_N_PSENSE_CTL0 B43_LP_NORTH(0x069)
404#define B2062_N_PSENSE_CTL1 B43_LP_NORTH(0x06A)
405#define B2062_N_PSENSE_CTL2 B43_LP_NORTH(0x06B)
406#define B2062_N_TEST_BUF0 B43_LP_NORTH(0x06C)
407
408
409#define B2062_S_COMM1 B43_LP_SOUTH(0x000)
410#define B2062_S_RADIO_ID_CODE B43_LP_SOUTH(0x001)
411#define B2062_S_COMM2 B43_LP_SOUTH(0x002)
412#define B2062_S_COMM3 B43_LP_SOUTH(0x003)
413#define B2062_S_COMM4 B43_LP_SOUTH(0x004)
414#define B2062_S_COMM5 B43_LP_SOUTH(0x005)
415#define B2062_S_COMM6 B43_LP_SOUTH(0x006)
416#define B2062_S_COMM7 B43_LP_SOUTH(0x007)
417#define B2062_S_COMM8 B43_LP_SOUTH(0x008)
418#define B2062_S_COMM9 B43_LP_SOUTH(0x009)
419#define B2062_S_COMM10 B43_LP_SOUTH(0x00A)
420#define B2062_S_COMM11 B43_LP_SOUTH(0x00B)
421#define B2062_S_COMM12 B43_LP_SOUTH(0x00C)
422#define B2062_S_COMM13 B43_LP_SOUTH(0x00D)
423#define B2062_S_COMM14 B43_LP_SOUTH(0x00E)
424#define B2062_S_COMM15 B43_LP_SOUTH(0x00F)
425#define B2062_S_PDS_CTL0 B43_LP_SOUTH(0x010)
426#define B2062_S_PDS_CTL1 B43_LP_SOUTH(0x011)
427#define B2062_S_PDS_CTL2 B43_LP_SOUTH(0x012)
428#define B2062_S_PDS_CTL3 B43_LP_SOUTH(0x013)
429#define B2062_S_BG_CTL0 B43_LP_SOUTH(0x014)
430#define B2062_S_BG_CTL1 B43_LP_SOUTH(0x015)
431#define B2062_S_BG_CTL2 B43_LP_SOUTH(0x016)
432#define B2062_S_LGENG_CTL0 B43_LP_SOUTH(0x017)
433#define B2062_S_LGENG_CTL1 B43_LP_SOUTH(0x018)
434#define B2062_S_LGENG_CTL2 B43_LP_SOUTH(0x019)
435#define B2062_S_LGENG_CTL3 B43_LP_SOUTH(0x01A)
436#define B2062_S_LGENG_CTL4 B43_LP_SOUTH(0x01B)
437#define B2062_S_LGENG_CTL5 B43_LP_SOUTH(0x01C)
438#define B2062_S_LGENG_CTL6 B43_LP_SOUTH(0x01D)
439#define B2062_S_LGENG_CTL7 B43_LP_SOUTH(0x01E)
440#define B2062_S_LGENG_CTL8 B43_LP_SOUTH(0x01F)
441#define B2062_S_LGENG_CTL9 B43_LP_SOUTH(0x020)
442#define B2062_S_LGENG_CTL10 B43_LP_SOUTH(0x021)
443#define B2062_S_LGENG_CTL11 B43_LP_SOUTH(0x022)
444#define B2062_S_REFPLL_CTL0 B43_LP_SOUTH(0x023)
445#define B2062_S_REFPLL_CTL1 B43_LP_SOUTH(0x024)
446#define B2062_S_REFPLL_CTL2 B43_LP_SOUTH(0x025)
447#define B2062_S_REFPLL_CTL3 B43_LP_SOUTH(0x026)
448#define B2062_S_REFPLL_CTL4 B43_LP_SOUTH(0x027)
449#define B2062_S_REFPLL_CTL5 B43_LP_SOUTH(0x028)
450#define B2062_S_REFPLL_CTL6 B43_LP_SOUTH(0x029)
451#define B2062_S_REFPLL_CTL7 B43_LP_SOUTH(0x02A)
452#define B2062_S_REFPLL_CTL8 B43_LP_SOUTH(0x02B)
453#define B2062_S_REFPLL_CTL9 B43_LP_SOUTH(0x02C)
454#define B2062_S_REFPLL_CTL10 B43_LP_SOUTH(0x02D)
455#define B2062_S_REFPLL_CTL11 B43_LP_SOUTH(0x02E)
456#define B2062_S_REFPLL_CTL12 B43_LP_SOUTH(0x02F)
457#define B2062_S_REFPLL_CTL13 B43_LP_SOUTH(0x030)
458#define B2062_S_REFPLL_CTL14 B43_LP_SOUTH(0x031)
459#define B2062_S_REFPLL_CTL15 B43_LP_SOUTH(0x032)
460#define B2062_S_REFPLL_CTL16 B43_LP_SOUTH(0x033)
461#define B2062_S_RFPLL_CTL0 B43_LP_SOUTH(0x034)
462#define B2062_S_RFPLL_CTL1 B43_LP_SOUTH(0x035)
463#define B2062_S_RFPLL_CTL2 B43_LP_SOUTH(0x036)
464#define B2062_S_RFPLL_CTL3 B43_LP_SOUTH(0x037)
465#define B2062_S_RFPLL_CTL4 B43_LP_SOUTH(0x038)
466#define B2062_S_RFPLL_CTL5 B43_LP_SOUTH(0x039)
467#define B2062_S_RFPLL_CTL6 B43_LP_SOUTH(0x03A)
468#define B2062_S_RFPLL_CTL7 B43_LP_SOUTH(0x03B)
469#define B2062_S_RFPLL_CTL8 B43_LP_SOUTH(0x03C)
470#define B2062_S_RFPLL_CTL9 B43_LP_SOUTH(0x03D)
471#define B2062_S_RFPLL_CTL10 B43_LP_SOUTH(0x03E)
472#define B2062_S_RFPLL_CTL11 B43_LP_SOUTH(0x03F)
473#define B2062_S_RFPLL_CTL12 B43_LP_SOUTH(0x040)
474#define B2062_S_RFPLL_CTL13 B43_LP_SOUTH(0x041)
475#define B2062_S_RFPLL_CTL14 B43_LP_SOUTH(0x042)
476#define B2062_S_RFPLL_CTL15 B43_LP_SOUTH(0x043)
477#define B2062_S_RFPLL_CTL16 B43_LP_SOUTH(0x044)
478#define B2062_S_RFPLL_CTL17 B43_LP_SOUTH(0x045)
479#define B2062_S_RFPLL_CTL18 B43_LP_SOUTH(0x046)
480#define B2062_S_RFPLL_CTL19 B43_LP_SOUTH(0x047)
481#define B2062_S_RFPLL_CTL20 B43_LP_SOUTH(0x048)
482#define B2062_S_RFPLL_CTL21 B43_LP_SOUTH(0x049)
483#define B2062_S_RFPLL_CTL22 B43_LP_SOUTH(0x04A)
484#define B2062_S_RFPLL_CTL23 B43_LP_SOUTH(0x04B)
485#define B2062_S_RFPLL_CTL24 B43_LP_SOUTH(0x04C)
486#define B2062_S_RFPLL_CTL25 B43_LP_SOUTH(0x04D)
487#define B2062_S_RFPLL_CTL26 B43_LP_SOUTH(0x04E)
488#define B2062_S_RFPLL_CTL27 B43_LP_SOUTH(0x04F)
489#define B2062_S_RFPLL_CTL28 B43_LP_SOUTH(0x050)
490#define B2062_S_RFPLL_CTL29 B43_LP_SOUTH(0x051)
491#define B2062_S_RFPLL_CTL30 B43_LP_SOUTH(0x052)
492#define B2062_S_RFPLL_CTL31 B43_LP_SOUTH(0x053)
493#define B2062_S_RFPLL_CTL32 B43_LP_SOUTH(0x054)
494#define B2062_S_RFPLL_CTL33 B43_LP_SOUTH(0x055)
495#define B2062_S_RFPLL_CTL34 B43_LP_SOUTH(0x056)
496#define B2062_S_RXG_CNT0 B43_LP_SOUTH(0x057)
497#define B2062_S_RXG_CNT1 B43_LP_SOUTH(0x058)
498#define B2062_S_RXG_CNT2 B43_LP_SOUTH(0x059)
499#define B2062_S_RXG_CNT3 B43_LP_SOUTH(0x05A)
500#define B2062_S_RXG_CNT4 B43_LP_SOUTH(0x05B)
501#define B2062_S_RXG_CNT5 B43_LP_SOUTH(0x05C)
502#define B2062_S_RXG_CNT6 B43_LP_SOUTH(0x05D)
503#define B2062_S_RXG_CNT7 B43_LP_SOUTH(0x05E)
504#define B2062_S_RXG_CNT8 B43_LP_SOUTH(0x05F)
505#define B2062_S_RXG_CNT9 B43_LP_SOUTH(0x060)
506#define B2062_S_RXG_CNT10 B43_LP_SOUTH(0x061)
507#define B2062_S_RXG_CNT11 B43_LP_SOUTH(0x062)
508#define B2062_S_RXG_CNT12 B43_LP_SOUTH(0x063)
509#define B2062_S_RXG_CNT13 B43_LP_SOUTH(0x064)
510#define B2062_S_RXG_CNT14 B43_LP_SOUTH(0x065)
511#define B2062_S_RXG_CNT15 B43_LP_SOUTH(0x066)
512#define B2062_S_RXG_CNT16 B43_LP_SOUTH(0x067)
513#define B2062_S_RXG_CNT17 B43_LP_SOUTH(0x068)
514
515
516
517
518#define B2063_RADIO_ID_CODE B43_LP_RADIO(0x001)
519#define B2063_COMM1 B43_LP_RADIO(0x000)
520#define B2063_COMM2 B43_LP_RADIO(0x002)
521#define B2063_COMM3 B43_LP_RADIO(0x003)
522#define B2063_COMM4 B43_LP_RADIO(0x004)
523#define B2063_COMM5 B43_LP_RADIO(0x005)
524#define B2063_COMM6 B43_LP_RADIO(0x006)
525#define B2063_COMM7 B43_LP_RADIO(0x007)
526#define B2063_COMM8 B43_LP_RADIO(0x008)
527#define B2063_COMM9 B43_LP_RADIO(0x009)
528#define B2063_COMM10 B43_LP_RADIO(0x00A)
529#define B2063_COMM11 B43_LP_RADIO(0x00B)
530#define B2063_COMM12 B43_LP_RADIO(0x00C)
531#define B2063_COMM13 B43_LP_RADIO(0x00D)
532#define B2063_COMM14 B43_LP_RADIO(0x00E)
533#define B2063_COMM15 B43_LP_RADIO(0x00F)
534#define B2063_COMM16 B43_LP_RADIO(0x010)
535#define B2063_COMM17 B43_LP_RADIO(0x011)
536#define B2063_COMM18 B43_LP_RADIO(0x012)
537#define B2063_COMM19 B43_LP_RADIO(0x013)
538#define B2063_COMM20 B43_LP_RADIO(0x014)
539#define B2063_COMM21 B43_LP_RADIO(0x015)
540#define B2063_COMM22 B43_LP_RADIO(0x016)
541#define B2063_COMM23 B43_LP_RADIO(0x017)
542#define B2063_COMM24 B43_LP_RADIO(0x018)
543#define B2063_PWR_SWITCH_CTL B43_LP_RADIO(0x019)
544#define B2063_PLL_SP1 B43_LP_RADIO(0x01A)
545#define B2063_PLL_SP2 B43_LP_RADIO(0x01B)
546#define B2063_LOGEN_SP1 B43_LP_RADIO(0x01C)
547#define B2063_LOGEN_SP2 B43_LP_RADIO(0x01D)
548#define B2063_LOGEN_SP3 B43_LP_RADIO(0x01E)
549#define B2063_LOGEN_SP4 B43_LP_RADIO(0x01F)
550#define B2063_LOGEN_SP5 B43_LP_RADIO(0x020)
551#define B2063_G_RX_SP1 B43_LP_RADIO(0x021)
552#define B2063_G_RX_SP2 B43_LP_RADIO(0x022)
553#define B2063_G_RX_SP3 B43_LP_RADIO(0x023)
554#define B2063_G_RX_SP4 B43_LP_RADIO(0x024)
555#define B2063_G_RX_SP5 B43_LP_RADIO(0x025)
556#define B2063_G_RX_SP6 B43_LP_RADIO(0x026)
557#define B2063_G_RX_SP7 B43_LP_RADIO(0x027)
558#define B2063_G_RX_SP8 B43_LP_RADIO(0x028)
559#define B2063_G_RX_SP9 B43_LP_RADIO(0x029)
560#define B2063_G_RX_SP10 B43_LP_RADIO(0x02A)
561#define B2063_G_RX_SP11 B43_LP_RADIO(0x02B)
562#define B2063_A_RX_SP1 B43_LP_RADIO(0x02C)
563#define B2063_A_RX_SP2 B43_LP_RADIO(0x02D)
564#define B2063_A_RX_SP3 B43_LP_RADIO(0x02E)
565#define B2063_A_RX_SP4 B43_LP_RADIO(0x02F)
566#define B2063_A_RX_SP5 B43_LP_RADIO(0x030)
567#define B2063_A_RX_SP6 B43_LP_RADIO(0x031)
568#define B2063_A_RX_SP7 B43_LP_RADIO(0x032)
569#define B2063_RX_BB_SP1 B43_LP_RADIO(0x033)
570#define B2063_RX_BB_SP2 B43_LP_RADIO(0x034)
571#define B2063_RX_BB_SP3 B43_LP_RADIO(0x035)
572#define B2063_RX_BB_SP4 B43_LP_RADIO(0x036)
573#define B2063_RX_BB_SP5 B43_LP_RADIO(0x037)
574#define B2063_RX_BB_SP6 B43_LP_RADIO(0x038)
575#define B2063_RX_BB_SP7 B43_LP_RADIO(0x039)
576#define B2063_RX_BB_SP8 B43_LP_RADIO(0x03A)
577#define B2063_TX_RF_SP1 B43_LP_RADIO(0x03B)
578#define B2063_TX_RF_SP2 B43_LP_RADIO(0x03C)
579#define B2063_TX_RF_SP3 B43_LP_RADIO(0x03D)
580#define B2063_TX_RF_SP4 B43_LP_RADIO(0x03E)
581#define B2063_TX_RF_SP5 B43_LP_RADIO(0x03F)
582#define B2063_TX_RF_SP6 B43_LP_RADIO(0x040)
583#define B2063_TX_RF_SP7 B43_LP_RADIO(0x041)
584#define B2063_TX_RF_SP8 B43_LP_RADIO(0x042)
585#define B2063_TX_RF_SP9 B43_LP_RADIO(0x043)
586#define B2063_TX_RF_SP10 B43_LP_RADIO(0x044)
587#define B2063_TX_RF_SP11 B43_LP_RADIO(0x045)
588#define B2063_TX_RF_SP12 B43_LP_RADIO(0x046)
589#define B2063_TX_RF_SP13 B43_LP_RADIO(0x047)
590#define B2063_TX_RF_SP14 B43_LP_RADIO(0x048)
591#define B2063_TX_RF_SP15 B43_LP_RADIO(0x049)
592#define B2063_TX_RF_SP16 B43_LP_RADIO(0x04A)
593#define B2063_TX_RF_SP17 B43_LP_RADIO(0x04B)
594#define B2063_PA_SP1 B43_LP_RADIO(0x04C)
595#define B2063_PA_SP2 B43_LP_RADIO(0x04D)
596#define B2063_PA_SP3 B43_LP_RADIO(0x04E)
597#define B2063_PA_SP4 B43_LP_RADIO(0x04F)
598#define B2063_PA_SP5 B43_LP_RADIO(0x050)
599#define B2063_PA_SP6 B43_LP_RADIO(0x051)
600#define B2063_PA_SP7 B43_LP_RADIO(0x052)
601#define B2063_TX_BB_SP1 B43_LP_RADIO(0x053)
602#define B2063_TX_BB_SP2 B43_LP_RADIO(0x054)
603#define B2063_TX_BB_SP3 B43_LP_RADIO(0x055)
604#define B2063_REG_SP1 B43_LP_RADIO(0x056)
605#define B2063_BANDGAP_CTL1 B43_LP_RADIO(0x057)
606#define B2063_BANDGAP_CTL2 B43_LP_RADIO(0x058)
607#define B2063_LPO_CTL1 B43_LP_RADIO(0x059)
608#define B2063_RC_CALIB_CTL1 B43_LP_RADIO(0x05A)
609#define B2063_RC_CALIB_CTL2 B43_LP_RADIO(0x05B)
610#define B2063_RC_CALIB_CTL3 B43_LP_RADIO(0x05C)
611#define B2063_RC_CALIB_CTL4 B43_LP_RADIO(0x05D)
612#define B2063_RC_CALIB_CTL5 B43_LP_RADIO(0x05E)
613#define B2063_RC_CALIB_CTL6 B43_LP_RADIO(0x05F)
614#define B2063_RC_CALIB_CTL7 B43_LP_RADIO(0x060)
615#define B2063_RC_CALIB_CTL8 B43_LP_RADIO(0x061)
616#define B2063_RC_CALIB_CTL9 B43_LP_RADIO(0x062)
617#define B2063_RC_CALIB_CTL10 B43_LP_RADIO(0x063)
618#define B2063_PLL_JTAG_CALNRST B43_LP_RADIO(0x064)
619#define B2063_PLL_JTAG_IN_PLL1 B43_LP_RADIO(0x065)
620#define B2063_PLL_JTAG_IN_PLL2 B43_LP_RADIO(0x066)
621#define B2063_PLL_JTAG_PLL_CP1 B43_LP_RADIO(0x067)
622#define B2063_PLL_JTAG_PLL_CP2 B43_LP_RADIO(0x068)
623#define B2063_PLL_JTAG_PLL_CP3 B43_LP_RADIO(0x069)
624#define B2063_PLL_JTAG_PLL_CP4 B43_LP_RADIO(0x06A)
625#define B2063_PLL_JTAG_PLL_CTL1 B43_LP_RADIO(0x06B)
626#define B2063_PLL_JTAG_PLL_LF1 B43_LP_RADIO(0x06C)
627#define B2063_PLL_JTAG_PLL_LF2 B43_LP_RADIO(0x06D)
628#define B2063_PLL_JTAG_PLL_LF3 B43_LP_RADIO(0x06E)
629#define B2063_PLL_JTAG_PLL_LF4 B43_LP_RADIO(0x06F)
630#define B2063_PLL_JTAG_PLL_SG1 B43_LP_RADIO(0x070)
631#define B2063_PLL_JTAG_PLL_SG2 B43_LP_RADIO(0x071)
632#define B2063_PLL_JTAG_PLL_SG3 B43_LP_RADIO(0x072)
633#define B2063_PLL_JTAG_PLL_SG4 B43_LP_RADIO(0x073)
634#define B2063_PLL_JTAG_PLL_SG5 B43_LP_RADIO(0x074)
635#define B2063_PLL_JTAG_PLL_VCO1 B43_LP_RADIO(0x075)
636#define B2063_PLL_JTAG_PLL_VCO2 B43_LP_RADIO(0x076)
637#define B2063_PLL_JTAG_PLL_VCO_CALIB1 B43_LP_RADIO(0x077)
638#define B2063_PLL_JTAG_PLL_VCO_CALIB2 B43_LP_RADIO(0x078)
639#define B2063_PLL_JTAG_PLL_VCO_CALIB3 B43_LP_RADIO(0x079)
640#define B2063_PLL_JTAG_PLL_VCO_CALIB4 B43_LP_RADIO(0x07A)
641#define B2063_PLL_JTAG_PLL_VCO_CALIB5 B43_LP_RADIO(0x07B)
642#define B2063_PLL_JTAG_PLL_VCO_CALIB6 B43_LP_RADIO(0x07C)
643#define B2063_PLL_JTAG_PLL_VCO_CALIB7 B43_LP_RADIO(0x07D)
644#define B2063_PLL_JTAG_PLL_VCO_CALIB8 B43_LP_RADIO(0x07E)
645#define B2063_PLL_JTAG_PLL_VCO_CALIB9 B43_LP_RADIO(0x07F)
646#define B2063_PLL_JTAG_PLL_VCO_CALIB10 B43_LP_RADIO(0x080)
647#define B2063_PLL_JTAG_PLL_XTAL_12 B43_LP_RADIO(0x081)
648#define B2063_PLL_JTAG_PLL_XTAL3 B43_LP_RADIO(0x082)
649#define B2063_LOGEN_ACL1 B43_LP_RADIO(0x083)
650#define B2063_LOGEN_ACL2 B43_LP_RADIO(0x084)
651#define B2063_LOGEN_ACL3 B43_LP_RADIO(0x085)
652#define B2063_LOGEN_ACL4 B43_LP_RADIO(0x086)
653#define B2063_LOGEN_ACL5 B43_LP_RADIO(0x087)
654#define B2063_LO_CALIB_INPUTS B43_LP_RADIO(0x088)
655#define B2063_LO_CALIB_CTL1 B43_LP_RADIO(0x089)
656#define B2063_LO_CALIB_CTL2 B43_LP_RADIO(0x08A)
657#define B2063_LO_CALIB_CTL3 B43_LP_RADIO(0x08B)
658#define B2063_LO_CALIB_WAITCNT B43_LP_RADIO(0x08C)
659#define B2063_LO_CALIB_OVR1 B43_LP_RADIO(0x08D)
660#define B2063_LO_CALIB_OVR2 B43_LP_RADIO(0x08E)
661#define B2063_LO_CALIB_OVAL1 B43_LP_RADIO(0x08F)
662#define B2063_LO_CALIB_OVAL2 B43_LP_RADIO(0x090)
663#define B2063_LO_CALIB_OVAL3 B43_LP_RADIO(0x091)
664#define B2063_LO_CALIB_OVAL4 B43_LP_RADIO(0x092)
665#define B2063_LO_CALIB_OVAL5 B43_LP_RADIO(0x093)
666#define B2063_LO_CALIB_OVAL6 B43_LP_RADIO(0x094)
667#define B2063_LO_CALIB_OVAL7 B43_LP_RADIO(0x095)
668#define B2063_LO_CALIB_CALVLD1 B43_LP_RADIO(0x096)
669#define B2063_LO_CALIB_CALVLD2 B43_LP_RADIO(0x097)
670#define B2063_LO_CALIB_CVAL1 B43_LP_RADIO(0x098)
671#define B2063_LO_CALIB_CVAL2 B43_LP_RADIO(0x099)
672#define B2063_LO_CALIB_CVAL3 B43_LP_RADIO(0x09A)
673#define B2063_LO_CALIB_CVAL4 B43_LP_RADIO(0x09B)
674#define B2063_LO_CALIB_CVAL5 B43_LP_RADIO(0x09C)
675#define B2063_LO_CALIB_CVAL6 B43_LP_RADIO(0x09D)
676#define B2063_LO_CALIB_CVAL7 B43_LP_RADIO(0x09E)
677#define B2063_LOGEN_CALIB_EN B43_LP_RADIO(0x09F)
678#define B2063_LOGEN_PEAKDET1 B43_LP_RADIO(0x0A0)
679#define B2063_LOGEN_RCCR1 B43_LP_RADIO(0x0A1)
680#define B2063_LOGEN_VCOBUF1 B43_LP_RADIO(0x0A2)
681#define B2063_LOGEN_MIXER1 B43_LP_RADIO(0x0A3)
682#define B2063_LOGEN_MIXER2 B43_LP_RADIO(0x0A4)
683#define B2063_LOGEN_BUF1 B43_LP_RADIO(0x0A5)
684#define B2063_LOGEN_BUF2 B43_LP_RADIO(0x0A6)
685#define B2063_LOGEN_DIV1 B43_LP_RADIO(0x0A7)
686#define B2063_LOGEN_DIV2 B43_LP_RADIO(0x0A8)
687#define B2063_LOGEN_DIV3 B43_LP_RADIO(0x0A9)
688#define B2063_LOGEN_CBUFRX1 B43_LP_RADIO(0x0AA)
689#define B2063_LOGEN_CBUFRX2 B43_LP_RADIO(0x0AB)
690#define B2063_LOGEN_CBUFTX1 B43_LP_RADIO(0x0AC)
691#define B2063_LOGEN_CBUFTX2 B43_LP_RADIO(0x0AD)
692#define B2063_LOGEN_IDAC1 B43_LP_RADIO(0x0AE)
693#define B2063_LOGEN_SPARE1 B43_LP_RADIO(0x0AF)
694#define B2063_LOGEN_SPARE2 B43_LP_RADIO(0x0B0)
695#define B2063_LOGEN_SPARE3 B43_LP_RADIO(0x0B1)
696#define B2063_G_RX_1ST1 B43_LP_RADIO(0x0B2)
697#define B2063_G_RX_1ST2 B43_LP_RADIO(0x0B3)
698#define B2063_G_RX_1ST3 B43_LP_RADIO(0x0B4)
699#define B2063_G_RX_2ND1 B43_LP_RADIO(0x0B5)
700#define B2063_G_RX_2ND2 B43_LP_RADIO(0x0B6)
701#define B2063_G_RX_2ND3 B43_LP_RADIO(0x0B7)
702#define B2063_G_RX_2ND4 B43_LP_RADIO(0x0B8)
703#define B2063_G_RX_2ND5 B43_LP_RADIO(0x0B9)
704#define B2063_G_RX_2ND6 B43_LP_RADIO(0x0BA)
705#define B2063_G_RX_2ND7 B43_LP_RADIO(0x0BB)
706#define B2063_G_RX_2ND8 B43_LP_RADIO(0x0BC)
707#define B2063_G_RX_PS1 B43_LP_RADIO(0x0BD)
708#define B2063_G_RX_PS2 B43_LP_RADIO(0x0BE)
709#define B2063_G_RX_PS3 B43_LP_RADIO(0x0BF)
710#define B2063_G_RX_PS4 B43_LP_RADIO(0x0C0)
711#define B2063_G_RX_PS5 B43_LP_RADIO(0x0C1)
712#define B2063_G_RX_MIX1 B43_LP_RADIO(0x0C2)
713#define B2063_G_RX_MIX2 B43_LP_RADIO(0x0C3)
714#define B2063_G_RX_MIX3 B43_LP_RADIO(0x0C4)
715#define B2063_G_RX_MIX4 B43_LP_RADIO(0x0C5)
716#define B2063_G_RX_MIX5 B43_LP_RADIO(0x0C6)
717#define B2063_G_RX_MIX6 B43_LP_RADIO(0x0C7)
718#define B2063_G_RX_MIX7 B43_LP_RADIO(0x0C8)
719#define B2063_G_RX_MIX8 B43_LP_RADIO(0x0C9)
720#define B2063_G_RX_PDET1 B43_LP_RADIO(0x0CA)
721#define B2063_G_RX_SPARES1 B43_LP_RADIO(0x0CB)
722#define B2063_G_RX_SPARES2 B43_LP_RADIO(0x0CC)
723#define B2063_G_RX_SPARES3 B43_LP_RADIO(0x0CD)
724#define B2063_A_RX_1ST1 B43_LP_RADIO(0x0CE)
725#define B2063_A_RX_1ST2 B43_LP_RADIO(0x0CF)
726#define B2063_A_RX_1ST3 B43_LP_RADIO(0x0D0)
727#define B2063_A_RX_1ST4 B43_LP_RADIO(0x0D1)
728#define B2063_A_RX_1ST5 B43_LP_RADIO(0x0D2)
729#define B2063_A_RX_2ND1 B43_LP_RADIO(0x0D3)
730#define B2063_A_RX_2ND2 B43_LP_RADIO(0x0D4)
731#define B2063_A_RX_2ND3 B43_LP_RADIO(0x0D5)
732#define B2063_A_RX_2ND4 B43_LP_RADIO(0x0D6)
733#define B2063_A_RX_2ND5 B43_LP_RADIO(0x0D7)
734#define B2063_A_RX_2ND6 B43_LP_RADIO(0x0D8)
735#define B2063_A_RX_2ND7 B43_LP_RADIO(0x0D9)
736#define B2063_A_RX_PS1 B43_LP_RADIO(0x0DA)
737#define B2063_A_RX_PS2 B43_LP_RADIO(0x0DB)
738#define B2063_A_RX_PS3 B43_LP_RADIO(0x0DC)
739#define B2063_A_RX_PS4 B43_LP_RADIO(0x0DD)
740#define B2063_A_RX_PS5 B43_LP_RADIO(0x0DE)
741#define B2063_A_RX_PS6 B43_LP_RADIO(0x0DF)
742#define B2063_A_RX_MIX1 B43_LP_RADIO(0x0E0)
743#define B2063_A_RX_MIX2 B43_LP_RADIO(0x0E1)
744#define B2063_A_RX_MIX3 B43_LP_RADIO(0x0E2)
745#define B2063_A_RX_MIX4 B43_LP_RADIO(0x0E3)
746#define B2063_A_RX_MIX5 B43_LP_RADIO(0x0E4)
747#define B2063_A_RX_MIX6 B43_LP_RADIO(0x0E5)
748#define B2063_A_RX_MIX7 B43_LP_RADIO(0x0E6)
749#define B2063_A_RX_MIX8 B43_LP_RADIO(0x0E7)
750#define B2063_A_RX_PWRDET1 B43_LP_RADIO(0x0E8)
751#define B2063_A_RX_SPARE1 B43_LP_RADIO(0x0E9)
752#define B2063_A_RX_SPARE2 B43_LP_RADIO(0x0EA)
753#define B2063_A_RX_SPARE3 B43_LP_RADIO(0x0EB)
754#define B2063_RX_TIA_CTL1 B43_LP_RADIO(0x0EC)
755#define B2063_RX_TIA_CTL2 B43_LP_RADIO(0x0ED)
756#define B2063_RX_TIA_CTL3 B43_LP_RADIO(0x0EE)
757#define B2063_RX_TIA_CTL4 B43_LP_RADIO(0x0EF)
758#define B2063_RX_TIA_CTL5 B43_LP_RADIO(0x0F0)
759#define B2063_RX_TIA_CTL6 B43_LP_RADIO(0x0F1)
760#define B2063_RX_BB_CTL1 B43_LP_RADIO(0x0F2)
761#define B2063_RX_BB_CTL2 B43_LP_RADIO(0x0F3)
762#define B2063_RX_BB_CTL3 B43_LP_RADIO(0x0F4)
763#define B2063_RX_BB_CTL4 B43_LP_RADIO(0x0F5)
764#define B2063_RX_BB_CTL5 B43_LP_RADIO(0x0F6)
765#define B2063_RX_BB_CTL6 B43_LP_RADIO(0x0F7)
766#define B2063_RX_BB_CTL7 B43_LP_RADIO(0x0F8)
767#define B2063_RX_BB_CTL8 B43_LP_RADIO(0x0F9)
768#define B2063_RX_BB_CTL9 B43_LP_RADIO(0x0FA)
769#define B2063_TX_RF_CTL1 B43_LP_RADIO(0x0FB)
770#define B2063_TX_RF_IDAC_LO_RF_I B43_LP_RADIO(0x0FC)
771#define B2063_TX_RF_IDAC_LO_RF_Q B43_LP_RADIO(0x0FD)
772#define B2063_TX_RF_IDAC_LO_BB_I B43_LP_RADIO(0x0FE)
773#define B2063_TX_RF_IDAC_LO_BB_Q B43_LP_RADIO(0x0FF)
774#define B2063_TX_RF_CTL2 B43_LP_RADIO(0x100)
775#define B2063_TX_RF_CTL3 B43_LP_RADIO(0x101)
776#define B2063_TX_RF_CTL4 B43_LP_RADIO(0x102)
777#define B2063_TX_RF_CTL5 B43_LP_RADIO(0x103)
778#define B2063_TX_RF_CTL6 B43_LP_RADIO(0x104)
779#define B2063_TX_RF_CTL7 B43_LP_RADIO(0x105)
780#define B2063_TX_RF_CTL8 B43_LP_RADIO(0x106)
781#define B2063_TX_RF_CTL9 B43_LP_RADIO(0x107)
782#define B2063_TX_RF_CTL10 B43_LP_RADIO(0x108)
783#define B2063_TX_RF_CTL14 B43_LP_RADIO(0x109)
784#define B2063_TX_RF_CTL15 B43_LP_RADIO(0x10A)
785#define B2063_PA_CTL1 B43_LP_RADIO(0x10B)
786#define B2063_PA_CTL2 B43_LP_RADIO(0x10C)
787#define B2063_PA_CTL3 B43_LP_RADIO(0x10D)
788#define B2063_PA_CTL4 B43_LP_RADIO(0x10E)
789#define B2063_PA_CTL5 B43_LP_RADIO(0x10F)
790#define B2063_PA_CTL6 B43_LP_RADIO(0x110)
791#define B2063_PA_CTL7 B43_LP_RADIO(0x111)
792#define B2063_PA_CTL8 B43_LP_RADIO(0x112)
793#define B2063_PA_CTL9 B43_LP_RADIO(0x113)
794#define B2063_PA_CTL10 B43_LP_RADIO(0x114)
795#define B2063_PA_CTL11 B43_LP_RADIO(0x115)
796#define B2063_PA_CTL12 B43_LP_RADIO(0x116)
797#define B2063_PA_CTL13 B43_LP_RADIO(0x117)
798#define B2063_TX_BB_CTL1 B43_LP_RADIO(0x118)
799#define B2063_TX_BB_CTL2 B43_LP_RADIO(0x119)
800#define B2063_TX_BB_CTL3 B43_LP_RADIO(0x11A)
801#define B2063_TX_BB_CTL4 B43_LP_RADIO(0x11B)
802#define B2063_GPIO_CTL1 B43_LP_RADIO(0x11C)
803#define B2063_VREG_CTL1 B43_LP_RADIO(0x11D)
804#define B2063_AMUX_CTL1 B43_LP_RADIO(0x11E)
805#define B2063_IQ_CALIB_GVAR B43_LP_RADIO(0x11F)
806#define B2063_IQ_CALIB_CTL1 B43_LP_RADIO(0x120)
807#define B2063_IQ_CALIB_CTL2 B43_LP_RADIO(0x121)
808#define B2063_TEMPSENSE_CTL1 B43_LP_RADIO(0x122)
809#define B2063_TEMPSENSE_CTL2 B43_LP_RADIO(0x123)
810#define B2063_TX_RX_LOOPBACK1 B43_LP_RADIO(0x124)
811#define B2063_TX_RX_LOOPBACK2 B43_LP_RADIO(0x125)
812#define B2063_EXT_TSSI_CTL1 B43_LP_RADIO(0x126)
813#define B2063_EXT_TSSI_CTL2 B43_LP_RADIO(0x127)
814#define B2063_AFE_CTL B43_LP_RADIO(0x128)
815
816
817
818enum b43_lpphy_txpctl_mode {
819 B43_LPPHY_TXPCTL_UNKNOWN = 0,
820 B43_LPPHY_TXPCTL_OFF,
821 B43_LPPHY_TXPCTL_SW,
822 B43_LPPHY_TXPCTL_HW,
823};
824
825struct b43_phy_lp {
826
827 enum b43_lpphy_txpctl_mode txpctl_mode;
828
829
830 u8 tx_isolation_med_band;
831
832 u8 tx_isolation_low_band;
833
834 u8 tx_isolation_hi_band;
835
836
837 u16 max_tx_pwr_med_band;
838
839 u16 max_tx_pwr_low_band;
840
841 u16 max_tx_pwr_hi_band;
842
843
844
845 u16 tx_max_rate[15];
846 u16 tx_max_ratel[15];
847 u16 tx_max_rateh[15];
848
849
850 s16 txpa[3], txpal[3], txpah[3];
851
852
853 u8 rx_pwr_offset;
854
855
856 u16 tssi_tx_count;
857
858 u16 tssi_idx;
859
860 u16 tssi_npt;
861
862
863 u16 tgt_tx_freq;
864
865
866 s8 tx_pwr_idx_over;
867
868
869 u8 rssi_vf;
870
871 u8 rssi_vc;
872
873 u8 rssi_gs;
874
875
876 u8 rc_cap;
877
878 u8 bx_arch;
879
880
881 u8 full_calib_chan;
882
883
884 bool tx_iqloc_best_coeffs_valid;
885 u8 tx_iqloc_best_coeffs[11];
886
887
888 u16 dig_flt_state[9];
889
890 bool crs_usr_disable, crs_sys_disable;
891
892 unsigned int pdiv;
893
894
895 u8 channel;
896
897
898 int antenna;
899
900
901 int tx_tone_freq;
902};
903
904enum tssi_mux_mode {
905 TSSI_MUX_PREPA,
906 TSSI_MUX_POSTPA,
907 TSSI_MUX_EXT,
908};
909
910struct b43_phy_operations;
911extern const struct b43_phy_operations b43_phyops_lp;
912
913#endif
914