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5
6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/list.h>
11#include <linux/types.h>
12#include <linux/device.h>
13#include <linux/slab.h>
14#include <linux/log2.h>
15#include <linux/bitmap.h>
16#include <linux/delay.h>
17#include <linux/sysfs.h>
18#include <linux/cpu.h>
19#include <linux/powercap.h>
20#include <linux/suspend.h>
21#include <linux/intel_rapl.h>
22#include <linux/processor.h>
23#include <linux/platform_device.h>
24
25#include <asm/iosf_mbi.h>
26#include <asm/cpu_device_id.h>
27#include <asm/intel-family.h>
28
29
30#define MSR_PLATFORM_POWER_LIMIT 0x0000065C
31
32
33static struct rapl_if_priv rapl_msr_priv = {
34 .reg_unit = MSR_RAPL_POWER_UNIT,
35 .regs[RAPL_DOMAIN_PACKAGE] = {
36 MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO },
37 .regs[RAPL_DOMAIN_PP0] = {
38 MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 },
39 .regs[RAPL_DOMAIN_PP1] = {
40 MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 },
41 .regs[RAPL_DOMAIN_DRAM] = {
42 MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO },
43 .regs[RAPL_DOMAIN_PLATFORM] = {
44 MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0},
45 .limits[RAPL_DOMAIN_PACKAGE] = 2,
46};
47
48
49
50
51
52
53
54
55static int rapl_cpu_online(unsigned int cpu)
56{
57 struct rapl_package *rp;
58
59 rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
60 if (!rp) {
61 rp = rapl_add_package(cpu, &rapl_msr_priv);
62 if (IS_ERR(rp))
63 return PTR_ERR(rp);
64 }
65 cpumask_set_cpu(cpu, &rp->cpumask);
66 return 0;
67}
68
69static int rapl_cpu_down_prep(unsigned int cpu)
70{
71 struct rapl_package *rp;
72 int lead_cpu;
73
74 rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
75 if (!rp)
76 return 0;
77
78 cpumask_clear_cpu(cpu, &rp->cpumask);
79 lead_cpu = cpumask_first(&rp->cpumask);
80 if (lead_cpu >= nr_cpu_ids)
81 rapl_remove_package(rp);
82 else if (rp->lead_cpu == cpu)
83 rp->lead_cpu = lead_cpu;
84 return 0;
85}
86
87static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
88{
89 u32 msr = (u32)ra->reg;
90
91 if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
92 pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
93 return -EIO;
94 }
95 ra->value &= ra->mask;
96 return 0;
97}
98
99static void rapl_msr_update_func(void *info)
100{
101 struct reg_action *ra = info;
102 u32 msr = (u32)ra->reg;
103 u64 val;
104
105 ra->err = rdmsrl_safe(msr, &val);
106 if (ra->err)
107 return;
108
109 val &= ~ra->mask;
110 val |= ra->value;
111
112 ra->err = wrmsrl_safe(msr, val);
113}
114
115static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
116{
117 int ret;
118
119 ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1);
120 if (WARN_ON_ONCE(ret))
121 return ret;
122
123 return ra->err;
124}
125
126static int rapl_msr_probe(struct platform_device *pdev)
127{
128 int ret;
129
130 rapl_msr_priv.read_raw = rapl_msr_read_raw;
131 rapl_msr_priv.write_raw = rapl_msr_write_raw;
132
133 rapl_msr_priv.control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
134 if (IS_ERR(rapl_msr_priv.control_type)) {
135 pr_debug("failed to register powercap control_type.\n");
136 return PTR_ERR(rapl_msr_priv.control_type);
137 }
138
139 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online",
140 rapl_cpu_online, rapl_cpu_down_prep);
141 if (ret < 0)
142 goto out;
143 rapl_msr_priv.pcap_rapl_online = ret;
144
145
146 rapl_add_platform_domain(&rapl_msr_priv);
147
148 return 0;
149
150out:
151 if (ret)
152 powercap_unregister_control_type(rapl_msr_priv.control_type);
153 return ret;
154}
155
156static int rapl_msr_remove(struct platform_device *pdev)
157{
158 cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online);
159 rapl_remove_platform_domain(&rapl_msr_priv);
160 powercap_unregister_control_type(rapl_msr_priv.control_type);
161 return 0;
162}
163
164static const struct platform_device_id rapl_msr_ids[] = {
165 { .name = "intel_rapl_msr", },
166 {}
167};
168MODULE_DEVICE_TABLE(platform, rapl_msr_ids);
169
170static struct platform_driver intel_rapl_msr_driver = {
171 .probe = rapl_msr_probe,
172 .remove = rapl_msr_remove,
173 .id_table = rapl_msr_ids,
174 .driver = {
175 .name = "intel_rapl_msr",
176 },
177};
178
179module_platform_driver(intel_rapl_msr_driver);
180
181MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit) control via MSR interface");
182MODULE_AUTHOR("Zhang Rui <rui.zhang@intel.com>");
183MODULE_LICENSE("GPL v2");
184
