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46#ifndef MPT3SAS_BASE_H_INCLUDED
47#define MPT3SAS_BASE_H_INCLUDED
48
49#include "mpi/mpi2_type.h"
50#include "mpi/mpi2.h"
51#include "mpi/mpi2_ioc.h"
52#include "mpi/mpi2_cnfg.h"
53#include "mpi/mpi2_init.h"
54#include "mpi/mpi2_raid.h"
55#include "mpi/mpi2_tool.h"
56#include "mpi/mpi2_sas.h"
57#include "mpi/mpi2_pci.h"
58#include "mpi/mpi2_image.h"
59
60#include <scsi/scsi.h>
61#include <scsi/scsi_cmnd.h>
62#include <scsi/scsi_device.h>
63#include <scsi/scsi_host.h>
64#include <scsi/scsi_tcq.h>
65#include <scsi/scsi_transport_sas.h>
66#include <scsi/scsi_dbg.h>
67#include <scsi/scsi_eh.h>
68#include <linux/pci.h>
69#include <linux/poll.h>
70#include <linux/irq_poll.h>
71
72#include "mpt3sas_debug.h"
73#include "mpt3sas_trigger_diag.h"
74
75
76#define MPT3SAS_DRIVER_NAME "mpt3sas"
77#define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
78#define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
79#define MPT3SAS_DRIVER_VERSION "34.100.00.00"
80#define MPT3SAS_MAJOR_VERSION 34
81#define MPT3SAS_MINOR_VERSION 100
82#define MPT3SAS_BUILD_VERSION 0
83#define MPT3SAS_RELEASE_VERSION 00
84
85#define MPT2SAS_DRIVER_NAME "mpt2sas"
86#define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
87#define MPT2SAS_DRIVER_VERSION "20.102.00.00"
88#define MPT2SAS_MAJOR_VERSION 20
89#define MPT2SAS_MINOR_VERSION 102
90#define MPT2SAS_BUILD_VERSION 0
91#define MPT2SAS_RELEASE_VERSION 00
92
93
94#define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS (15)
95#define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
96
97
98
99
100#define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
101#define MPT_MIN_PHYS_SEGMENTS 16
102#define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
103
104#define MCPU_MAX_CHAINS_PER_IO 3
105
106#ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
107#define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
108#else
109#define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
110#endif
111
112#ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
113#define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
114#else
115#define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
116#endif
117
118
119
120
121#define MPT3SAS_SATA_QUEUE_DEPTH 32
122#define MPT3SAS_SAS_QUEUE_DEPTH 254
123#define MPT3SAS_RAID_QUEUE_DEPTH 128
124#define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
125
126#define MPT3SAS_RAID_MAX_SECTORS 8192
127#define MPT3SAS_HOST_PAGE_SIZE_4K 12
128#define MPT3SAS_NVME_QUEUE_DEPTH 128
129#define MPT_NAME_LENGTH 32
130#define MPT_STRING_LENGTH 64
131#define MPI_FRAME_START_OFFSET 256
132#define REPLY_FREE_POOL_SIZE 512
133
134#define MPT_MAX_CALLBACKS 32
135
136#define INTERNAL_CMDS_COUNT 10
137
138#define INTERNAL_SCSIIO_CMDS_COUNT 3
139
140#define MPI3_HIM_MASK 0xFFFFFFFF
141
142#define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
143
144#define MAX_CHAIN_ELEMT_SZ 16
145#define DEFAULT_NUM_FWCHAIN_ELEMTS 8
146
147#define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT 6
148#define FW_IMG_HDR_READ_TIMEOUT 15
149
150#define IOC_OPERATIONAL_WAIT_COUNT 10
151
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154
155#define NVME_PRP_SIZE 8
156#define NVME_ERROR_RESPONSE_SIZE 16
157#define NVME_TASK_ABORT_MIN_TIMEOUT 6
158#define NVME_TASK_ABORT_MAX_TIMEOUT 60
159#define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
160#define NVME_PRP_PAGE_SIZE 4096
161
162struct mpt3sas_nvme_cmd {
163 u8 rsvd[24];
164 __le64 prp1;
165 __le64 prp2;
166};
167
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170
171#define ioc_err(ioc, fmt, ...) \
172 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
173#define ioc_notice(ioc, fmt, ...) \
174 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
175#define ioc_warn(ioc, fmt, ...) \
176 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
177#define ioc_info(ioc, fmt, ...) \
178 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
179
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183
184#define MPT2_WARPDRIVE_LOGENTRY (0x8002)
185#define MPT2_WARPDRIVE_LC_SSDT (0x41)
186#define MPT2_WARPDRIVE_LC_SSDLW (0x43)
187#define MPT2_WARPDRIVE_LC_SSDLF (0x44)
188#define MPT2_WARPDRIVE_LC_BRMF (0x4D)
189
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191
192
193#define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
194#define MPT_TARGET_FLAGS_VOLUME 0x02
195#define MPT_TARGET_FLAGS_DELETED 0x04
196#define MPT_TARGET_FASTPATH_IO 0x08
197#define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
198
199#define SAS2_PCI_DEVICE_B0_REVISION (0x01)
200#define SAS3_PCI_DEVICE_C0_REVISION (0x02)
201
202
203#define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
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206
207
208#define MPT2SAS_INTEL_RMS25JB080_BRANDING \
209 "Intel(R) Integrated RAID Module RMS25JB080"
210#define MPT2SAS_INTEL_RMS25JB040_BRANDING \
211 "Intel(R) Integrated RAID Module RMS25JB040"
212#define MPT2SAS_INTEL_RMS25KB080_BRANDING \
213 "Intel(R) Integrated RAID Module RMS25KB080"
214#define MPT2SAS_INTEL_RMS25KB040_BRANDING \
215 "Intel(R) Integrated RAID Module RMS25KB040"
216#define MPT2SAS_INTEL_RMS25LB040_BRANDING \
217 "Intel(R) Integrated RAID Module RMS25LB040"
218#define MPT2SAS_INTEL_RMS25LB080_BRANDING \
219 "Intel(R) Integrated RAID Module RMS25LB080"
220#define MPT2SAS_INTEL_RMS2LL080_BRANDING \
221 "Intel Integrated RAID Module RMS2LL080"
222#define MPT2SAS_INTEL_RMS2LL040_BRANDING \
223 "Intel Integrated RAID Module RMS2LL040"
224#define MPT2SAS_INTEL_RS25GB008_BRANDING \
225 "Intel(R) RAID Controller RS25GB008"
226#define MPT2SAS_INTEL_SSD910_BRANDING \
227 "Intel(R) SSD 910 Series"
228
229#define MPT3SAS_INTEL_RMS3JC080_BRANDING \
230 "Intel(R) Integrated RAID Module RMS3JC080"
231#define MPT3SAS_INTEL_RS3GC008_BRANDING \
232 "Intel(R) RAID Controller RS3GC008"
233#define MPT3SAS_INTEL_RS3FC044_BRANDING \
234 "Intel(R) RAID Controller RS3FC044"
235#define MPT3SAS_INTEL_RS3UC080_BRANDING \
236 "Intel(R) RAID Controller RS3UC080"
237
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239
240
241#define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
242#define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
243#define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
244#define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
245#define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
246#define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
247#define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
248#define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
249#define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
250#define MPT2SAS_INTEL_SSD910_SSDID 0x3700
251
252#define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
253#define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
254#define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
255#define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
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259
260#define MPT2SAS_DELL_BRANDING_SIZE 32
261
262#define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
263#define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
264#define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
265#define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
266#define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
267#define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
268#define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
269
270#define MPT3SAS_DELL_12G_HBA_BRANDING \
271 "Dell 12Gbps HBA"
272
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275
276#define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
277#define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
278#define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
279#define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
280#define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
281#define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
282#define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
283
284#define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
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289#define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
290 "Cisco 9300-8E 12G SAS HBA"
291#define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
292 "Cisco 9300-8i 12G SAS HBA"
293#define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
294 "Cisco 12G Modular SAS Pass through Controller"
295#define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
296 "UCS C3X60 12G SAS Pass through Controller"
297
298
299
300#define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
301#define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
302#define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
303#define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
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307
308#define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
309#define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
310#define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
311#define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08)
312#define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10)
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316
317#define MPT2SAS_HP_3PAR_SSVID 0x1590
318
319#define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
320 "HP H220 Host Bus Adapter"
321#define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
322 "HP H221 Host Bus Adapter"
323#define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
324 "HP H222 Host Bus Adapter"
325#define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
326 "HP H220i Host Bus Adapter"
327#define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
328 "HP H210i Host Bus Adapter"
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332
333#define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
334#define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
335#define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
336#define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
337#define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
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343
344#define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
345#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
346#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
347#define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
348
349
350#define MFG10_OEM_ID_INVALID (0x00000000)
351#define MFG10_OEM_ID_DELL (0x00000001)
352#define MFG10_OEM_ID_FSC (0x00000002)
353#define MFG10_OEM_ID_SUN (0x00000003)
354#define MFG10_OEM_ID_IBM (0x00000004)
355
356
357#define MFG10_GF0_OCE_DISABLED (0x00000001)
358#define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
359#define MFG10_GF0_R10_DISPLAY (0x00000004)
360#define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
361#define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
362
363#define VIRTUAL_IO_FAILED_RETRY (0x32010081)
364
365
366#define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8
367#define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8
368#define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16
369#define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128
370#define RDPQ_MAX_INDEX_IN_ONE_CHUNK 16
371
372
373struct Mpi2ManufacturingPage10_t {
374 MPI2_CONFIG_PAGE_HEADER Header;
375 U8 OEMIdentifier;
376 U8 Reserved1;
377 U16 Reserved2;
378 U32 Reserved3;
379 U32 GenericFlags0;
380 U32 GenericFlags1;
381 U32 Reserved4;
382 U32 OEMSpecificFlags0;
383 U32 OEMSpecificFlags1;
384 U32 Reserved5[18];
385};
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389struct Mpi2ManufacturingPage11_t {
390 MPI2_CONFIG_PAGE_HEADER Header;
391 __le32 Reserved1;
392 u8 Reserved2;
393 u8 EEDPTagMode;
394 u8 Reserved3;
395 u8 Reserved4;
396 __le32 Reserved5[8];
397 u16 AddlFlags2;
398 u8 AddlFlags3;
399 u8 Reserved6;
400 __le32 Reserved7[7];
401 u8 NVMeAbortTO;
402 u8 NumPerDevEvents;
403 u8 HostTraceBufferDecrementSizeKB;
404 u8 HostTraceBufferFlags;
405 u16 HostTraceBufferMaxSizeKB;
406 u16 HostTraceBufferMinSizeKB;
407 u8 CoreDumpTOSec;
408 u8 Reserved8;
409 u16 Reserved9;
410 __le32 Reserved10;
411};
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426struct MPT3SAS_TARGET {
427 struct scsi_target *starget;
428 u64 sas_address;
429 struct _raid_device *raid_device;
430 u16 handle;
431 int num_luns;
432 u32 flags;
433 u8 deleted;
434 u8 tm_busy;
435 struct _sas_device *sas_dev;
436 struct _pcie_device *pcie_dev;
437};
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443#define MPT_DEVICE_FLAGS_INIT 0x01
444
445#define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
446#define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
447#define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
448#define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
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463struct MPT3SAS_DEVICE {
464 struct MPT3SAS_TARGET *sas_target;
465 unsigned int lun;
466 u32 flags;
467 u8 configured_lun;
468 u8 block;
469 u8 tlr_snoop_check;
470 u8 ignore_delay_remove;
471
472 u8 ncq_prio_enable;
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483 unsigned long ata_command_pending;
484
485};
486
487#define MPT3_CMD_NOT_USED 0x8000
488#define MPT3_CMD_COMPLETE 0x0001
489#define MPT3_CMD_PENDING 0x0002
490#define MPT3_CMD_REPLY_VALID 0x0004
491#define MPT3_CMD_RESET 0x0008
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502struct _internal_cmd {
503 struct mutex mutex;
504 struct completion done;
505 void *reply;
506 void *sense;
507 u16 status;
508 u16 smid;
509};
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538struct _sas_device {
539 struct list_head list;
540 struct scsi_target *starget;
541 u64 sas_address;
542 u64 device_name;
543 u16 handle;
544 u64 sas_address_parent;
545 u16 enclosure_handle;
546 u64 enclosure_logical_id;
547 u16 volume_handle;
548 u64 volume_wwid;
549 u32 device_info;
550 int id;
551 int channel;
552 u16 slot;
553 u8 phy;
554 u8 responding;
555 u8 fast_path;
556 u8 pfa_led_on;
557 u8 pend_sas_rphy_add;
558 u8 enclosure_level;
559 u8 chassis_slot;
560 u8 is_chassis_slot_valid;
561 u8 connector_name[5];
562 struct kref refcount;
563};
564
565static inline void sas_device_get(struct _sas_device *s)
566{
567 kref_get(&s->refcount);
568}
569
570static inline void sas_device_free(struct kref *r)
571{
572 kfree(container_of(r, struct _sas_device, refcount));
573}
574
575static inline void sas_device_put(struct _sas_device *s)
576{
577 kref_put(&s->refcount, sas_device_free);
578}
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604struct _pcie_device {
605 struct list_head list;
606 struct scsi_target *starget;
607 u64 wwid;
608 u16 handle;
609 u32 device_info;
610 int id;
611 int channel;
612 u16 slot;
613 u8 port_num;
614 u8 responding;
615 u8 fast_path;
616 u32 nvme_mdts;
617 u16 enclosure_handle;
618 u64 enclosure_logical_id;
619 u8 enclosure_level;
620 u8 connector_name[4];
621 u8 *serial_number;
622 u8 reset_timeout;
623 u8 access_status;
624 u16 shutdown_latency;
625 struct kref refcount;
626};
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636static inline void pcie_device_get(struct _pcie_device *p)
637{
638 kref_get(&p->refcount);
639}
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648static inline void pcie_device_free(struct kref *r)
649{
650 kfree(container_of(r, struct _pcie_device, refcount));
651}
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664static inline void pcie_device_put(struct _pcie_device *p)
665{
666 kref_put(&p->refcount, pcie_device_free);
667}
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691#define MPT_MAX_WARPDRIVE_PDS 8
692struct _raid_device {
693 struct list_head list;
694 struct scsi_target *starget;
695 struct scsi_device *sdev;
696 u64 wwid;
697 u16 handle;
698 u16 block_sz;
699 int id;
700 int channel;
701 u8 volume_type;
702 u8 num_pds;
703 u8 responding;
704 u8 percent_complete;
705 u8 direct_io_enabled;
706 u8 stripe_exponent;
707 u8 block_exponent;
708 u64 max_lba;
709 u32 stripe_sz;
710 u32 device_info;
711 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
712};
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721struct _boot_device {
722 int channel;
723 void *device;
724};
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735struct _sas_port {
736 struct list_head port_list;
737 u8 num_phys;
738 struct sas_identify remote_identify;
739 struct sas_rphy *rphy;
740 struct sas_port *port;
741 struct list_head phy_list;
742};
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755struct _sas_phy {
756 struct list_head port_siblings;
757 struct sas_identify identify;
758 struct sas_identify remote_identify;
759 struct sas_phy *phy;
760 u8 phy_id;
761 u16 handle;
762 u16 attached_handle;
763 u8 phy_belongs_to_port;
764};
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780struct _sas_node {
781 struct list_head list;
782 struct device *parent_dev;
783 u8 num_phys;
784 u64 sas_address;
785 u16 handle;
786 u64 sas_address_parent;
787 u16 enclosure_handle;
788 u64 enclosure_logical_id;
789 u8 responding;
790 struct _sas_phy *phy;
791 struct list_head sas_port_list;
792};
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800struct _enclosure_node {
801 struct list_head list;
802 Mpi2SasEnclosurePage0_t pg0;
803};
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810enum reset_type {
811 FORCE_BIG_HAMMER,
812 SOFT_RESET,
813};
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820struct pcie_sg_list {
821 void *pcie_sgl;
822 dma_addr_t pcie_sgl_dma;
823};
824
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831struct chain_tracker {
832 void *chain_buffer;
833 dma_addr_t chain_buffer_dma;
834};
835
836struct chain_lookup {
837 struct chain_tracker *chains_per_smid;
838 atomic_t chain_offset;
839};
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849struct scsiio_tracker {
850 u16 smid;
851 struct scsi_cmnd *scmd;
852 u8 cb_idx;
853 u8 direct_io;
854 struct pcie_sg_list pcie_sg_list;
855 struct list_head chain_list;
856 u16 msix_io;
857};
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865struct request_tracker {
866 u16 smid;
867 u8 cb_idx;
868 struct list_head tracker_list;
869};
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876struct _tr_list {
877 struct list_head list;
878 u16 handle;
879 u16 state;
880};
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886struct _sc_list {
887 struct list_head list;
888 u16 handle;
889};
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896struct _event_ack_list {
897 struct list_head list;
898 U16 Event;
899 U32 EventContext;
900};
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916struct adapter_reply_queue {
917 struct MPT3SAS_ADAPTER *ioc;
918 u8 msix_index;
919 u32 reply_post_host_index;
920 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
921 char name[MPT_NAME_LENGTH];
922 atomic_t busy;
923 u32 os_irq;
924 struct irq_poll irqpoll;
925 bool irq_poll_scheduled;
926 bool irq_line_enable;
927 struct list_head list;
928};
929
930typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
931
932
933typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
934 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
935typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
936 dma_addr_t data_out_dma, size_t data_out_sz,
937 dma_addr_t data_in_dma, size_t data_in_sz);
938typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
939 void *paddr);
940
941
942typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
943 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
944 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
945 size_t data_in_sz);
946
947
948typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
949 u16 funcdep);
950typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
951typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
952
953
954
955
956typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
957 struct scsi_cmnd *scmd);
958
959
960union mpi3_version_union {
961 MPI2_VERSION_STRUCT Struct;
962 u32 Word;
963};
964
965struct mpt3sas_facts {
966 u16 MsgVersion;
967 u16 HeaderVersion;
968 u8 IOCNumber;
969 u8 VP_ID;
970 u8 VF_ID;
971 u16 IOCExceptions;
972 u16 IOCStatus;
973 u32 IOCLogInfo;
974 u8 MaxChainDepth;
975 u8 WhoInit;
976 u8 NumberOfPorts;
977 u8 MaxMSIxVectors;
978 u16 RequestCredit;
979 u16 ProductID;
980 u32 IOCCapabilities;
981 union mpi3_version_union FWVersion;
982 u16 IOCRequestFrameSize;
983 u16 IOCMaxChainSegmentSize;
984 u16 MaxInitiators;
985 u16 MaxTargets;
986 u16 MaxSasExpanders;
987 u16 MaxEnclosures;
988 u16 ProtocolFlags;
989 u16 HighPriorityCredit;
990 u16 MaxReplyDescriptorPostQueueDepth;
991 u8 ReplyFrameSize;
992 u8 MaxVolumes;
993 u16 MaxDevHandle;
994 u16 MaxPersistentEntries;
995 u16 MinDevHandle;
996 u8 CurrentHostPageSize;
997};
998
999struct mpt3sas_port_facts {
1000 u8 PortNumber;
1001 u8 VP_ID;
1002 u8 VF_ID;
1003 u8 PortType;
1004 u16 MaxPostedCmdBuffers;
1005};
1006
1007struct reply_post_struct {
1008 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
1009 dma_addr_t reply_post_free_dma;
1010};
1011
1012typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
1013
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1192
1193struct MPT3SAS_ADAPTER {
1194 struct list_head list;
1195 struct Scsi_Host *shost;
1196 u8 id;
1197 int cpu_count;
1198 char name[MPT_NAME_LENGTH];
1199 char driver_name[MPT_NAME_LENGTH - 8];
1200 char tmp_string[MPT_STRING_LENGTH];
1201 struct pci_dev *pdev;
1202 Mpi2SystemInterfaceRegs_t __iomem *chip;
1203 phys_addr_t chip_phys;
1204 int logging_level;
1205 int fwfault_debug;
1206 u8 ir_firmware;
1207 int bars;
1208 u8 mask_interrupts;
1209
1210
1211 char fault_reset_work_q_name[20];
1212 struct workqueue_struct *fault_reset_work_q;
1213 struct delayed_work fault_reset_work;
1214
1215
1216 char firmware_event_name[20];
1217 struct workqueue_struct *firmware_event_thread;
1218 spinlock_t fw_event_lock;
1219 struct list_head fw_event_list;
1220
1221
1222 int aen_event_read_flag;
1223 u8 broadcast_aen_busy;
1224 u16 broadcast_aen_pending;
1225 u8 shost_recovery;
1226 u8 got_task_abort_from_ioctl;
1227
1228 struct mutex reset_in_progress_mutex;
1229 spinlock_t ioc_reset_in_progress_lock;
1230 u8 ioc_link_reset_in_progress;
1231
1232 u8 ignore_loginfos;
1233 u8 remove_host;
1234 u8 pci_error_recovery;
1235 u8 wait_for_discovery_to_complete;
1236 u8 is_driver_loading;
1237 u8 port_enable_failed;
1238 u8 start_scan;
1239 u16 start_scan_failed;
1240
1241 u8 msix_enable;
1242 u16 msix_vector_count;
1243 u8 *cpu_msix_table;
1244 u16 cpu_msix_table_sz;
1245 resource_size_t __iomem **reply_post_host_index;
1246 u32 ioc_reset_count;
1247 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1248 u32 non_operational_loop;
1249 u8 ioc_coredump_loop;
1250 atomic64_t total_io_cnt;
1251 atomic64_t high_iops_outstanding;
1252 bool msix_load_balance;
1253 u16 thresh_hold;
1254 u8 high_iops_queues;
1255 u32 drv_support_bitmap;
1256 bool enable_sdev_max_qd;
1257 bool use_32bit_dma;
1258
1259
1260 u8 scsi_io_cb_idx;
1261 u8 tm_cb_idx;
1262 u8 transport_cb_idx;
1263 u8 scsih_cb_idx;
1264 u8 ctl_cb_idx;
1265 u8 base_cb_idx;
1266 u8 port_enable_cb_idx;
1267 u8 config_cb_idx;
1268 u8 tm_tr_cb_idx;
1269 u8 tm_tr_volume_cb_idx;
1270 u8 tm_sas_control_cb_idx;
1271 struct _internal_cmd base_cmds;
1272 struct _internal_cmd port_enable_cmds;
1273 struct _internal_cmd transport_cmds;
1274 struct _internal_cmd scsih_cmds;
1275 struct _internal_cmd tm_cmds;
1276 struct _internal_cmd ctl_cmds;
1277 struct _internal_cmd config_cmds;
1278
1279 MPT_ADD_SGE base_add_sg_single;
1280
1281
1282 MPT_BUILD_SG_SCMD build_sg_scmd;
1283 MPT_BUILD_SG build_sg;
1284 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1285 u16 sge_size_ieee;
1286 u16 hba_mpi_version_belonged;
1287
1288
1289 MPT_BUILD_SG build_sg_mpi;
1290 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1291
1292
1293 NVME_BUILD_PRP build_nvme_prp;
1294
1295
1296 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1297 u32 event_context;
1298 void *event_log;
1299 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1300
1301 u8 tm_custom_handling;
1302 u8 nvme_abort_timeout;
1303 u16 max_shutdown_latency;
1304
1305
1306 struct mpt3sas_facts facts;
1307 struct mpt3sas_facts prev_fw_facts;
1308 struct mpt3sas_port_facts *pfacts;
1309 Mpi2ManufacturingPage0_t manu_pg0;
1310 struct Mpi2ManufacturingPage10_t manu_pg10;
1311 struct Mpi2ManufacturingPage11_t manu_pg11;
1312 Mpi2BiosPage2_t bios_pg2;
1313 Mpi2BiosPage3_t bios_pg3;
1314 Mpi2IOCPage8_t ioc_pg8;
1315 Mpi2IOUnitPage0_t iounit_pg0;
1316 Mpi2IOUnitPage1_t iounit_pg1;
1317 Mpi2IOUnitPage8_t iounit_pg8;
1318 Mpi2IOCPage1_t ioc_pg1_copy;
1319
1320 struct _boot_device req_boot_device;
1321 struct _boot_device req_alt_boot_device;
1322 struct _boot_device current_boot_device;
1323
1324
1325 struct _sas_node sas_hba;
1326 struct list_head sas_expander_list;
1327 struct list_head enclosure_list;
1328 spinlock_t sas_node_lock;
1329 struct list_head sas_device_list;
1330 struct list_head sas_device_init_list;
1331 spinlock_t sas_device_lock;
1332 struct list_head pcie_device_list;
1333 struct list_head pcie_device_init_list;
1334 spinlock_t pcie_device_lock;
1335
1336 struct list_head raid_device_list;
1337 spinlock_t raid_device_lock;
1338 u8 io_missing_delay;
1339 u16 device_missing_delay;
1340 int sas_id;
1341 int pcie_target_id;
1342
1343 void *blocking_handles;
1344 void *pd_handles;
1345 u16 pd_handles_sz;
1346
1347 void *pend_os_device_add;
1348 u16 pend_os_device_add_sz;
1349
1350
1351 u16 config_page_sz;
1352 void *config_page;
1353 dma_addr_t config_page_dma;
1354 void *config_vaddr;
1355
1356
1357 u16 hba_queue_depth;
1358 u16 sge_size;
1359 u16 scsiio_depth;
1360 u16 request_sz;
1361 u8 *request;
1362 dma_addr_t request_dma;
1363 u32 request_dma_sz;
1364 struct pcie_sg_list *pcie_sg_lookup;
1365 spinlock_t scsi_lookup_lock;
1366 int pending_io_count;
1367 wait_queue_head_t reset_wq;
1368
1369
1370 struct dma_pool *pcie_sgl_dma_pool;
1371
1372 u32 page_size;
1373
1374
1375 struct chain_lookup *chain_lookup;
1376 struct list_head free_chain_list;
1377 struct dma_pool *chain_dma_pool;
1378 ulong chain_pages;
1379 u16 max_sges_in_main_message;
1380 u16 max_sges_in_chain_message;
1381 u16 chains_needed_per_io;
1382 u32 chain_depth;
1383 u16 chain_segment_sz;
1384 u16 chains_per_prp_buffer;
1385
1386
1387 u16 hi_priority_smid;
1388 u8 *hi_priority;
1389 dma_addr_t hi_priority_dma;
1390 u16 hi_priority_depth;
1391 struct request_tracker *hpr_lookup;
1392 struct list_head hpr_free_list;
1393
1394
1395 u16 internal_smid;
1396 u8 *internal;
1397 dma_addr_t internal_dma;
1398 u16 internal_depth;
1399 struct request_tracker *internal_lookup;
1400 struct list_head internal_free_list;
1401
1402
1403 u8 *sense;
1404 dma_addr_t sense_dma;
1405 struct dma_pool *sense_dma_pool;
1406
1407
1408 u16 reply_sz;
1409 u8 *reply;
1410 dma_addr_t reply_dma;
1411 u32 reply_dma_max_address;
1412 u32 reply_dma_min_address;
1413 struct dma_pool *reply_dma_pool;
1414
1415
1416 u16 reply_free_queue_depth;
1417 __le32 *reply_free;
1418 dma_addr_t reply_free_dma;
1419 struct dma_pool *reply_free_dma_pool;
1420 u32 reply_free_host_index;
1421
1422
1423 u16 reply_post_queue_depth;
1424 struct reply_post_struct *reply_post;
1425 u8 rdpq_array_capable;
1426 u8 rdpq_array_enable;
1427 u8 rdpq_array_enable_assigned;
1428 struct dma_pool *reply_post_free_dma_pool;
1429 struct dma_pool *reply_post_free_array_dma_pool;
1430 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1431 dma_addr_t reply_post_free_array_dma;
1432 u8 reply_queue_count;
1433 struct list_head reply_queue_list;
1434
1435 u8 combined_reply_queue;
1436 u8 combined_reply_index_count;
1437 u8 smp_affinity_enable;
1438
1439 resource_size_t **replyPostRegisterIndex;
1440
1441 struct list_head delayed_tr_list;
1442 struct list_head delayed_tr_volume_list;
1443 struct list_head delayed_sc_list;
1444 struct list_head delayed_event_ack_list;
1445 u8 temp_sensors_count;
1446 struct mutex pci_access_mutex;
1447
1448
1449 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1450 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1451 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1452 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1453 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1454 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1455 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1456 u32 ring_buffer_offset;
1457 u32 ring_buffer_sz;
1458 u8 is_warpdrive;
1459 u8 is_mcpu_endpoint;
1460 u8 hide_ir_msg;
1461 u8 mfg_pg10_hide_flag;
1462 u8 hide_drives;
1463 spinlock_t diag_trigger_lock;
1464 u8 diag_trigger_active;
1465 u8 atomic_desc_capable;
1466 BASE_READ_REG base_readl;
1467 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1468 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1469 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1470 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1471 void *device_remove_in_progress;
1472 u16 device_remove_in_progress_sz;
1473 u8 is_gen35_ioc;
1474 u8 is_aero_ioc;
1475 struct dentry *debugfs_root;
1476 struct dentry *ioc_dump;
1477 PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1478 PUT_SMID_IO_FP_HIP put_smid_fast_path;
1479 PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1480 PUT_SMID_DEFAULT put_smid_default;
1481 GET_MSIX_INDEX get_msix_index_for_smlio;
1482};
1483
1484struct mpt3sas_debugfs_buffer {
1485 void *buf;
1486 u32 len;
1487};
1488
1489#define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1490
1491typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1492 u32 reply);
1493
1494
1495
1496extern struct list_head mpt3sas_ioc_list;
1497extern char driver_name[MPT_NAME_LENGTH];
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508extern spinlock_t gioc_lock;
1509
1510void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1511void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1512
1513int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1514void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1515int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1516void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1517void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1518int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1519 enum reset_type type);
1520
1521void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1522void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1523__le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1524 u16 smid);
1525void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1526dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1527void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc);
1528
1529void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1530 u16 handle);
1531void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1532 u16 msix_task);
1533void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1534void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1535
1536u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1537u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1538 struct scsi_cmnd *scmd);
1539void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1540 struct scsiio_tracker *st);
1541
1542u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1543void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1544void mpt3sas_base_initialize_callback_handler(void);
1545u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1546void mpt3sas_base_release_callback_handler(u8 cb_idx);
1547
1548u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1549 u32 reply);
1550u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1551 u8 msix_index, u32 reply);
1552void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1553 u32 phys_addr);
1554
1555u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1556
1557void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1558#define mpt3sas_print_fault_code(ioc, fault_code) \
1559do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1560 mpt3sas_base_fault_info(ioc, fault_code); } while (0)
1561
1562void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code);
1563#define mpt3sas_print_coredump_info(ioc, fault_code) \
1564do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1565 mpt3sas_base_coredump_info(ioc, fault_code); } while (0)
1566
1567int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc,
1568 const char *caller);
1569int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1570 Mpi2SasIoUnitControlReply_t *mpi_reply,
1571 Mpi2SasIoUnitControlRequest_t *mpi_request);
1572int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1573 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1574
1575void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1576 u32 *event_type);
1577
1578void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1579
1580void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1581 u16 device_missing_delay, u8 io_missing_delay);
1582
1583int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1584
1585void
1586mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1587
1588u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1589 u8 status, void *mpi_request, int sz);
1590#define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) \
1591do { ioc_err(ioc, "In func: %s\n", __func__); \
1592 issue_reset = mpt3sas_base_check_cmd_timeout(ioc, \
1593 status, mpi_request, sz); } while (0)
1594
1595int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1596
1597
1598struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1599 u16 smid);
1600u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1601 u32 reply);
1602void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1603void mpt3sas_scsih_clear_outstanding_scsi_tm_commands(
1604 struct MPT3SAS_ADAPTER *ioc);
1605void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1606
1607int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun,
1608 u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method);
1609int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1610 u64 lun, u8 type, u16 smid_task, u16 msix_task,
1611 u8 timeout, u8 tr_method);
1612
1613void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1614void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1615void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1616void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1617 u64 sas_address);
1618u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1619 u16 smid);
1620
1621struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1622 struct MPT3SAS_ADAPTER *ioc, u16 handle);
1623struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1624 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1625struct _sas_device *mpt3sas_get_sdev_by_addr(
1626 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1627struct _sas_device *__mpt3sas_get_sdev_by_addr(
1628 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1629struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1630 u16 handle);
1631struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1632 u16 handle);
1633
1634void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1635struct _raid_device *
1636mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1637void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
1638
1639
1640u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1641 u32 reply);
1642int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1643 u8 *num_phys);
1644int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1645 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1646int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1647 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1648 u16 sz);
1649int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1650 Mpi2ConfigReply_t *mpi_reply,
1651 struct Mpi2ManufacturingPage10_t *config_page);
1652
1653int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1654 Mpi2ConfigReply_t *mpi_reply,
1655 struct Mpi2ManufacturingPage11_t *config_page);
1656int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1657 Mpi2ConfigReply_t *mpi_reply,
1658 struct Mpi2ManufacturingPage11_t *config_page);
1659
1660int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1661 *mpi_reply, Mpi2BiosPage2_t *config_page);
1662int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1663 *mpi_reply, Mpi2BiosPage3_t *config_page);
1664int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1665 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1666int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1667 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1668 u32 form, u32 handle);
1669int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1670 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1671 u32 form, u32 handle);
1672int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1673 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1674 u32 form, u32 handle);
1675int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1676 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1677 u32 form, u32 handle);
1678int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1679 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1680 u16 sz);
1681int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1682 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1683int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1684 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1685int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1686 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1687int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1688 *mpi_reply, Mpi2IOUnitPage8_t *config_page);
1689int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1690 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1691 u16 sz);
1692int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1693 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1694 u16 sz);
1695int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1696 *mpi_reply, Mpi2IOCPage1_t *config_page);
1697int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1698 *mpi_reply, Mpi2IOCPage1_t *config_page);
1699int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1700 *mpi_reply, Mpi2IOCPage8_t *config_page);
1701int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1702 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1703 u32 form, u32 handle);
1704int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1705 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1706 u32 phy_number, u16 handle);
1707int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1708 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1709 u32 form, u32 handle);
1710int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1711 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1712int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1713 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1714int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1715 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1716 u32 handle);
1717int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1718 u8 *num_pds);
1719int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1720 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1721 u32 handle, u16 sz);
1722int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1723 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1724 u32 form, u32 form_specific);
1725int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1726 u16 *volume_handle);
1727int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1728 u16 volume_handle, u64 *wwid);
1729
1730
1731extern struct device_attribute *mpt3sas_host_attrs[];
1732extern struct device_attribute *mpt3sas_dev_attrs[];
1733void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1734void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1735u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1736 u32 reply);
1737void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1738void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc);
1739void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1740u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1741 u8 msix_index, u32 reply);
1742void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1743 Mpi2EventNotificationReply_t *mpi_reply);
1744
1745void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1746 u8 bits_to_register);
1747int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1748 u8 *issue_reset);
1749
1750
1751extern struct scsi_transport_template *mpt3sas_transport_template;
1752u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1753 u32 reply);
1754struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1755 u16 handle, u64 sas_address);
1756void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1757 u64 sas_address_parent);
1758int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1759 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1760int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1761 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1762 struct device *parent_dev);
1763void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1764 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1765extern struct sas_function_template mpt3sas_transport_functions;
1766extern struct scsi_transport_template *mpt3sas_transport_template;
1767
1768void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1769 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1770void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1771 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1772void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1773 u32 tigger_bitmask);
1774void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1775 u16 log_entry_qualifier);
1776void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1777 u8 asc, u8 ascq);
1778void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1779 u32 loginfo);
1780
1781
1782u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1783void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1784 struct _raid_device *raid_device);
1785void
1786mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1787 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
1788
1789
1790bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1791
1792void mpt3sas_setup_debugfs(struct MPT3SAS_ADAPTER *ioc);
1793void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc);
1794void mpt3sas_init_debugfs(void);
1795void mpt3sas_exit_debugfs(void);
1796
1797
1798
1799
1800
1801
1802
1803
1804static inline int
1805mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
1806{
1807 if ((device_info &
1808 MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
1809 return 1;
1810 else
1811 return 0;
1812}
1813#endif
1814