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29static int set_sample_rate(struct echoaudio *chip, u32 rate)
30{
31 u32 clock, control_reg, old_control_reg;
32
33 if (wait_handshake(chip))
34 return -EIO;
35
36 old_control_reg = le32_to_cpu(chip->comm_page->control_register);
37 control_reg = old_control_reg & ~INDIGO_EXPRESS_CLOCK_MASK;
38
39 switch (rate) {
40 case 32000:
41 clock = INDIGO_EXPRESS_32000;
42 break;
43 case 44100:
44 clock = INDIGO_EXPRESS_44100;
45 break;
46 case 48000:
47 clock = INDIGO_EXPRESS_48000;
48 break;
49 case 64000:
50 clock = INDIGO_EXPRESS_32000|INDIGO_EXPRESS_DOUBLE_SPEED;
51 break;
52 case 88200:
53 clock = INDIGO_EXPRESS_44100|INDIGO_EXPRESS_DOUBLE_SPEED;
54 break;
55 case 96000:
56 clock = INDIGO_EXPRESS_48000|INDIGO_EXPRESS_DOUBLE_SPEED;
57 break;
58 default:
59 return -EINVAL;
60 }
61
62 control_reg |= clock;
63 if (control_reg != old_control_reg) {
64 dev_dbg(chip->card->dev,
65 "set_sample_rate: %d clock %d\n", rate, clock);
66 chip->comm_page->control_register = cpu_to_le32(control_reg);
67 chip->sample_rate = rate;
68 clear_handshake(chip);
69 return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
70 }
71 return 0;
72}
73
74
75
76
77static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
78 int gain)
79{
80 int index;
81
82 if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||
83 output >= num_busses_out(chip)))
84 return -EINVAL;
85
86 if (wait_handshake(chip))
87 return -EIO;
88
89 chip->vmixer_gain[output][pipe] = gain;
90 index = output * num_pipes_out(chip) + pipe;
91 chip->comm_page->vmixer[index] = gain;
92
93 dev_dbg(chip->card->dev,
94 "set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain);
95 return 0;
96}
97
98
99
100
101static int update_vmixer_level(struct echoaudio *chip)
102{
103 if (wait_handshake(chip))
104 return -EIO;
105 clear_handshake(chip);
106 return send_vector(chip, DSP_VC_SET_VMIXER_GAIN);
107}
108
109
110
111static u32 detect_input_clocks(const struct echoaudio *chip)
112{
113 return ECHO_CLOCK_BIT_INTERNAL;
114}
115
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118
119static int load_asic(struct echoaudio *chip)
120{
121 return 0;
122}
123