LXR linux/arch/arm/mach-imx/iomux-v3.h

   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
   4 *                      <armlinux@phytec.de>
   5 */
   6
   7#ifndef __MACH_IOMUX_V3_H__
   8#define __MACH_IOMUX_V3_H__
   9
  10/*
  11 *      build IOMUX_PAD structure
  12 *
  13 * This iomux scheme is based around pads, which are the physical balls
  14 * on the processor.
  15 *
  16 * - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls
  17 *   things like driving strength and pullup/pulldown.
  18 * - Each pad can have but not necessarily does have an output routing register
  19 *   (IOMUXC_SW_MUX_CTL_PAD_x).
  20 * - Each pad can have but not necessarily does have an input routing register
  21 *   (IOMUXC_x_SELECT_INPUT)
  22 *
  23 * The three register sets do not have a fixed offset to each other,
  24 * hence we order this table by pad control registers (which all pads
  25 * have) and put the optional i/o routing registers into additional
  26 * fields.
  27 *
  28 * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode>
  29 * If <padname> or <padmode> refers to a GPIO, it is named
  30 * GPIO_<unit>_<num>
  31 *
  32 * IOMUX/PAD Bit field definitions
  33 *
  34 * MUX_CTRL_OFS:            0..11 (12)
  35 * PAD_CTRL_OFS:           12..23 (12)
  36 * SEL_INPUT_OFS:          24..35 (12)
  37 * MUX_MODE + SION:        36..40  (5)
  38 * PAD_CTRL + NO_PAD_CTRL: 41..57 (17)
  39 * SEL_INP:                58..61  (4)
  40 * reserved:                 63    (1)
  41*/
  42
  43typedef u64 iomux_v3_cfg_t;
  44
  45#define MUX_CTRL_OFS_SHIFT      0
  46#define MUX_CTRL_OFS_MASK       ((iomux_v3_cfg_t)0xfff << MUX_CTRL_OFS_SHIFT)
  47#define MUX_PAD_CTRL_OFS_SHIFT  12
  48#define MUX_PAD_CTRL_OFS_MASK   ((iomux_v3_cfg_t)0xfff << MUX_PAD_CTRL_OFS_SHIFT)
  49#define MUX_SEL_INPUT_OFS_SHIFT 24
  50#define MUX_SEL_INPUT_OFS_MASK  ((iomux_v3_cfg_t)0xfff << MUX_SEL_INPUT_OFS_SHIFT)
  51
  52#define MUX_MODE_SHIFT          36
  53#define MUX_MODE_MASK           ((iomux_v3_cfg_t)0x1f << MUX_MODE_SHIFT)
  54#define MUX_PAD_CTRL_SHIFT      41
  55#define MUX_PAD_CTRL_MASK       ((iomux_v3_cfg_t)0x1ffff << MUX_PAD_CTRL_SHIFT)
  56#define MUX_SEL_INPUT_SHIFT     58
  57#define MUX_SEL_INPUT_MASK      ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT)
  58
  59#define MUX_PAD_CTRL(x)         ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT)
  60
  61#define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _sel_input_ofs, \
  62                _sel_input, _pad_ctrl)                                  \
  63        (((iomux_v3_cfg_t)(_mux_ctrl_ofs) << MUX_CTRL_OFS_SHIFT) |      \
  64                ((iomux_v3_cfg_t)(_mux_mode) << MUX_MODE_SHIFT) |       \
  65                ((iomux_v3_cfg_t)(_pad_ctrl_ofs) << MUX_PAD_CTRL_OFS_SHIFT) | \
  66                ((iomux_v3_cfg_t)(_pad_ctrl) << MUX_PAD_CTRL_SHIFT) |   \
  67                ((iomux_v3_cfg_t)(_sel_input_ofs) << MUX_SEL_INPUT_OFS_SHIFT) | \
  68                ((iomux_v3_cfg_t)(_sel_input) << MUX_SEL_INPUT_SHIFT))
  69
  70#define NEW_PAD_CTRL(cfg, pad)  (((cfg) & ~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(pad))
  71/*
  72 * Use to set PAD control
  73 */
  74
  75#define NO_PAD_CTRL                     (1 << 16)
  76#define PAD_CTL_DVS                     (1 << 13)
  77#define PAD_CTL_HYS                     (1 << 8)
  78
  79#define PAD_CTL_PKE                     (1 << 7)
  80#define PAD_CTL_PUE                     (1 << 6 | PAD_CTL_PKE)
  81#define PAD_CTL_PUS_100K_DOWN           (0 << 4 | PAD_CTL_PUE)
  82#define PAD_CTL_PUS_47K_UP              (1 << 4 | PAD_CTL_PUE)
  83#define PAD_CTL_PUS_100K_UP             (2 << 4 | PAD_CTL_PUE)
  84#define PAD_CTL_PUS_22K_UP              (3 << 4 | PAD_CTL_PUE)
  85
  86#define PAD_CTL_ODE                     (1 << 3)
  87
  88#define PAD_CTL_DSE_LOW                 (0 << 1)
  89#define PAD_CTL_DSE_MED                 (1 << 1)
  90#define PAD_CTL_DSE_HIGH                (2 << 1)
  91#define PAD_CTL_DSE_MAX                 (3 << 1)
  92
  93#define PAD_CTL_SRE_FAST                (1 << 0)
  94#define PAD_CTL_SRE_SLOW                (0 << 0)
  95
  96#define IOMUX_CONFIG_SION               (0x1 << 4)
  97
  98#define MX51_NUM_GPIO_PORT      4
  99
 100#define GPIO_PIN_MASK 0x1f
 101
 102#define GPIO_PORT_SHIFT 5
 103#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT)
 104
 105#define GPIO_PORTA      (0 << GPIO_PORT_SHIFT)
 106#define GPIO_PORTB      (1 << GPIO_PORT_SHIFT)
 107#define GPIO_PORTC      (2 << GPIO_PORT_SHIFT)
 108#define GPIO_PORTD      (3 << GPIO_PORT_SHIFT)
 109#define GPIO_PORTE      (4 << GPIO_PORT_SHIFT)
 110#define GPIO_PORTF      (5 << GPIO_PORT_SHIFT)
 111
 112/*
 113 * setups a single pad in the iomuxer
 114 */
 115int mxc_iomux_v3_setup_pad(iomux_v3_cfg_t pad);
 116
 117/*
 118 * setups multiple pads
 119 * convenient way to call the above function with tables
 120 */
 121int mxc_iomux_v3_setup_multiple_pads(const iomux_v3_cfg_t *pad_list,
 122                unsigned count);
 123
 124/*
 125 * Initialise the iomux controller
 126 */
 127void mxc_iomux_v3_init(void __iomem *iomux_v3_base);
 128
 129#endif /* __MACH_IOMUX_V3_H__*/
 130
 131