linux/arch/arm/mach-imx/mach-pca100.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
   4 * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
   5 */
   6
   7#include <linux/platform_device.h>
   8#include <linux/io.h>
   9#include <linux/i2c.h>
  10#include <linux/property.h>
  11#include <linux/dma-mapping.h>
  12#include <linux/spi/spi.h>
  13#include <linux/spi/eeprom.h>
  14#include <linux/irq.h>
  15#include <linux/delay.h>
  16#include <linux/gpio.h>
  17#include <linux/gpio/machine.h>
  18#include <linux/usb/otg.h>
  19#include <linux/usb/ulpi.h>
  20
  21#include <asm/mach/arch.h>
  22#include <asm/mach-types.h>
  23#include <asm/mach/time.h>
  24
  25#include "common.h"
  26#include "devices-imx27.h"
  27#include "ehci.h"
  28#include "hardware.h"
  29#include "iomux-mx27.h"
  30#include "ulpi.h"
  31
  32#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
  33#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
  34#define SPI1_SS0 (GPIO_PORTD + 28)
  35#define SPI1_SS1 (GPIO_PORTD + 27)
  36#define SD2_CD (GPIO_PORTC + 29)
  37
  38static const int pca100_pins[] __initconst = {
  39        /* UART1 */
  40        PE12_PF_UART1_TXD,
  41        PE13_PF_UART1_RXD,
  42        PE14_PF_UART1_CTS,
  43        PE15_PF_UART1_RTS,
  44        /* SDHC */
  45        PB4_PF_SD2_D0,
  46        PB5_PF_SD2_D1,
  47        PB6_PF_SD2_D2,
  48        PB7_PF_SD2_D3,
  49        PB8_PF_SD2_CMD,
  50        PB9_PF_SD2_CLK,
  51        SD2_CD | GPIO_GPIO | GPIO_IN,
  52        /* FEC */
  53        PD0_AIN_FEC_TXD0,
  54        PD1_AIN_FEC_TXD1,
  55        PD2_AIN_FEC_TXD2,
  56        PD3_AIN_FEC_TXD3,
  57        PD4_AOUT_FEC_RX_ER,
  58        PD5_AOUT_FEC_RXD1,
  59        PD6_AOUT_FEC_RXD2,
  60        PD7_AOUT_FEC_RXD3,
  61        PD8_AF_FEC_MDIO,
  62        PD9_AIN_FEC_MDC,
  63        PD10_AOUT_FEC_CRS,
  64        PD11_AOUT_FEC_TX_CLK,
  65        PD12_AOUT_FEC_RXD0,
  66        PD13_AOUT_FEC_RX_DV,
  67        PD14_AOUT_FEC_RX_CLK,
  68        PD15_AOUT_FEC_COL,
  69        PD16_AIN_FEC_TX_ER,
  70        PF23_AIN_FEC_TX_EN,
  71        /* SSI1 */
  72        PC20_PF_SSI1_FS,
  73        PC21_PF_SSI1_RXD,
  74        PC22_PF_SSI1_TXD,
  75        PC23_PF_SSI1_CLK,
  76        /* onboard I2C */
  77        PC5_PF_I2C2_SDA,
  78        PC6_PF_I2C2_SCL,
  79        /* external I2C */
  80        PD17_PF_I2C_DATA,
  81        PD18_PF_I2C_CLK,
  82        /* SPI1 */
  83        PD25_PF_CSPI1_RDY,
  84        PD29_PF_CSPI1_SCLK,
  85        PD30_PF_CSPI1_MISO,
  86        PD31_PF_CSPI1_MOSI,
  87        /* OTG */
  88        OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
  89        PC7_PF_USBOTG_DATA5,
  90        PC8_PF_USBOTG_DATA6,
  91        PC9_PF_USBOTG_DATA0,
  92        PC10_PF_USBOTG_DATA2,
  93        PC11_PF_USBOTG_DATA1,
  94        PC12_PF_USBOTG_DATA4,
  95        PC13_PF_USBOTG_DATA3,
  96        PE0_PF_USBOTG_NXT,
  97        PE1_PF_USBOTG_STP,
  98        PE2_PF_USBOTG_DIR,
  99        PE24_PF_USBOTG_CLK,
 100        PE25_PF_USBOTG_DATA7,
 101        /* USBH2 */
 102        USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
 103        PA0_PF_USBH2_CLK,
 104        PA1_PF_USBH2_DIR,
 105        PA2_PF_USBH2_DATA7,
 106        PA3_PF_USBH2_NXT,
 107        PA4_PF_USBH2_STP,
 108        PD19_AF_USBH2_DATA4,
 109        PD20_AF_USBH2_DATA3,
 110        PD21_AF_USBH2_DATA6,
 111        PD22_AF_USBH2_DATA0,
 112        PD23_AF_USBH2_DATA2,
 113        PD24_AF_USBH2_DATA1,
 114        PD26_AF_USBH2_DATA5,
 115        /* display */
 116        PA5_PF_LSCLK,
 117        PA6_PF_LD0,
 118        PA7_PF_LD1,
 119        PA8_PF_LD2,
 120        PA9_PF_LD3,
 121        PA10_PF_LD4,
 122        PA11_PF_LD5,
 123        PA12_PF_LD6,
 124        PA13_PF_LD7,
 125        PA14_PF_LD8,
 126        PA15_PF_LD9,
 127        PA16_PF_LD10,
 128        PA17_PF_LD11,
 129        PA18_PF_LD12,
 130        PA19_PF_LD13,
 131        PA20_PF_LD14,
 132        PA21_PF_LD15,
 133        PA22_PF_LD16,
 134        PA23_PF_LD17,
 135        PA26_PF_PS,
 136        PA28_PF_HSYNC,
 137        PA29_PF_VSYNC,
 138        PA31_PF_OE_ACD,
 139        /* free GPIO */
 140        GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
 141        GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
 142        GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
 143};
 144
 145static const struct imxuart_platform_data uart_pdata __initconst = {
 146        .flags = IMXUART_HAVE_RTSCTS,
 147};
 148
 149static const struct mxc_nand_platform_data
 150pca100_nand_board_info __initconst = {
 151        .width = 1,
 152        .hw_ecc = 1,
 153};
 154
 155static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
 156        .bitrate = 100000,
 157};
 158
 159static const struct property_entry board_eeprom_properties[] = {
 160        PROPERTY_ENTRY_U32("pagesize", 32),
 161        { }
 162};
 163
 164static struct i2c_board_info pca100_i2c_devices[] = {
 165        {
 166                I2C_BOARD_INFO("24c32", 0x52), /* E0=0, E1=1, E2=0 */
 167                .properties = board_eeprom_properties,
 168        }, {
 169                I2C_BOARD_INFO("pcf8563", 0x51),
 170        }, {
 171                I2C_BOARD_INFO("lm75", 0x4a),
 172        }
 173};
 174
 175static struct spi_eeprom at25320 = {
 176        .name           = "at25320an",
 177        .byte_len       = 4096,
 178        .page_size      = 32,
 179        .flags          = EE_ADDR2,
 180};
 181
 182static struct spi_board_info pca100_spi_board_info[] __initdata = {
 183        {
 184                .modalias = "at25",
 185                .max_speed_hz = 30000,
 186                .bus_num = 0,
 187                .chip_select = 1,
 188                .platform_data = &at25320,
 189        },
 190};
 191
 192static struct gpiod_lookup_table pca100_spi0_gpiod_table = {
 193        .dev_id = "imx27-cspi.0", /* Actual device name for spi0 */
 194        .table = {
 195                /*
 196                 * The i.MX27 has the i.MX21 GPIO controller, port D is
 197                 * bank 3 and thus named "imx21-gpio.3".
 198                 * SPI1_SS0 is GPIO_PORTD + 28
 199                 * SPI1_SS1 is GPIO_PORTD + 27
 200                 */
 201                GPIO_LOOKUP_IDX("imx21-gpio.3", 28, "cs", 0, GPIO_ACTIVE_LOW),
 202                GPIO_LOOKUP_IDX("imx21-gpio.3", 27, "cs", 1, GPIO_ACTIVE_LOW),
 203                { },
 204        },
 205};
 206
 207static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
 208{
 209        mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
 210        gpio_set_value(GPIO_PORTC + 20, 1);
 211        udelay(2);
 212        gpio_set_value(GPIO_PORTC + 20, 0);
 213        mxc_gpio_mode(PC20_PF_SSI1_FS);
 214        msleep(2);
 215}
 216
 217static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
 218{
 219        mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);  /* FS */
 220        gpio_set_value(GPIO_PORTC + 20, 0);
 221        mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT);  /* TX */
 222        gpio_set_value(GPIO_PORTC + 22, 0);
 223        mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT);  /* reset */
 224        gpio_set_value(GPIO_PORTC + 28, 0);
 225        udelay(10);
 226        gpio_set_value(GPIO_PORTC + 28, 1);
 227        mxc_gpio_mode(PC20_PF_SSI1_FS);
 228        mxc_gpio_mode(PC22_PF_SSI1_TXD);
 229        msleep(2);
 230}
 231
 232static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
 233        .ac97_reset             = pca100_ac97_cold_reset,
 234        .ac97_warm_reset        = pca100_ac97_warm_reset,
 235        .flags                  = IMX_SSI_USE_AC97,
 236};
 237
 238static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
 239                void *data)
 240{
 241        int ret;
 242
 243        ret = request_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), detect_irq,
 244                          IRQF_TRIGGER_FALLING, "imx-mmc-detect", data);
 245        if (ret)
 246                printk(KERN_ERR
 247                        "pca100: Failed to request irq for sd/mmc detection\n");
 248
 249        return ret;
 250}
 251
 252static void pca100_sdhc2_exit(struct device *dev, void *data)
 253{
 254        free_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), data);
 255}
 256
 257static const struct imxmmc_platform_data sdhc_pdata __initconst = {
 258        .init = pca100_sdhc2_init,
 259        .exit = pca100_sdhc2_exit,
 260};
 261
 262static int otg_phy_init(struct platform_device *pdev)
 263{
 264        gpio_set_value(OTG_PHY_CS_GPIO, 0);
 265
 266        mdelay(10);
 267
 268        return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
 269}
 270
 271static struct mxc_usbh_platform_data otg_pdata __initdata = {
 272        .init   = otg_phy_init,
 273        .portsc = MXC_EHCI_MODE_ULPI,
 274};
 275
 276static int usbh2_phy_init(struct platform_device *pdev)
 277{
 278        gpio_set_value(USBH2_PHY_CS_GPIO, 0);
 279
 280        mdelay(10);
 281
 282        return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
 283}
 284
 285static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
 286        .init   = usbh2_phy_init,
 287        .portsc = MXC_EHCI_MODE_ULPI,
 288};
 289
 290static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
 291        .operating_mode = FSL_USB2_DR_DEVICE,
 292        .phy_mode       = FSL_USB2_PHY_ULPI,
 293};
 294
 295static bool otg_mode_host __initdata;
 296
 297static int __init pca100_otg_mode(char *options)
 298{
 299        if (!strcmp(options, "host"))
 300                otg_mode_host = true;
 301        else if (!strcmp(options, "device"))
 302                otg_mode_host = false;
 303        else
 304                pr_info("otg_mode neither \"host\" nor \"device\". "
 305                        "Defaulting to device\n");
 306        return 1;
 307}
 308__setup("otg_mode=", pca100_otg_mode);
 309
 310/* framebuffer info */
 311static struct imx_fb_videomode pca100_fb_modes[] = {
 312        {
 313                .mode = {
 314                        .name           = "EMERGING-ETV570G0DHU",
 315                        .refresh        = 60,
 316                        .xres           = 640,
 317                        .yres           = 480,
 318                        .pixclock       = 39722, /* in ps (25.175 MHz) */
 319                        .hsync_len      = 30,
 320                        .left_margin    = 114,
 321                        .right_margin   = 16,
 322                        .vsync_len      = 3,
 323                        .upper_margin   = 32,
 324                        .lower_margin   = 0,
 325                },
 326                /*
 327                 * TFT
 328                 * Pixel pol active high
 329                 * HSYNC active low
 330                 * VSYNC active low
 331                 * use HSYNC for ACD count
 332                 * line clock disable while idle
 333                 * always enable line clock even if no data
 334                 */
 335                .pcr = 0xf0c08080,
 336                .bpp = 16,
 337        },
 338};
 339
 340static const struct imx_fb_platform_data pca100_fb_data __initconst = {
 341        .mode = pca100_fb_modes,
 342        .num_modes = ARRAY_SIZE(pca100_fb_modes),
 343
 344        .pwmr           = 0x00A903FF,
 345        .lscr1          = 0x00120300,
 346        .dmacr          = 0x00020010,
 347};
 348
 349static void __init pca100_init(void)
 350{
 351        int ret;
 352
 353        imx27_soc_init();
 354
 355        ret = mxc_gpio_setup_multiple_pins(pca100_pins,
 356                        ARRAY_SIZE(pca100_pins), "PCA100");
 357        if (ret)
 358                printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
 359
 360        imx27_add_imx_uart0(&uart_pdata);
 361
 362        imx27_add_mxc_nand(&pca100_nand_board_info);
 363
 364        /* only the i2c master 1 is used on this CPU card */
 365        i2c_register_board_info(1, pca100_i2c_devices,
 366                                ARRAY_SIZE(pca100_i2c_devices));
 367
 368        imx27_add_imx_i2c(1, &pca100_i2c1_data);
 369
 370        mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
 371        mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
 372        spi_register_board_info(pca100_spi_board_info,
 373                                ARRAY_SIZE(pca100_spi_board_info));
 374        imx27_add_spi_imx0(&pca100_spi0_gpiod_table);
 375
 376        imx27_add_imx_fb(&pca100_fb_data);
 377
 378        imx27_add_fec(NULL);
 379        imx27_add_imx2_wdt();
 380        imx27_add_mxc_w1();
 381}
 382
 383static void __init pca100_late_init(void)
 384{
 385        imx27_add_imx_ssi(0, &pca100_ssi_pdata);
 386
 387        imx27_add_mxc_mmc(1, &sdhc_pdata);
 388
 389        gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
 390        gpio_direction_output(OTG_PHY_CS_GPIO, 1);
 391        gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
 392        gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
 393
 394        if (otg_mode_host) {
 395                otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
 396                                ULPI_OTG_DRVVBUS_EXT);
 397
 398                if (otg_pdata.otg)
 399                        imx27_add_mxc_ehci_otg(&otg_pdata);
 400        } else {
 401                gpio_set_value(OTG_PHY_CS_GPIO, 0);
 402                imx27_add_fsl_usb2_udc(&otg_device_pdata);
 403        }
 404
 405        usbh2_pdata.otg = imx_otg_ulpi_create(
 406                        ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
 407
 408        if (usbh2_pdata.otg)
 409                imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
 410}
 411
 412static void __init pca100_timer_init(void)
 413{
 414        mx27_clocks_init(26000000);
 415}
 416
 417MACHINE_START(PCA100, "phyCARD-i.MX27")
 418        .atag_offset = 0x100,
 419        .map_io = mx27_map_io,
 420        .init_early = imx27_init_early,
 421        .init_irq = mx27_init_irq,
 422        .init_machine   = pca100_init,
 423        .init_late      = pca100_late_init,
 424        .init_time      = pca100_timer_init,
 425        .restart        = mxc_restart,
 426MACHINE_END
 427