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6#include <linux/gpio.h>
7#include <linux/init.h>
8#include <linux/interrupt.h>
9#include <linux/delay.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/types.h>
13
14#include <linux/usb/otg.h>
15
16#include "board-mx31moboard.h"
17#include "common.h"
18#include "devices-imx31.h"
19#include "ehci.h"
20#include "hardware.h"
21#include "iomux-mx3.h"
22#include "ulpi.h"
23
24static unsigned int devboard_pins[] = {
25
26 MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
27 MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
28
29 MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
30 MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
31 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
32 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
33
34 MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
35 MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
36 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
37 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
38 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
39
40 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
41 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
42};
43
44static const struct imxuart_platform_data uart_pdata __initconst = {
45 .flags = IMXUART_HAVE_RTSCTS,
46};
47
48#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
49#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
50
51static int devboard_sdhc2_get_ro(struct device *dev)
52{
53 return !gpio_get_value(SDHC2_WP);
54}
55
56static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
57 void *data)
58{
59 int ret;
60
61 ret = gpio_request(SDHC2_CD, "sdhc-detect");
62 if (ret)
63 return ret;
64
65 gpio_direction_input(SDHC2_CD);
66
67 ret = gpio_request(SDHC2_WP, "sdhc-wp");
68 if (ret)
69 goto err_gpio_free;
70 gpio_direction_input(SDHC2_WP);
71
72 ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
73 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
74 "sdhc2-card-detect", data);
75 if (ret)
76 goto err_gpio_free_2;
77
78 return 0;
79
80err_gpio_free_2:
81 gpio_free(SDHC2_WP);
82err_gpio_free:
83 gpio_free(SDHC2_CD);
84
85 return ret;
86}
87
88static void devboard_sdhc2_exit(struct device *dev, void *data)
89{
90 free_irq(gpio_to_irq(SDHC2_CD), data);
91 gpio_free(SDHC2_WP);
92 gpio_free(SDHC2_CD);
93}
94
95static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
96 .get_ro = devboard_sdhc2_get_ro,
97 .init = devboard_sdhc2_init,
98 .exit = devboard_sdhc2_exit,
99};
100
101#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
102#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
103#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
104#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
105
106static void devboard_init_sel_gpios(void)
107{
108 if (!gpio_request(SEL0, "sel0")) {
109 gpio_direction_input(SEL0);
110 gpio_export(SEL0, true);
111 }
112
113 if (!gpio_request(SEL1, "sel1")) {
114 gpio_direction_input(SEL1);
115 gpio_export(SEL1, true);
116 }
117
118 if (!gpio_request(SEL2, "sel2")) {
119 gpio_direction_input(SEL2);
120 gpio_export(SEL2, true);
121 }
122
123 if (!gpio_request(SEL3, "sel3")) {
124 gpio_direction_input(SEL3);
125 gpio_export(SEL3, true);
126 }
127}
128#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
129 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
130
131static int devboard_usbh1_hw_init(struct platform_device *pdev)
132{
133 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
134
135 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
136 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
137 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
138 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
139 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
140 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
141 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
142 mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
143
144 mdelay(10);
145
146 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
147 MXC_EHCI_INTERFACE_SINGLE_UNI);
148}
149
150#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
151#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
152
153static int devboard_isp1105_init(struct usb_phy *otg)
154{
155 int ret = gpio_request(USBH1_MODE, "usbh1-mode");
156 if (ret)
157 return ret;
158
159 gpio_direction_output(USBH1_MODE, 0);
160
161 ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
162 if (ret) {
163 gpio_free(USBH1_MODE);
164 return ret;
165 }
166 gpio_direction_output(USBH1_VBUSEN_B, 1);
167
168 return 0;
169}
170
171
172static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
173{
174 if (on)
175 gpio_set_value(USBH1_VBUSEN_B, 0);
176 else
177 gpio_set_value(USBH1_VBUSEN_B, 1);
178
179 return 0;
180}
181
182static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
183 .init = devboard_usbh1_hw_init,
184 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
185};
186
187static int __init devboard_usbh1_init(void)
188{
189 struct usb_phy *phy;
190 struct platform_device *pdev;
191
192 phy = kzalloc(sizeof(*phy), GFP_KERNEL);
193 if (!phy)
194 return -ENOMEM;
195
196 phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
197 if (!phy->otg) {
198 kfree(phy);
199 return -ENOMEM;
200 }
201
202 phy->label = "ISP1105";
203 phy->init = devboard_isp1105_init;
204 phy->otg->set_vbus = devboard_isp1105_set_vbus;
205
206 usbh1_pdata.otg = phy;
207
208 pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
209
210 return PTR_ERR_OR_ZERO(pdev);
211}
212
213
214static const struct fsl_usb2_platform_data usb_pdata __initconst = {
215 .operating_mode = FSL_USB2_DR_DEVICE,
216 .phy_mode = FSL_USB2_PHY_ULPI,
217};
218
219
220
221
222void __init mx31moboard_devboard_init(void)
223{
224 printk(KERN_INFO "Initializing mx31devboard peripherals\n");
225
226 mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
227 "devboard");
228
229 imx31_add_imx_uart1(&uart_pdata);
230
231 imx31_add_mxc_mmc(1, &sdhc2_pdata);
232
233 devboard_init_sel_gpios();
234
235 imx31_add_fsl_usb2_udc(&usb_pdata);
236
237 devboard_usbh1_init();
238}
239
