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17#include "omap_hwmod.h"
18#include "omap_hwmod_33xx_43xx_common_data.h"
19#include "prcm43xx.h"
20#include "omap_hwmod_common_data.h"
21
22
23static struct omap_hwmod am43xx_emif_hwmod = {
24 .name = "emif",
25 .class = &am33xx_emif_hwmod_class,
26 .clkdm_name = "emif_clkdm",
27 .flags = HWMOD_INIT_NO_IDLE,
28 .main_clk = "dpll_ddr_m2_ck",
29 .prcm = {
30 .omap4 = {
31 .clkctrl_offs = AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET,
32 .modulemode = MODULEMODE_SWCTRL,
33 },
34 },
35};
36
37static struct omap_hwmod am43xx_l4_hs_hwmod = {
38 .name = "l4_hs",
39 .class = &am33xx_l4_hwmod_class,
40 .clkdm_name = "l3_clkdm",
41 .flags = HWMOD_INIT_NO_IDLE,
42 .main_clk = "l4hs_gclk",
43 .prcm = {
44 .omap4 = {
45 .clkctrl_offs = AM43XX_CM_PER_L4HS_CLKCTRL_OFFSET,
46 .modulemode = MODULEMODE_SWCTRL,
47 },
48 },
49};
50
51static struct omap_hwmod_rst_info am33xx_wkup_m3_resets[] = {
52 { .name = "wkup_m3", .rst_shift = 3, .st_shift = 5 },
53};
54
55static struct omap_hwmod am43xx_wkup_m3_hwmod = {
56 .name = "wkup_m3",
57 .class = &am33xx_wkup_m3_hwmod_class,
58 .clkdm_name = "l4_wkup_aon_clkdm",
59
60 .flags = HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
61 .main_clk = "sys_clkin_ck",
62 .prcm = {
63 .omap4 = {
64 .clkctrl_offs = AM43XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET,
65 .rstctrl_offs = AM43XX_RM_WKUP_RSTCTRL_OFFSET,
66 .rstst_offs = AM43XX_RM_WKUP_RSTST_OFFSET,
67 .modulemode = MODULEMODE_SWCTRL,
68 },
69 },
70 .rst_lines = am33xx_wkup_m3_resets,
71 .rst_lines_cnt = ARRAY_SIZE(am33xx_wkup_m3_resets),
72};
73
74static struct omap_hwmod am43xx_control_hwmod = {
75 .name = "control",
76 .class = &am33xx_control_hwmod_class,
77 .clkdm_name = "l4_wkup_clkdm",
78 .flags = HWMOD_INIT_NO_IDLE,
79 .main_clk = "sys_clkin_ck",
80 .prcm = {
81 .omap4 = {
82 .clkctrl_offs = AM43XX_CM_WKUP_CONTROL_CLKCTRL_OFFSET,
83 .modulemode = MODULEMODE_SWCTRL,
84 },
85 },
86};
87
88
89static struct omap_hwmod_ocp_if am43xx_l3_main__emif = {
90 .master = &am33xx_l3_main_hwmod,
91 .slave = &am43xx_emif_hwmod,
92 .clk = "dpll_core_m4_ck",
93 .user = OCP_USER_MPU | OCP_USER_SDMA,
94};
95
96static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
97 .master = &am33xx_l3_main_hwmod,
98 .slave = &am43xx_l4_hs_hwmod,
99 .clk = "l3s_gclk",
100 .user = OCP_USER_MPU | OCP_USER_SDMA,
101};
102
103static struct omap_hwmod_ocp_if am43xx_wkup_m3__l4_wkup = {
104 .master = &am43xx_wkup_m3_hwmod,
105 .slave = &am33xx_l4_wkup_hwmod,
106 .clk = "sys_clkin_ck",
107 .user = OCP_USER_MPU | OCP_USER_SDMA,
108};
109
110static struct omap_hwmod_ocp_if am43xx_l4_wkup__wkup_m3 = {
111 .master = &am33xx_l4_wkup_hwmod,
112 .slave = &am43xx_wkup_m3_hwmod,
113 .clk = "sys_clkin_ck",
114 .user = OCP_USER_MPU | OCP_USER_SDMA,
115};
116
117static struct omap_hwmod_ocp_if am43xx_l4_wkup__smartreflex0 = {
118 .master = &am33xx_l4_wkup_hwmod,
119 .slave = &am33xx_smartreflex0_hwmod,
120 .clk = "sys_clkin_ck",
121 .user = OCP_USER_MPU,
122};
123
124static struct omap_hwmod_ocp_if am43xx_l4_wkup__smartreflex1 = {
125 .master = &am33xx_l4_wkup_hwmod,
126 .slave = &am33xx_smartreflex1_hwmod,
127 .clk = "sys_clkin_ck",
128 .user = OCP_USER_MPU,
129};
130
131static struct omap_hwmod_ocp_if am43xx_l4_wkup__control = {
132 .master = &am33xx_l4_wkup_hwmod,
133 .slave = &am43xx_control_hwmod,
134 .clk = "sys_clkin_ck",
135 .user = OCP_USER_MPU,
136};
137
138static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
139 &am33xx_mpu__l3_main,
140 &am33xx_mpu__prcm,
141 &am33xx_l3_s__l4_ls,
142 &am33xx_l3_s__l4_wkup,
143 &am43xx_l3_main__l4_hs,
144 &am33xx_l3_main__l3_s,
145 &am33xx_l3_main__l3_instr,
146 &am33xx_l3_main__gfx,
147 &am33xx_l3_s__l3_main,
148 &am43xx_l3_main__emif,
149 &am43xx_wkup_m3__l4_wkup,
150 &am33xx_gfx__l3_main,
151 &am43xx_l4_wkup__wkup_m3,
152 &am43xx_l4_wkup__control,
153 &am43xx_l4_wkup__smartreflex0,
154 &am43xx_l4_wkup__smartreflex1,
155 &am33xx_l3_s__gpmc,
156 &am33xx_l3_main__ocmc,
157 NULL,
158};
159
160static struct omap_hwmod_ocp_if *am43xx_rtc_hwmod_ocp_ifs[] __initdata = {
161 &am33xx_l4_wkup__rtc,
162 NULL,
163};
164
165int __init am43xx_hwmod_init(void)
166{
167 int ret;
168
169 omap_hwmod_am43xx_reg();
170 omap_hwmod_init();
171 ret = omap_hwmod_register_links(am43xx_hwmod_ocp_ifs);
172
173 if (!ret && of_machine_is_compatible("ti,am4372"))
174 ret = omap_hwmod_register_links(am43xx_rtc_hwmod_ocp_ifs);
175
176 return ret;
177}
178
