LXR linux/arch/arm64/kernel/irq.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Based on arch/arm/kernel/irq.c
   4 *
   5 * Copyright (C) 1992 Linus Torvalds
   6 * Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
   7 * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
   8 * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
   9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
  10 * Copyright (C) 2012 ARM Ltd.
  11 */
  12
  13#include <linux/kernel_stat.h>
  14#include <linux/irq.h>
  15#include <linux/memory.h>
  16#include <linux/smp.h>
  17#include <linux/init.h>
  18#include <linux/irqchip.h>
  19#include <linux/kprobes.h>
  20#include <linux/seq_file.h>
  21#include <linux/vmalloc.h>
  22#include <asm/daifflags.h>
  23#include <asm/vmap_stack.h>
  24
  25unsigned long irq_err_count;
  26
  27/* Only access this in an NMI enter/exit */
  28DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts);
  29
  30DEFINE_PER_CPU(unsigned long *, irq_stack_ptr);
  31
  32int arch_show_interrupts(struct seq_file *p, int prec)
  33{
  34        show_ipi_list(p, prec);
  35        seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
  36        return 0;
  37}
  38
  39#ifdef CONFIG_VMAP_STACK
  40static void init_irq_stacks(void)
  41{
  42        int cpu;
  43        unsigned long *p;
  44
  45        for_each_possible_cpu(cpu) {
  46                p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu));
  47                per_cpu(irq_stack_ptr, cpu) = p;
  48        }
  49}
  50#else
  51/* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */
  52DEFINE_PER_CPU_ALIGNED(unsigned long [IRQ_STACK_SIZE/sizeof(long)], irq_stack);
  53
  54static void init_irq_stacks(void)
  55{
  56        int cpu;
  57
  58        for_each_possible_cpu(cpu)
  59                per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu);
  60}
  61#endif
  62
  63void __init init_IRQ(void)
  64{
  65        init_irq_stacks();
  66        irqchip_init();
  67        if (!handle_arch_irq)
  68                panic("No interrupt controller found.");
  69
  70        if (system_uses_irq_prio_masking()) {
  71                /*
  72                 * Now that we have a stack for our IRQ handler, set
  73                 * the PMR/PSR pair to a consistent state.
  74                 */
  75                WARN_ON(read_sysreg(daif) & PSR_A_BIT);
  76                local_daif_restore(DAIF_PROCCTX_NOIRQ);
  77        }
  78}
  79
  80/*
  81 * Stubs to make nmi_enter/exit() code callable from ASM
  82 */
  83asmlinkage void notrace asm_nmi_enter(void)
  84{
  85        nmi_enter();
  86}
  87NOKPROBE_SYMBOL(asm_nmi_enter);
  88
  89asmlinkage void notrace asm_nmi_exit(void)
  90{
  91        nmi_exit();
  92}
  93NOKPROBE_SYMBOL(asm_nmi_exit);
  94