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11#ifndef _ASM_RISCV_MMIO_H
12#define _ASM_RISCV_MMIO_H
13
14#include <linux/types.h>
15#include <asm/mmiowb.h>
16
17
18#define __raw_writeb __raw_writeb
19static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
20{
21 asm volatile("sb %0, 0(%1)" : : "r" (val), "r" (addr));
22}
23
24#define __raw_writew __raw_writew
25static inline void __raw_writew(u16 val, volatile void __iomem *addr)
26{
27 asm volatile("sh %0, 0(%1)" : : "r" (val), "r" (addr));
28}
29
30#define __raw_writel __raw_writel
31static inline void __raw_writel(u32 val, volatile void __iomem *addr)
32{
33 asm volatile("sw %0, 0(%1)" : : "r" (val), "r" (addr));
34}
35
36#ifdef CONFIG_64BIT
37#define __raw_writeq __raw_writeq
38static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
39{
40 asm volatile("sd %0, 0(%1)" : : "r" (val), "r" (addr));
41}
42#endif
43
44#define __raw_readb __raw_readb
45static inline u8 __raw_readb(const volatile void __iomem *addr)
46{
47 u8 val;
48
49 asm volatile("lb %0, 0(%1)" : "=r" (val) : "r" (addr));
50 return val;
51}
52
53#define __raw_readw __raw_readw
54static inline u16 __raw_readw(const volatile void __iomem *addr)
55{
56 u16 val;
57
58 asm volatile("lh %0, 0(%1)" : "=r" (val) : "r" (addr));
59 return val;
60}
61
62#define __raw_readl __raw_readl
63static inline u32 __raw_readl(const volatile void __iomem *addr)
64{
65 u32 val;
66
67 asm volatile("lw %0, 0(%1)" : "=r" (val) : "r" (addr));
68 return val;
69}
70
71#ifdef CONFIG_64BIT
72#define __raw_readq __raw_readq
73static inline u64 __raw_readq(const volatile void __iomem *addr)
74{
75 u64 val;
76
77 asm volatile("ld %0, 0(%1)" : "=r" (val) : "r" (addr));
78 return val;
79}
80#endif
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86
87#define readb_cpu(c) ({ u8 __r = __raw_readb(c); __r; })
88#define readw_cpu(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; })
89#define readl_cpu(c) ({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; })
90
91#define writeb_cpu(v, c) ((void)__raw_writeb((v), (c)))
92#define writew_cpu(v, c) ((void)__raw_writew((__force u16)cpu_to_le16(v), (c)))
93#define writel_cpu(v, c) ((void)__raw_writel((__force u32)cpu_to_le32(v), (c)))
94
95#ifdef CONFIG_64BIT
96#define readq_cpu(c) ({ u64 __r = le64_to_cpu((__force __le64)__raw_readq(c)); __r; })
97#define writeq_cpu(v, c) ((void)__raw_writeq((__force u64)cpu_to_le64(v), (c)))
98#endif
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109#define __io_rbr() do {} while (0)
110#define __io_rar() do {} while (0)
111#define __io_rbw() do {} while (0)
112#define __io_raw() do {} while (0)
113
114#define readb_relaxed(c) ({ u8 __v; __io_rbr(); __v = readb_cpu(c); __io_rar(); __v; })
115#define readw_relaxed(c) ({ u16 __v; __io_rbr(); __v = readw_cpu(c); __io_rar(); __v; })
116#define readl_relaxed(c) ({ u32 __v; __io_rbr(); __v = readl_cpu(c); __io_rar(); __v; })
117
118#define writeb_relaxed(v, c) ({ __io_rbw(); writeb_cpu((v), (c)); __io_raw(); })
119#define writew_relaxed(v, c) ({ __io_rbw(); writew_cpu((v), (c)); __io_raw(); })
120#define writel_relaxed(v, c) ({ __io_rbw(); writel_cpu((v), (c)); __io_raw(); })
121
122#ifdef CONFIG_64BIT
123#define readq_relaxed(c) ({ u64 __v; __io_rbr(); __v = readq_cpu(c); __io_rar(); __v; })
124#define writeq_relaxed(v, c) ({ __io_rbw(); writeq_cpu((v), (c)); __io_raw(); })
125#endif
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133#define __io_br() do {} while (0)
134#define __io_ar(v) __asm__ __volatile__ ("fence i,r" : : : "memory")
135#define __io_bw() __asm__ __volatile__ ("fence w,o" : : : "memory")
136#define __io_aw() mmiowb_set_pending()
137
138#define readb(c) ({ u8 __v; __io_br(); __v = readb_cpu(c); __io_ar(__v); __v; })
139#define readw(c) ({ u16 __v; __io_br(); __v = readw_cpu(c); __io_ar(__v); __v; })
140#define readl(c) ({ u32 __v; __io_br(); __v = readl_cpu(c); __io_ar(__v); __v; })
141
142#define writeb(v, c) ({ __io_bw(); writeb_cpu((v), (c)); __io_aw(); })
143#define writew(v, c) ({ __io_bw(); writew_cpu((v), (c)); __io_aw(); })
144#define writel(v, c) ({ __io_bw(); writel_cpu((v), (c)); __io_aw(); })
145
146#ifdef CONFIG_64BIT
147#define readq(c) ({ u64 __v; __io_br(); __v = readq_cpu(c); __io_ar(__v); __v; })
148#define writeq(v, c) ({ __io_bw(); writeq_cpu((v), (c)); __io_aw(); })
149#endif
150
151#endif
152