LXR linux/arch/riscv/include/asm/set

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (C) 2019 SiFive
   4 */
   5
   6#ifndef _ASM_RISCV_SET_MEMORY_H
   7#define _ASM_RISCV_SET_MEMORY_H
   8
   9#ifndef __ASSEMBLY__
  10/*
  11 * Functions to change memory attributes.
  12 */
  13#ifdef CONFIG_MMU
  14int set_memory_ro(unsigned long addr, int numpages);
  15int set_memory_rw(unsigned long addr, int numpages);
  16int set_memory_x(unsigned long addr, int numpages);
  17int set_memory_nx(unsigned long addr, int numpages);
  18#else
  19static inline int set_memory_ro(unsigned long addr, int numpages) { return 0; }
  20static inline int set_memory_rw(unsigned long addr, int numpages) { return 0; }
  21static inline int set_memory_x(unsigned long addr, int numpages) { return 0; }
  22static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; }
  23#endif
  24
  25int set_direct_map_invalid_noflush(struct page *page);
  26int set_direct_map_default_noflush(struct page *page);
  27
  28#endif /* __ASSEMBLY__ */
  29
  30#ifdef CONFIG_ARCH_HAS_STRICT_KERNEL_RWX
  31#ifdef CONFIG_64BIT
  32#define SECTION_ALIGN (1 << 21)
  33#else
  34#define SECTION_ALIGN (1 << 22)
  35#endif
  36#else /* !CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */
  37#define SECTION_ALIGN L1_CACHE_BYTES
  38#endif /* CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */
  39
  40#endif /* _ASM_RISCV_SET_MEMORY_H */
  41