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12#include <linux/kvm_host.h>
13#include <linux/slab.h>
14#include <linux/export.h>
15#include <linux/rculist.h>
16
17#include <trace/events/kvm.h>
18
19#include <asm/msidef.h>
20
21#include "irq.h"
22
23#include "ioapic.h"
24
25#include "lapic.h"
26
27#include "hyperv.h"
28#include "x86.h"
29
30static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
31 struct kvm *kvm, int irq_source_id, int level,
32 bool line_status)
33{
34 struct kvm_pic *pic = kvm->arch.vpic;
35 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
36}
37
38static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
39 struct kvm *kvm, int irq_source_id, int level,
40 bool line_status)
41{
42 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
43 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
44 line_status);
45}
46
47int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
48 struct kvm_lapic_irq *irq, struct dest_map *dest_map)
49{
50 int i, r = -1;
51 struct kvm_vcpu *vcpu, *lowest = NULL;
52 unsigned long dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
53 unsigned int dest_vcpus = 0;
54
55 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
56 return r;
57
58 if (irq->dest_mode == APIC_DEST_PHYSICAL &&
59 irq->dest_id == 0xff && kvm_lowest_prio_delivery(irq)) {
60 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
61 irq->delivery_mode = APIC_DM_FIXED;
62 }
63
64 memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
65
66 kvm_for_each_vcpu(i, vcpu, kvm) {
67 if (!kvm_apic_present(vcpu))
68 continue;
69
70 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
71 irq->dest_id, irq->dest_mode))
72 continue;
73
74 if (!kvm_lowest_prio_delivery(irq)) {
75 if (r < 0)
76 r = 0;
77 r += kvm_apic_set_irq(vcpu, irq, dest_map);
78 } else if (kvm_apic_sw_enabled(vcpu->arch.apic)) {
79 if (!kvm_vector_hashing_enabled()) {
80 if (!lowest)
81 lowest = vcpu;
82 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
83 lowest = vcpu;
84 } else {
85 __set_bit(i, dest_vcpu_bitmap);
86 dest_vcpus++;
87 }
88 }
89 }
90
91 if (dest_vcpus != 0) {
92 int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
93 dest_vcpu_bitmap, KVM_MAX_VCPUS);
94
95 lowest = kvm_get_vcpu(kvm, idx);
96 }
97
98 if (lowest)
99 r = kvm_apic_set_irq(lowest, irq, dest_map);
100
101 return r;
102}
103
104void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
105 struct kvm_lapic_irq *irq)
106{
107 trace_kvm_msi_set_irq(e->msi.address_lo | (kvm->arch.x2apic_format ?
108 (u64)e->msi.address_hi << 32 : 0),
109 e->msi.data);
110
111 irq->dest_id = (e->msi.address_lo &
112 MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
113 if (kvm->arch.x2apic_format)
114 irq->dest_id |= MSI_ADDR_EXT_DEST_ID(e->msi.address_hi);
115 irq->vector = (e->msi.data &
116 MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
117 irq->dest_mode = kvm_lapic_irq_dest_mode(
118 !!((1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo));
119 irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
120 irq->delivery_mode = e->msi.data & 0x700;
121 irq->msi_redir_hint = ((e->msi.address_lo
122 & MSI_ADDR_REDIRECTION_LOWPRI) > 0);
123 irq->level = 1;
124 irq->shorthand = APIC_DEST_NOSHORT;
125}
126EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
127
128static inline bool kvm_msi_route_invalid(struct kvm *kvm,
129 struct kvm_kernel_irq_routing_entry *e)
130{
131 return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff);
132}
133
134int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
135 struct kvm *kvm, int irq_source_id, int level, bool line_status)
136{
137 struct kvm_lapic_irq irq;
138
139 if (kvm_msi_route_invalid(kvm, e))
140 return -EINVAL;
141
142 if (!level)
143 return -1;
144
145 kvm_set_msi_irq(kvm, e, &irq);
146
147 return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
148}
149
150
151static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
152 struct kvm *kvm, int irq_source_id, int level,
153 bool line_status)
154{
155 if (!level)
156 return -1;
157
158 return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
159}
160
161int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
162 struct kvm *kvm, int irq_source_id, int level,
163 bool line_status)
164{
165 struct kvm_lapic_irq irq;
166 int r;
167
168 switch (e->type) {
169 case KVM_IRQ_ROUTING_HV_SINT:
170 return kvm_hv_set_sint(e, kvm, irq_source_id, level,
171 line_status);
172
173 case KVM_IRQ_ROUTING_MSI:
174 if (kvm_msi_route_invalid(kvm, e))
175 return -EINVAL;
176
177 kvm_set_msi_irq(kvm, e, &irq);
178
179 if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
180 return r;
181 break;
182
183 default:
184 break;
185 }
186
187 return -EWOULDBLOCK;
188}
189
190int kvm_request_irq_source_id(struct kvm *kvm)
191{
192 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
193 int irq_source_id;
194
195 mutex_lock(&kvm->irq_lock);
196 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
197
198 if (irq_source_id >= BITS_PER_LONG) {
199 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
200 irq_source_id = -EFAULT;
201 goto unlock;
202 }
203
204 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
205 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
206 set_bit(irq_source_id, bitmap);
207unlock:
208 mutex_unlock(&kvm->irq_lock);
209
210 return irq_source_id;
211}
212
213void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
214{
215 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
216 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
217
218 mutex_lock(&kvm->irq_lock);
219 if (irq_source_id < 0 ||
220 irq_source_id >= BITS_PER_LONG) {
221 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
222 goto unlock;
223 }
224 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
225 if (!irqchip_kernel(kvm))
226 goto unlock;
227
228 kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
229 kvm_pic_clear_all(kvm->arch.vpic, irq_source_id);
230unlock:
231 mutex_unlock(&kvm->irq_lock);
232}
233
234void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
235 struct kvm_irq_mask_notifier *kimn)
236{
237 mutex_lock(&kvm->irq_lock);
238 kimn->irq = irq;
239 hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
240 mutex_unlock(&kvm->irq_lock);
241}
242
243void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
244 struct kvm_irq_mask_notifier *kimn)
245{
246 mutex_lock(&kvm->irq_lock);
247 hlist_del_rcu(&kimn->link);
248 mutex_unlock(&kvm->irq_lock);
249 synchronize_srcu(&kvm->irq_srcu);
250}
251
252void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
253 bool mask)
254{
255 struct kvm_irq_mask_notifier *kimn;
256 int idx, gsi;
257
258 idx = srcu_read_lock(&kvm->irq_srcu);
259 gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
260 if (gsi != -1)
261 hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
262 if (kimn->irq == gsi)
263 kimn->func(kimn, mask);
264 srcu_read_unlock(&kvm->irq_srcu, idx);
265}
266
267bool kvm_arch_can_set_irq_routing(struct kvm *kvm)
268{
269 return irqchip_in_kernel(kvm);
270}
271
272int kvm_set_routing_entry(struct kvm *kvm,
273 struct kvm_kernel_irq_routing_entry *e,
274 const struct kvm_irq_routing_entry *ue)
275{
276
277
278
279
280 switch (ue->type) {
281 case KVM_IRQ_ROUTING_IRQCHIP:
282 if (irqchip_split(kvm))
283 return -EINVAL;
284 e->irqchip.pin = ue->u.irqchip.pin;
285 switch (ue->u.irqchip.irqchip) {
286 case KVM_IRQCHIP_PIC_SLAVE:
287 e->irqchip.pin += PIC_NUM_PINS / 2;
288 fallthrough;
289 case KVM_IRQCHIP_PIC_MASTER:
290 if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)
291 return -EINVAL;
292 e->set = kvm_set_pic_irq;
293 break;
294 case KVM_IRQCHIP_IOAPIC:
295 if (ue->u.irqchip.pin >= KVM_IOAPIC_NUM_PINS)
296 return -EINVAL;
297 e->set = kvm_set_ioapic_irq;
298 break;
299 default:
300 return -EINVAL;
301 }
302 e->irqchip.irqchip = ue->u.irqchip.irqchip;
303 break;
304 case KVM_IRQ_ROUTING_MSI:
305 e->set = kvm_set_msi;
306 e->msi.address_lo = ue->u.msi.address_lo;
307 e->msi.address_hi = ue->u.msi.address_hi;
308 e->msi.data = ue->u.msi.data;
309
310 if (kvm_msi_route_invalid(kvm, e))
311 return -EINVAL;
312 break;
313 case KVM_IRQ_ROUTING_HV_SINT:
314 e->set = kvm_hv_set_sint;
315 e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
316 e->hv_sint.sint = ue->u.hv_sint.sint;
317 break;
318 default:
319 return -EINVAL;
320 }
321
322 return 0;
323}
324
325bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
326 struct kvm_vcpu **dest_vcpu)
327{
328 int i, r = 0;
329 struct kvm_vcpu *vcpu;
330
331 if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
332 return true;
333
334 kvm_for_each_vcpu(i, vcpu, kvm) {
335 if (!kvm_apic_present(vcpu))
336 continue;
337
338 if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
339 irq->dest_id, irq->dest_mode))
340 continue;
341
342 if (++r == 2)
343 return false;
344
345 *dest_vcpu = vcpu;
346 }
347
348 return r == 1;
349}
350EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
351
352#define IOAPIC_ROUTING_ENTRY(irq) \
353 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
354 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
355#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
356
357#define PIC_ROUTING_ENTRY(irq) \
358 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
359 .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
360#define ROUTING_ENTRY2(irq) \
361 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
362
363static const struct kvm_irq_routing_entry default_routing[] = {
364 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
365 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
366 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
367 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
368 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
369 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
370 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
371 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
372 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
373 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
374 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
375 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
376};
377
378int kvm_setup_default_irq_routing(struct kvm *kvm)
379{
380 return kvm_set_irq_routing(kvm, default_routing,
381 ARRAY_SIZE(default_routing), 0);
382}
383
384static const struct kvm_irq_routing_entry empty_routing[] = {};
385
386int kvm_setup_empty_irq_routing(struct kvm *kvm)
387{
388 return kvm_set_irq_routing(kvm, empty_routing, 0, 0);
389}
390
391void kvm_arch_post_irq_routing_update(struct kvm *kvm)
392{
393 if (!irqchip_split(kvm))
394 return;
395 kvm_make_scan_ioapic_request(kvm);
396}
397
398void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
399 ulong *ioapic_handled_vectors)
400{
401 struct kvm *kvm = vcpu->kvm;
402 struct kvm_kernel_irq_routing_entry *entry;
403 struct kvm_irq_routing_table *table;
404 u32 i, nr_ioapic_pins;
405 int idx;
406
407 idx = srcu_read_lock(&kvm->irq_srcu);
408 table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
409 nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
410 kvm->arch.nr_reserved_ioapic_pins);
411 for (i = 0; i < nr_ioapic_pins; ++i) {
412 hlist_for_each_entry(entry, &table->map[i], link) {
413 struct kvm_lapic_irq irq;
414
415 if (entry->type != KVM_IRQ_ROUTING_MSI)
416 continue;
417
418 kvm_set_msi_irq(vcpu->kvm, entry, &irq);
419
420 if (irq.trig_mode &&
421 kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
422 irq.dest_id, irq.dest_mode))
423 __set_bit(irq.vector, ioapic_handled_vectors);
424 }
425 }
426 srcu_read_unlock(&kvm->irq_srcu, idx);
427}
428
429void kvm_arch_irq_routing_update(struct kvm *kvm)
430{
431 kvm_hv_irq_routing_update(kvm);
432}
433
