LXR linux/arch/x86/realmode/rm/trampoline

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 *
   4 *      Trampoline.S    Derived from Setup.S by Linus Torvalds
   5 *
   6 *      4 Jan 1997 Michael Chastain: changed to gnu as.
   7 *      15 Sept 2005 Eric Biederman: 64bit PIC support
   8 *
   9 *      Entry: CS:IP point to the start of our code, we are
  10 *      in real mode with no stack, but the rest of the
  11 *      trampoline page to make our stack and everything else
  12 *      is a mystery.
  13 *
  14 *      On entry to trampoline_start, the processor is in real mode
  15 *      with 16-bit addressing and 16-bit data.  CS has some value
  16 *      and IP is zero.  Thus, data addresses need to be absolute
  17 *      (no relocation) and are taken with regard to r_base.
  18 *
  19 *      With the addition of trampoline_level4_pgt this code can
  20 *      now enter a 64bit kernel that lives at arbitrary 64bit
  21 *      physical addresses.
  22 *
  23 *      If you work on this file, check the object module with objdump
  24 *      --full-contents --reloc to make sure there are no relocation
  25 *      entries.
  26 */
  27
  28#include <linux/linkage.h>
  29#include <asm/pgtable_types.h>
  30#include <asm/page_types.h>
  31#include <asm/msr.h>
  32#include <asm/segment.h>
  33#include <asm/processor-flags.h>
  34#include <asm/realmode.h>
  35#include "realmode.h"
  36
  37        .text
  38        .code16
  39
  40        .balign PAGE_SIZE
  41SYM_CODE_START(trampoline_start)
  42        cli                     # We should be safe anyway
  43        wbinvd
  44
  45        LJMPW_RM(1f)
  461:
  47        mov     %cs, %ax        # Code and data in the same place
  48        mov     %ax, %ds
  49        mov     %ax, %es
  50        mov     %ax, %ss
  51
  52        # Setup stack
  53        movl    $rm_stack_end, %esp
  54
  55        call    verify_cpu              # Verify the cpu supports long mode
  56        testl   %eax, %eax              # Check for return code
  57        jnz     no_longmode
  58
  59        /*
  60         * GDT tables in non default location kernel can be beyond 16MB and
  61         * lgdt will not be able to load the address as in real mode default
  62         * operand size is 16bit. Use lgdtl instead to force operand size
  63         * to 32 bit.
  64         */
  65
  66        lidtl   tr_idt  # load idt with 0, 0
  67        lgdtl   tr_gdt  # load gdt with whatever is appropriate
  68
  69        movw    $__KERNEL_DS, %dx       # Data segment descriptor
  70
  71        # Enable protected mode
  72        movl    $X86_CR0_PE, %eax       # protected mode (PE) bit
  73        movl    %eax, %cr0              # into protected mode
  74
  75        # flush prefetch and jump to startup_32
  76        ljmpl   $__KERNEL32_CS, $pa_startup_32
  77
  78no_longmode:
  79        hlt
  80        jmp no_longmode
  81SYM_CODE_END(trampoline_start)
  82
  83#include "../kernel/verify_cpu.S"
  84
  85        .section ".text32","ax"
  86        .code32
  87        .balign 4
  88SYM_CODE_START(startup_32)
  89        movl    %edx, %ss
  90        addl    $pa_real_mode_base, %esp
  91        movl    %edx, %ds
  92        movl    %edx, %es
  93        movl    %edx, %fs
  94        movl    %edx, %gs
  95
  96        /*
  97         * Check for memory encryption support. This is a safety net in
  98         * case BIOS hasn't done the necessary step of setting the bit in
  99         * the MSR for this AP. If SME is active and we've gotten this far
 100         * then it is safe for us to set the MSR bit and continue. If we
 101         * don't we'll eventually crash trying to execute encrypted
 102         * instructions.
 103         */
 104        btl     $TH_FLAGS_SME_ACTIVE_BIT, pa_tr_flags
 105        jnc     .Ldone
 106        movl    $MSR_K8_SYSCFG, %ecx
 107        rdmsr
 108        bts     $MSR_K8_SYSCFG_MEM_ENCRYPT_BIT, %eax
 109        jc      .Ldone
 110
 111        /*
 112         * Memory encryption is enabled but the SME enable bit for this
 113         * CPU has has not been set.  It is safe to set it, so do so.
 114         */
 115        wrmsr
 116.Ldone:
 117
 118        movl    pa_tr_cr4, %eax
 119        movl    %eax, %cr4              # Enable PAE mode
 120
 121        # Setup trampoline 4 level pagetables
 122        movl    $pa_trampoline_pgd, %eax
 123        movl    %eax, %cr3
 124
 125        # Set up EFER
 126        movl    pa_tr_efer, %eax
 127        movl    pa_tr_efer + 4, %edx
 128        movl    $MSR_EFER, %ecx
 129        wrmsr
 130
 131        # Enable paging and in turn activate Long Mode
 132        movl    $(X86_CR0_PG | X86_CR0_WP | X86_CR0_PE), %eax
 133        movl    %eax, %cr0
 134
 135        /*
 136         * At this point we're in long mode but in 32bit compatibility mode
 137         * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
 138         * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
 139         * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
 140         */
 141        ljmpl   $__KERNEL_CS, $pa_startup_64
 142SYM_CODE_END(startup_32)
 143
 144        .section ".text64","ax"
 145        .code64
 146        .balign 4
 147SYM_CODE_START(startup_64)
 148        # Now jump into the kernel using virtual addresses
 149        jmpq    *tr_start(%rip)
 150SYM_CODE_END(startup_64)
 151
 152        .section ".rodata","a"
 153        # Duplicate the global descriptor table
 154        # so the kernel can live anywhere
 155        .balign 16
 156SYM_DATA_START(tr_gdt)
 157        .short  tr_gdt_end - tr_gdt - 1 # gdt limit
 158        .long   pa_tr_gdt
 159        .short  0
 160        .quad   0x00cf9b000000ffff      # __KERNEL32_CS
 161        .quad   0x00af9b000000ffff      # __KERNEL_CS
 162        .quad   0x00cf93000000ffff      # __KERNEL_DS
 163SYM_DATA_END_LABEL(tr_gdt, SYM_L_LOCAL, tr_gdt_end)
 164
 165        .bss
 166        .balign PAGE_SIZE
 167SYM_DATA(trampoline_pgd, .space PAGE_SIZE)
 168
 169        .balign 8
 170SYM_DATA_START(trampoline_header)
 171        SYM_DATA_LOCAL(tr_start,        .space 8)
 172        SYM_DATA(tr_efer,               .space 8)
 173        SYM_DATA(tr_cr4,                .space 4)
 174        SYM_DATA(tr_flags,              .space 4)
 175SYM_DATA_END(trampoline_header)
 176
 177#include "trampoline_common.S"
 178