LXR linux/drivers/dma/dw/of.c

   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Platform driver for the Synopsys DesignWare DMA Controller
   4 *
   5 * Copyright (C) 2007-2008 Atmel Corporation
   6 * Copyright (C) 2010-2011 ST Microelectronics
   7 * Copyright (C) 2013 Intel Corporation
   8 */
   9
  10#include <linux/of.h>
  11#include <linux/of_dma.h>
  12#include <linux/platform_device.h>
  13
  14#include "internal.h"
  15
  16static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
  17                                        struct of_dma *ofdma)
  18{
  19        struct dw_dma *dw = ofdma->of_dma_data;
  20        struct dw_dma_slave slave = {
  21                .dma_dev = dw->dma.dev,
  22        };
  23        dma_cap_mask_t cap;
  24
  25        if (dma_spec->args_count != 3)
  26                return NULL;
  27
  28        slave.src_id = dma_spec->args[0];
  29        slave.dst_id = dma_spec->args[0];
  30        slave.m_master = dma_spec->args[1];
  31        slave.p_master = dma_spec->args[2];
  32
  33        if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
  34                    slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
  35                    slave.m_master >= dw->pdata->nr_masters ||
  36                    slave.p_master >= dw->pdata->nr_masters))
  37                return NULL;
  38
  39        dma_cap_zero(cap);
  40        dma_cap_set(DMA_SLAVE, cap);
  41
  42        /* TODO: there should be a simpler way to do this */
  43        return dma_request_channel(cap, dw_dma_filter, &slave);
  44}
  45
  46struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev)
  47{
  48        struct device_node *np = pdev->dev.of_node;
  49        struct dw_dma_platform_data *pdata;
  50        u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS];
  51        u32 nr_masters;
  52        u32 nr_channels;
  53
  54        if (!np) {
  55                dev_err(&pdev->dev, "Missing DT data\n");
  56                return NULL;
  57        }
  58
  59        if (of_property_read_u32(np, "dma-masters", &nr_masters))
  60                return NULL;
  61        if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS)
  62                return NULL;
  63
  64        if (of_property_read_u32(np, "dma-channels", &nr_channels))
  65                return NULL;
  66        if (nr_channels > DW_DMA_MAX_NR_CHANNELS)
  67                return NULL;
  68
  69        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  70        if (!pdata)
  71                return NULL;
  72
  73        pdata->nr_masters = nr_masters;
  74        pdata->nr_channels = nr_channels;
  75
  76        if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
  77                pdata->chan_allocation_order = (unsigned char)tmp;
  78
  79        if (!of_property_read_u32(np, "chan_priority", &tmp))
  80                pdata->chan_priority = tmp;
  81
  82        if (!of_property_read_u32(np, "block_size", &tmp))
  83                pdata->block_size = tmp;
  84
  85        if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) {
  86                for (tmp = 0; tmp < nr_masters; tmp++)
  87                        pdata->data_width[tmp] = arr[tmp];
  88        } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) {
  89                for (tmp = 0; tmp < nr_masters; tmp++)
  90                        pdata->data_width[tmp] = BIT(arr[tmp] & 0x07);
  91        }
  92
  93        if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) {
  94                for (tmp = 0; tmp < nr_channels; tmp++)
  95                        pdata->multi_block[tmp] = mb[tmp];
  96        } else {
  97                for (tmp = 0; tmp < nr_channels; tmp++)
  98                        pdata->multi_block[tmp] = 1;
  99        }
 100
 101        if (of_property_read_u32_array(np, "snps,max-burst-len", pdata->max_burst,
 102                                       nr_channels)) {
 103                memset32(pdata->max_burst, DW_DMA_MAX_BURST, nr_channels);
 104        }
 105
 106        if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) {
 107                if (tmp > CHAN_PROTCTL_MASK)
 108                        return NULL;
 109                pdata->protctl = tmp;
 110        }
 111
 112        return pdata;
 113}
 114
 115void dw_dma_of_controller_register(struct dw_dma *dw)
 116{
 117        struct device *dev = dw->dma.dev;
 118        int ret;
 119
 120        if (!dev->of_node)
 121                return;
 122
 123        ret = of_dma_controller_register(dev->of_node, dw_dma_of_xlate, dw);
 124        if (ret)
 125                dev_err(dev, "could not register of_dma_controller\n");
 126}
 127
 128void dw_dma_of_controller_free(struct dw_dma *dw)
 129{
 130        struct device *dev = dw->dma.dev;
 131
 132        if (!dev->of_node)
 133                return;
 134
 135        of_dma_controller_free(dev->of_node);
 136}
 137