LXR linux/drivers/gpu/drm/amd/display/dc/dcn10/dcn10

   1/*
   2 * Copyright 2016 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#include "hw_sequencer_private.h"
  27#include "dce110/dce110_hw_sequencer.h"
  28#include "dcn10_hw_sequencer.h"
  29
  30static const struct hw_sequencer_funcs dcn10_funcs = {
  31        .program_gamut_remap = dcn10_program_gamut_remap,
  32        .init_hw = dcn10_init_hw,
  33        .power_down_on_boot = dcn10_power_down_on_boot,
  34        .apply_ctx_to_hw = dce110_apply_ctx_to_hw,
  35        .apply_ctx_for_surface = dcn10_apply_ctx_for_surface,
  36        .post_unlock_program_front_end = dcn10_post_unlock_program_front_end,
  37        .update_plane_addr = dcn10_update_plane_addr,
  38        .update_dchub = dcn10_update_dchub,
  39        .update_pending_status = dcn10_update_pending_status,
  40        .program_output_csc = dcn10_program_output_csc,
  41        .enable_accelerated_mode = dce110_enable_accelerated_mode,
  42        .enable_timing_synchronization = dcn10_enable_timing_synchronization,
  43        .enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
  44        .update_info_frame = dce110_update_info_frame,
  45        .send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
  46        .enable_stream = dce110_enable_stream,
  47        .disable_stream = dce110_disable_stream,
  48        .unblank_stream = dcn10_unblank_stream,
  49        .blank_stream = dce110_blank_stream,
  50        .enable_audio_stream = dce110_enable_audio_stream,
  51        .disable_audio_stream = dce110_disable_audio_stream,
  52        .disable_plane = dcn10_disable_plane,
  53        .pipe_control_lock = dcn10_pipe_control_lock,
  54        .cursor_lock = dcn10_cursor_lock,
  55        .interdependent_update_lock = dcn10_lock_all_pipes,
  56        .prepare_bandwidth = dcn10_prepare_bandwidth,
  57        .optimize_bandwidth = dcn10_optimize_bandwidth,
  58        .set_drr = dcn10_set_drr,
  59        .get_position = dcn10_get_position,
  60        .set_static_screen_control = dcn10_set_static_screen_control,
  61        .setup_stereo = dcn10_setup_stereo,
  62        .set_avmute = dce110_set_avmute,
  63        .log_hw_state = dcn10_log_hw_state,
  64        .get_hw_state = dcn10_get_hw_state,
  65        .clear_status_bits = dcn10_clear_status_bits,
  66        .wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
  67        .edp_power_control = dce110_edp_power_control,
  68        .edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
  69        .set_cursor_position = dcn10_set_cursor_position,
  70        .set_cursor_attribute = dcn10_set_cursor_attribute,
  71        .set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
  72        .setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
  73        .set_clock = dcn10_set_clock,
  74        .get_clock = dcn10_get_clock,
  75        .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
  76        .calc_vupdate_position = dcn10_calc_vupdate_position,
  77        .set_backlight_level = dce110_set_backlight_level,
  78        .set_abm_immediate_disable = dce110_set_abm_immediate_disable,
  79        .set_pipe = dce110_set_pipe,
  80};
  81
  82static const struct hwseq_private_funcs dcn10_private_funcs = {
  83        .init_pipes = dcn10_init_pipes,
  84        .update_plane_addr = dcn10_update_plane_addr,
  85        .plane_atomic_disconnect = dcn10_plane_atomic_disconnect,
  86        .program_pipe = dcn10_program_pipe,
  87        .update_mpcc = dcn10_update_mpcc,
  88        .set_input_transfer_func = dcn10_set_input_transfer_func,
  89        .set_output_transfer_func = dcn10_set_output_transfer_func,
  90        .power_down = dce110_power_down,
  91        .enable_display_power_gating = dcn10_dummy_display_power_gating,
  92        .blank_pixel_data = dcn10_blank_pixel_data,
  93        .reset_hw_ctx_wrap = dcn10_reset_hw_ctx_wrap,
  94        .enable_stream_timing = dcn10_enable_stream_timing,
  95        .edp_backlight_control = dce110_edp_backlight_control,
  96        .disable_stream_gating = NULL,
  97        .enable_stream_gating = NULL,
  98        .setup_vupdate_interrupt = dcn10_setup_vupdate_interrupt,
  99        .did_underflow_occur = dcn10_did_underflow_occur,
 100        .init_blank = NULL,
 101        .disable_vga = dcn10_disable_vga,
 102        .bios_golden_init = dcn10_bios_golden_init,
 103        .plane_atomic_disable = dcn10_plane_atomic_disable,
 104        .plane_atomic_power_down = dcn10_plane_atomic_power_down,
 105        .enable_power_gating_plane = dcn10_enable_power_gating_plane,
 106        .dpp_pg_control = dcn10_dpp_pg_control,
 107        .hubp_pg_control = dcn10_hubp_pg_control,
 108        .dsc_pg_control = NULL,
 109        .get_surface_visual_confirm_color = dcn10_get_surface_visual_confirm_color,
 110        .get_hdr_visual_confirm_color = dcn10_get_hdr_visual_confirm_color,
 111        .set_hdr_multiplier = dcn10_set_hdr_multiplier,
 112        .verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
 113};
 114
 115void dcn10_hw_sequencer_construct(struct dc *dc)
 116{
 117        dc->hwss = dcn10_funcs;
 118        dc->hwseq->funcs = dcn10_private_funcs;
 119}
 120