LXR linux/drivers/gpu/drm/amd/display/dc/dcn30/dcn30

   1/*
   2 * Copyright 2020 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26#ifndef __DAL_DCN30_VPG_H__
  27#define __DAL_DCN30_VPG_H__
  28
  29
  30#define DCN30_VPG_FROM_VPG(vpg)\
  31        container_of(vpg, struct dcn30_vpg, base)
  32
  33#define VPG_DCN3_REG_LIST(id) \
  34        SRI(VPG_GENERIC_STATUS, VPG, id), \
  35        SRI(VPG_GENERIC_PACKET_ACCESS_CTRL, VPG, id), \
  36        SRI(VPG_GENERIC_PACKET_DATA, VPG, id), \
  37        SRI(VPG_GSP_FRAME_UPDATE_CTRL, VPG, id)
  38
  39struct dcn30_vpg_registers {
  40        uint32_t VPG_GENERIC_STATUS;
  41        uint32_t VPG_GENERIC_PACKET_ACCESS_CTRL;
  42        uint32_t VPG_GENERIC_PACKET_DATA;
  43        uint32_t VPG_GSP_FRAME_UPDATE_CTRL;
  44};
  45
  46#define DCN3_VPG_MASK_SH_LIST(mask_sh)\
  47        SE_SF(VPG0_VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_OCCURED, mask_sh),\
  48        SE_SF(VPG0_VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_CLR, mask_sh),\
  49        SE_SF(VPG0_VPG_GENERIC_PACKET_ACCESS_CTRL, VPG_GENERIC_DATA_INDEX, mask_sh),\
  50        SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE0, mask_sh),\
  51        SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE1, mask_sh),\
  52        SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE2, mask_sh),\
  53        SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE3, mask_sh),\
  54        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC0_FRAME_UPDATE, mask_sh),\
  55        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC1_FRAME_UPDATE, mask_sh),\
  56        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC2_FRAME_UPDATE, mask_sh),\
  57        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC3_FRAME_UPDATE, mask_sh),\
  58        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC4_FRAME_UPDATE, mask_sh),\
  59        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC5_FRAME_UPDATE, mask_sh),\
  60        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC6_FRAME_UPDATE, mask_sh),\
  61        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC7_FRAME_UPDATE, mask_sh),\
  62        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC8_FRAME_UPDATE, mask_sh),\
  63        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC9_FRAME_UPDATE, mask_sh),\
  64        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC10_FRAME_UPDATE, mask_sh),\
  65        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC11_FRAME_UPDATE, mask_sh),\
  66        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC12_FRAME_UPDATE, mask_sh),\
  67        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC13_FRAME_UPDATE, mask_sh),\
  68        SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC14_FRAME_UPDATE, mask_sh)
  69
  70#define VPG_DCN3_REG_FIELD_LIST(type) \
  71        type VPG_GENERIC_CONFLICT_OCCURED;\
  72        type VPG_GENERIC_CONFLICT_CLR;\
  73        type VPG_GENERIC_DATA_INDEX;\
  74        type VPG_GENERIC_DATA_BYTE0;\
  75        type VPG_GENERIC_DATA_BYTE1;\
  76        type VPG_GENERIC_DATA_BYTE2;\
  77        type VPG_GENERIC_DATA_BYTE3;\
  78        type VPG_GENERIC0_FRAME_UPDATE;\
  79        type VPG_GENERIC1_FRAME_UPDATE;\
  80        type VPG_GENERIC2_FRAME_UPDATE;\
  81        type VPG_GENERIC3_FRAME_UPDATE;\
  82        type VPG_GENERIC4_FRAME_UPDATE;\
  83        type VPG_GENERIC5_FRAME_UPDATE;\
  84        type VPG_GENERIC6_FRAME_UPDATE;\
  85        type VPG_GENERIC7_FRAME_UPDATE;\
  86        type VPG_GENERIC8_FRAME_UPDATE;\
  87        type VPG_GENERIC9_FRAME_UPDATE;\
  88        type VPG_GENERIC10_FRAME_UPDATE;\
  89        type VPG_GENERIC11_FRAME_UPDATE;\
  90        type VPG_GENERIC12_FRAME_UPDATE;\
  91        type VPG_GENERIC13_FRAME_UPDATE;\
  92        type VPG_GENERIC14_FRAME_UPDATE
  93
  94
  95struct dcn30_vpg_shift {
  96        VPG_DCN3_REG_FIELD_LIST(uint8_t);
  97};
  98
  99struct dcn30_vpg_mask {
 100        VPG_DCN3_REG_FIELD_LIST(uint32_t);
 101};
 102
 103struct vpg;
 104
 105struct vpg_funcs {
 106        void (*update_generic_info_packet)(
 107                struct vpg *vpg,
 108                uint32_t packet_index,
 109                const struct dc_info_packet *info_packet);
 110};
 111
 112struct vpg {
 113        const struct vpg_funcs *funcs;
 114        struct dc_context *ctx;
 115        int inst;
 116};
 117
 118struct dcn30_vpg {
 119        struct vpg base;
 120        const struct dcn30_vpg_registers *regs;
 121        const struct dcn30_vpg_shift *vpg_shift;
 122        const struct dcn30_vpg_mask *vpg_mask;
 123};
 124
 125void vpg3_construct(struct dcn30_vpg *vpg3,
 126        struct dc_context *ctx,
 127        uint32_t inst,
 128        const struct dcn30_vpg_registers *vpg_regs,
 129        const struct dcn30_vpg_shift *vpg_shift,
 130        const struct dcn30_vpg_mask *vpg_mask);
 131
 132
 133#endif
 134