1 2/* 3 * Copyright 2017 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: AMD 24 * 25 */ 26 27#ifndef __RC_CALC_H__ 28#define __RC_CALC_H__ 29 30 31#define QP_SET_SIZE 15 32 33typedef int qp_set[QP_SET_SIZE]; 34 35struct rc_params { 36 int rc_quant_incr_limit0; 37 int rc_quant_incr_limit1; 38 int initial_fullness_offset; 39 int initial_xmit_delay; 40 int first_line_bpg_offset; 41 int second_line_bpg_offset; 42 int flatness_min_qp; 43 int flatness_max_qp; 44 int flatness_det_thresh; 45 qp_set qp_min; 46 qp_set qp_max; 47 qp_set ofs; 48 int rc_model_size; 49 int rc_edge_factor; 50 int rc_tgt_offset_hi; 51 int rc_tgt_offset_lo; 52 int rc_buf_thresh[QP_SET_SIZE - 1]; 53}; 54 55enum colour_mode { 56 CM_RGB, /* 444 RGB */ 57 CM_444, /* 444 YUV or simple 422 */ 58 CM_422, /* native 422 */ 59 CM_420 /* native 420 */ 60}; 61 62enum bits_per_comp { 63 BPC_8 = 8, 64 BPC_10 = 10, 65 BPC_12 = 12 66}; 67 68enum max_min { 69 MM_MIN = 0, 70 MM_MAX = 1 71}; 72 73struct qp_entry { 74 float bpp; 75 const qp_set qps; 76}; 77 78typedef struct qp_entry qp_table[]; 79 80void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps); 81u32 calc_dsc_bytes_per_pixel(const struct drm_dsc_config *pps); 82u32 calc_dsc_bpp_x16(u32 stream_bandwidth_kbps, u32 pix_clk_100hz, 83 u32 bpp_increment_div); 84 85#endif 86 87