1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40#include <linux/err.h>
41#include <linux/delay.h>
42#include <linux/spi/spi.h>
43#include <linux/module.h>
44#include <linux/mod_devicetable.h>
45#include <linux/iio/iio.h>
46#include <linux/regulator/consumer.h>
47
48enum {
49 mcp3001,
50 mcp3002,
51 mcp3004,
52 mcp3008,
53 mcp3201,
54 mcp3202,
55 mcp3204,
56 mcp3208,
57 mcp3301,
58 mcp3550_50,
59 mcp3550_60,
60 mcp3551,
61 mcp3553,
62};
63
64struct mcp320x_chip_info {
65 const struct iio_chan_spec *channels;
66 unsigned int num_channels;
67 unsigned int resolution;
68 unsigned int conv_time;
69};
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84struct mcp320x {
85 struct spi_device *spi;
86 struct spi_message msg;
87 struct spi_transfer transfer[2];
88 struct spi_message start_conv_msg;
89 struct spi_transfer start_conv_transfer;
90
91 struct regulator *reg;
92 struct mutex lock;
93 const struct mcp320x_chip_info *chip_info;
94
95 u8 tx_buf ____cacheline_aligned;
96 u8 rx_buf[4];
97};
98
99static int mcp320x_channel_to_tx_data(int device_index,
100 const unsigned int channel, bool differential)
101{
102 int start_bit = 1;
103
104 switch (device_index) {
105 case mcp3002:
106 case mcp3202:
107 return ((start_bit << 4) | (!differential << 3) |
108 (channel << 2));
109 case mcp3004:
110 case mcp3204:
111 case mcp3008:
112 case mcp3208:
113 return ((start_bit << 6) | (!differential << 5) |
114 (channel << 2));
115 default:
116 return -EINVAL;
117 }
118}
119
120static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
121 bool differential, int device_index, int *val)
122{
123 int ret;
124
125 if (adc->chip_info->conv_time) {
126 ret = spi_sync(adc->spi, &adc->start_conv_msg);
127 if (ret < 0)
128 return ret;
129
130 usleep_range(adc->chip_info->conv_time,
131 adc->chip_info->conv_time + 100);
132 }
133
134 memset(&adc->rx_buf, 0, sizeof(adc->rx_buf));
135 if (adc->chip_info->num_channels > 1)
136 adc->tx_buf = mcp320x_channel_to_tx_data(device_index, channel,
137 differential);
138
139 ret = spi_sync(adc->spi, &adc->msg);
140 if (ret < 0)
141 return ret;
142
143 switch (device_index) {
144 case mcp3001:
145 *val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
146 return 0;
147 case mcp3002:
148 case mcp3004:
149 case mcp3008:
150 *val = (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
151 return 0;
152 case mcp3201:
153 *val = (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
154 return 0;
155 case mcp3202:
156 case mcp3204:
157 case mcp3208:
158 *val = (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
159 return 0;
160 case mcp3301:
161 *val = sign_extend32((adc->rx_buf[0] & 0x1f) << 8
162 | adc->rx_buf[1], 12);
163 return 0;
164 case mcp3550_50:
165 case mcp3550_60:
166 case mcp3551:
167 case mcp3553: {
168 u32 raw = be32_to_cpup((__be32 *)adc->rx_buf);
169
170 if (!(adc->spi->mode & SPI_CPOL))
171 raw <<= 1;
172
173
174
175
176
177
178 raw >>= 8;
179 if (raw & BIT(22) && raw & BIT(23))
180 return -EIO;
181 else if (raw & BIT(22))
182 raw &= ~BIT(22);
183 else if (raw & BIT(23) || raw & BIT(21))
184 raw |= GENMASK(31, 22);
185
186 *val = (s32)raw;
187 return 0;
188 }
189 default:
190 return -EINVAL;
191 }
192}
193
194static int mcp320x_read_raw(struct iio_dev *indio_dev,
195 struct iio_chan_spec const *channel, int *val,
196 int *val2, long mask)
197{
198 struct mcp320x *adc = iio_priv(indio_dev);
199 int ret = -EINVAL;
200 int device_index = 0;
201
202 mutex_lock(&adc->lock);
203
204 device_index = spi_get_device_id(adc->spi)->driver_data;
205
206 switch (mask) {
207 case IIO_CHAN_INFO_RAW:
208 ret = mcp320x_adc_conversion(adc, channel->address,
209 channel->differential, device_index, val);
210 if (ret < 0)
211 goto out;
212
213 ret = IIO_VAL_INT;
214 break;
215
216 case IIO_CHAN_INFO_SCALE:
217 ret = regulator_get_voltage(adc->reg);
218 if (ret < 0)
219 goto out;
220
221
222 *val = ret / 1000;
223 *val2 = adc->chip_info->resolution;
224 ret = IIO_VAL_FRACTIONAL_LOG2;
225 break;
226 }
227
228out:
229 mutex_unlock(&adc->lock);
230
231 return ret;
232}
233
234#define MCP320X_VOLTAGE_CHANNEL(num) \
235 { \
236 .type = IIO_VOLTAGE, \
237 .indexed = 1, \
238 .channel = (num), \
239 .address = (num), \
240 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
241 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
242 }
243
244#define MCP320X_VOLTAGE_CHANNEL_DIFF(chan1, chan2) \
245 { \
246 .type = IIO_VOLTAGE, \
247 .indexed = 1, \
248 .channel = (chan1), \
249 .channel2 = (chan2), \
250 .address = (chan1), \
251 .differential = 1, \
252 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
253 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
254 }
255
256static const struct iio_chan_spec mcp3201_channels[] = {
257 MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
258};
259
260static const struct iio_chan_spec mcp3202_channels[] = {
261 MCP320X_VOLTAGE_CHANNEL(0),
262 MCP320X_VOLTAGE_CHANNEL(1),
263 MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
264 MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
265};
266
267static const struct iio_chan_spec mcp3204_channels[] = {
268 MCP320X_VOLTAGE_CHANNEL(0),
269 MCP320X_VOLTAGE_CHANNEL(1),
270 MCP320X_VOLTAGE_CHANNEL(2),
271 MCP320X_VOLTAGE_CHANNEL(3),
272 MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
273 MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
274 MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
275 MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
276};
277
278static const struct iio_chan_spec mcp3208_channels[] = {
279 MCP320X_VOLTAGE_CHANNEL(0),
280 MCP320X_VOLTAGE_CHANNEL(1),
281 MCP320X_VOLTAGE_CHANNEL(2),
282 MCP320X_VOLTAGE_CHANNEL(3),
283 MCP320X_VOLTAGE_CHANNEL(4),
284 MCP320X_VOLTAGE_CHANNEL(5),
285 MCP320X_VOLTAGE_CHANNEL(6),
286 MCP320X_VOLTAGE_CHANNEL(7),
287 MCP320X_VOLTAGE_CHANNEL_DIFF(0, 1),
288 MCP320X_VOLTAGE_CHANNEL_DIFF(1, 0),
289 MCP320X_VOLTAGE_CHANNEL_DIFF(2, 3),
290 MCP320X_VOLTAGE_CHANNEL_DIFF(3, 2),
291 MCP320X_VOLTAGE_CHANNEL_DIFF(4, 5),
292 MCP320X_VOLTAGE_CHANNEL_DIFF(5, 4),
293 MCP320X_VOLTAGE_CHANNEL_DIFF(6, 7),
294 MCP320X_VOLTAGE_CHANNEL_DIFF(7, 6),
295};
296
297static const struct iio_info mcp320x_info = {
298 .read_raw = mcp320x_read_raw,
299};
300
301static const struct mcp320x_chip_info mcp320x_chip_infos[] = {
302 [mcp3001] = {
303 .channels = mcp3201_channels,
304 .num_channels = ARRAY_SIZE(mcp3201_channels),
305 .resolution = 10
306 },
307 [mcp3002] = {
308 .channels = mcp3202_channels,
309 .num_channels = ARRAY_SIZE(mcp3202_channels),
310 .resolution = 10
311 },
312 [mcp3004] = {
313 .channels = mcp3204_channels,
314 .num_channels = ARRAY_SIZE(mcp3204_channels),
315 .resolution = 10
316 },
317 [mcp3008] = {
318 .channels = mcp3208_channels,
319 .num_channels = ARRAY_SIZE(mcp3208_channels),
320 .resolution = 10
321 },
322 [mcp3201] = {
323 .channels = mcp3201_channels,
324 .num_channels = ARRAY_SIZE(mcp3201_channels),
325 .resolution = 12
326 },
327 [mcp3202] = {
328 .channels = mcp3202_channels,
329 .num_channels = ARRAY_SIZE(mcp3202_channels),
330 .resolution = 12
331 },
332 [mcp3204] = {
333 .channels = mcp3204_channels,
334 .num_channels = ARRAY_SIZE(mcp3204_channels),
335 .resolution = 12
336 },
337 [mcp3208] = {
338 .channels = mcp3208_channels,
339 .num_channels = ARRAY_SIZE(mcp3208_channels),
340 .resolution = 12
341 },
342 [mcp3301] = {
343 .channels = mcp3201_channels,
344 .num_channels = ARRAY_SIZE(mcp3201_channels),
345 .resolution = 13
346 },
347 [mcp3550_50] = {
348 .channels = mcp3201_channels,
349 .num_channels = ARRAY_SIZE(mcp3201_channels),
350 .resolution = 21,
351
352 .conv_time = 80000 * 1.02 + 144000 / 102.4,
353 },
354 [mcp3550_60] = {
355 .channels = mcp3201_channels,
356 .num_channels = ARRAY_SIZE(mcp3201_channels),
357 .resolution = 21,
358 .conv_time = 66670 * 1.02 + 144000 / 122.88,
359 },
360 [mcp3551] = {
361 .channels = mcp3201_channels,
362 .num_channels = ARRAY_SIZE(mcp3201_channels),
363 .resolution = 21,
364 .conv_time = 73100 * 1.02 + 144000 / 112.64,
365 },
366 [mcp3553] = {
367 .channels = mcp3201_channels,
368 .num_channels = ARRAY_SIZE(mcp3201_channels),
369 .resolution = 21,
370 .conv_time = 16670 * 1.02 + 144000 / 122.88,
371 },
372};
373
374static int mcp320x_probe(struct spi_device *spi)
375{
376 struct iio_dev *indio_dev;
377 struct mcp320x *adc;
378 const struct mcp320x_chip_info *chip_info;
379 int ret, device_index;
380
381 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
382 if (!indio_dev)
383 return -ENOMEM;
384
385 adc = iio_priv(indio_dev);
386 adc->spi = spi;
387
388 indio_dev->name = spi_get_device_id(spi)->name;
389 indio_dev->modes = INDIO_DIRECT_MODE;
390 indio_dev->info = &mcp320x_info;
391 spi_set_drvdata(spi, indio_dev);
392
393 device_index = spi_get_device_id(spi)->driver_data;
394 chip_info = &mcp320x_chip_infos[device_index];
395 indio_dev->channels = chip_info->channels;
396 indio_dev->num_channels = chip_info->num_channels;
397
398 adc->chip_info = chip_info;
399
400 adc->transfer[0].tx_buf = &adc->tx_buf;
401 adc->transfer[0].len = sizeof(adc->tx_buf);
402 adc->transfer[1].rx_buf = adc->rx_buf;
403 adc->transfer[1].len = DIV_ROUND_UP(chip_info->resolution, 8);
404
405 if (chip_info->num_channels == 1)
406
407 spi_message_init_with_transfers(&adc->msg,
408 &adc->transfer[1], 1);
409 else
410 spi_message_init_with_transfers(&adc->msg, adc->transfer,
411 ARRAY_SIZE(adc->transfer));
412
413 switch (device_index) {
414 case mcp3550_50:
415 case mcp3550_60:
416 case mcp3551:
417 case mcp3553:
418
419 if (!(spi->mode & SPI_CPOL))
420 adc->transfer[1].len++;
421
422
423 adc->start_conv_transfer.delay.value = 8;
424 adc->start_conv_transfer.delay.unit = SPI_DELAY_UNIT_USECS;
425 spi_message_init_with_transfers(&adc->start_conv_msg,
426 &adc->start_conv_transfer, 1);
427
428
429
430
431
432
433
434
435
436 mcp320x_adc_conversion(adc, 0, 1, device_index, &ret);
437 mcp320x_adc_conversion(adc, 0, 1, device_index, &ret);
438 }
439
440 adc->reg = devm_regulator_get(&spi->dev, "vref");
441 if (IS_ERR(adc->reg))
442 return PTR_ERR(adc->reg);
443
444 ret = regulator_enable(adc->reg);
445 if (ret < 0)
446 return ret;
447
448 mutex_init(&adc->lock);
449
450 ret = iio_device_register(indio_dev);
451 if (ret < 0)
452 goto reg_disable;
453
454 return 0;
455
456reg_disable:
457 regulator_disable(adc->reg);
458
459 return ret;
460}
461
462static int mcp320x_remove(struct spi_device *spi)
463{
464 struct iio_dev *indio_dev = spi_get_drvdata(spi);
465 struct mcp320x *adc = iio_priv(indio_dev);
466
467 iio_device_unregister(indio_dev);
468 regulator_disable(adc->reg);
469
470 return 0;
471}
472
473static const struct of_device_id mcp320x_dt_ids[] = {
474
475 { .compatible = "mcp3001" },
476 { .compatible = "mcp3002" },
477 { .compatible = "mcp3004" },
478 { .compatible = "mcp3008" },
479 { .compatible = "mcp3201" },
480 { .compatible = "mcp3202" },
481 { .compatible = "mcp3204" },
482 { .compatible = "mcp3208" },
483 { .compatible = "mcp3301" },
484 { .compatible = "microchip,mcp3001" },
485 { .compatible = "microchip,mcp3002" },
486 { .compatible = "microchip,mcp3004" },
487 { .compatible = "microchip,mcp3008" },
488 { .compatible = "microchip,mcp3201" },
489 { .compatible = "microchip,mcp3202" },
490 { .compatible = "microchip,mcp3204" },
491 { .compatible = "microchip,mcp3208" },
492 { .compatible = "microchip,mcp3301" },
493 { .compatible = "microchip,mcp3550-50" },
494 { .compatible = "microchip,mcp3550-60" },
495 { .compatible = "microchip,mcp3551" },
496 { .compatible = "microchip,mcp3553" },
497 { }
498};
499MODULE_DEVICE_TABLE(of, mcp320x_dt_ids);
500
501static const struct spi_device_id mcp320x_id[] = {
502 { "mcp3001", mcp3001 },
503 { "mcp3002", mcp3002 },
504 { "mcp3004", mcp3004 },
505 { "mcp3008", mcp3008 },
506 { "mcp3201", mcp3201 },
507 { "mcp3202", mcp3202 },
508 { "mcp3204", mcp3204 },
509 { "mcp3208", mcp3208 },
510 { "mcp3301", mcp3301 },
511 { "mcp3550-50", mcp3550_50 },
512 { "mcp3550-60", mcp3550_60 },
513 { "mcp3551", mcp3551 },
514 { "mcp3553", mcp3553 },
515 { }
516};
517MODULE_DEVICE_TABLE(spi, mcp320x_id);
518
519static struct spi_driver mcp320x_driver = {
520 .driver = {
521 .name = "mcp320x",
522 .of_match_table = mcp320x_dt_ids,
523 },
524 .probe = mcp320x_probe,
525 .remove = mcp320x_remove,
526 .id_table = mcp320x_id,
527};
528module_spi_driver(mcp320x_driver);
529
530MODULE_AUTHOR("Oskar Andero <oskar.andero@gmail.com>");
531MODULE_DESCRIPTION("Microchip Technology MCP3x01/02/04/08 and MCP3550/1/3");
532MODULE_LICENSE("GPL v2");
533
