linux/drivers/media/i2c/max9286.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Maxim MAX9286 GMSL Deserializer Driver
   4 *
   5 * Copyright (C) 2017-2019 Jacopo Mondi
   6 * Copyright (C) 2017-2019 Kieran Bingham
   7 * Copyright (C) 2017-2019 Laurent Pinchart
   8 * Copyright (C) 2017-2019 Niklas Söderlund
   9 * Copyright (C) 2016 Renesas Electronics Corporation
  10 * Copyright (C) 2015 Cogent Embedded, Inc.
  11 */
  12
  13#include <linux/delay.h>
  14#include <linux/device.h>
  15#include <linux/fwnode.h>
  16#include <linux/gpio/consumer.h>
  17#include <linux/gpio/driver.h>
  18#include <linux/i2c.h>
  19#include <linux/i2c-mux.h>
  20#include <linux/module.h>
  21#include <linux/mutex.h>
  22#include <linux/of_graph.h>
  23#include <linux/regulator/consumer.h>
  24#include <linux/slab.h>
  25
  26#include <media/v4l2-async.h>
  27#include <media/v4l2-ctrls.h>
  28#include <media/v4l2-device.h>
  29#include <media/v4l2-fwnode.h>
  30#include <media/v4l2-subdev.h>
  31
  32/* Register 0x00 */
  33#define MAX9286_MSTLINKSEL_AUTO         (7 << 5)
  34#define MAX9286_MSTLINKSEL(n)           ((n) << 5)
  35#define MAX9286_EN_VS_GEN               BIT(4)
  36#define MAX9286_LINKEN(n)               (1 << (n))
  37/* Register 0x01 */
  38#define MAX9286_FSYNCMODE_ECU           (3 << 6)
  39#define MAX9286_FSYNCMODE_EXT           (2 << 6)
  40#define MAX9286_FSYNCMODE_INT_OUT       (1 << 6)
  41#define MAX9286_FSYNCMODE_INT_HIZ       (0 << 6)
  42#define MAX9286_GPIEN                   BIT(5)
  43#define MAX9286_ENLMO_RSTFSYNC          BIT(2)
  44#define MAX9286_FSYNCMETH_AUTO          (2 << 0)
  45#define MAX9286_FSYNCMETH_SEMI_AUTO     (1 << 0)
  46#define MAX9286_FSYNCMETH_MANUAL        (0 << 0)
  47#define MAX9286_REG_FSYNC_PERIOD_L      0x06
  48#define MAX9286_REG_FSYNC_PERIOD_M      0x07
  49#define MAX9286_REG_FSYNC_PERIOD_H      0x08
  50/* Register 0x0a */
  51#define MAX9286_FWDCCEN(n)              (1 << ((n) + 4))
  52#define MAX9286_REVCCEN(n)              (1 << (n))
  53/* Register 0x0c */
  54#define MAX9286_HVEN                    BIT(7)
  55#define MAX9286_EDC_6BIT_HAMMING        (2 << 5)
  56#define MAX9286_EDC_6BIT_CRC            (1 << 5)
  57#define MAX9286_EDC_1BIT_PARITY         (0 << 5)
  58#define MAX9286_DESEL                   BIT(4)
  59#define MAX9286_INVVS                   BIT(3)
  60#define MAX9286_INVHS                   BIT(2)
  61#define MAX9286_HVSRC_D0                (2 << 0)
  62#define MAX9286_HVSRC_D14               (1 << 0)
  63#define MAX9286_HVSRC_D18               (0 << 0)
  64/* Register 0x0f */
  65#define MAX9286_0X0F_RESERVED           BIT(3)
  66/* Register 0x12 */
  67#define MAX9286_CSILANECNT(n)           (((n) - 1) << 6)
  68#define MAX9286_CSIDBL                  BIT(5)
  69#define MAX9286_DBL                     BIT(4)
  70#define MAX9286_DATATYPE_USER_8BIT      (11 << 0)
  71#define MAX9286_DATATYPE_USER_YUV_12BIT (10 << 0)
  72#define MAX9286_DATATYPE_USER_24BIT     (9 << 0)
  73#define MAX9286_DATATYPE_RAW14          (8 << 0)
  74#define MAX9286_DATATYPE_RAW11          (7 << 0)
  75#define MAX9286_DATATYPE_RAW10          (6 << 0)
  76#define MAX9286_DATATYPE_RAW8           (5 << 0)
  77#define MAX9286_DATATYPE_YUV422_10BIT   (4 << 0)
  78#define MAX9286_DATATYPE_YUV422_8BIT    (3 << 0)
  79#define MAX9286_DATATYPE_RGB555         (2 << 0)
  80#define MAX9286_DATATYPE_RGB565         (1 << 0)
  81#define MAX9286_DATATYPE_RGB888         (0 << 0)
  82/* Register 0x15 */
  83#define MAX9286_VC(n)                   ((n) << 5)
  84#define MAX9286_VCTYPE                  BIT(4)
  85#define MAX9286_CSIOUTEN                BIT(3)
  86#define MAX9286_0X15_RESV               (3 << 0)
  87/* Register 0x1b */
  88#define MAX9286_SWITCHIN(n)             (1 << ((n) + 4))
  89#define MAX9286_ENEQ(n)                 (1 << (n))
  90/* Register 0x27 */
  91#define MAX9286_LOCKED                  BIT(7)
  92/* Register 0x31 */
  93#define MAX9286_FSYNC_LOCKED            BIT(6)
  94/* Register 0x34 */
  95#define MAX9286_I2CLOCACK               BIT(7)
  96#define MAX9286_I2CSLVSH_1046NS_469NS   (3 << 5)
  97#define MAX9286_I2CSLVSH_938NS_352NS    (2 << 5)
  98#define MAX9286_I2CSLVSH_469NS_234NS    (1 << 5)
  99#define MAX9286_I2CSLVSH_352NS_117NS    (0 << 5)
 100#define MAX9286_I2CMSTBT_837KBPS        (7 << 2)
 101#define MAX9286_I2CMSTBT_533KBPS        (6 << 2)
 102#define MAX9286_I2CMSTBT_339KBPS        (5 << 2)
 103#define MAX9286_I2CMSTBT_173KBPS        (4 << 2)
 104#define MAX9286_I2CMSTBT_105KBPS        (3 << 2)
 105#define MAX9286_I2CMSTBT_84KBPS         (2 << 2)
 106#define MAX9286_I2CMSTBT_28KBPS         (1 << 2)
 107#define MAX9286_I2CMSTBT_8KBPS          (0 << 2)
 108#define MAX9286_I2CSLVTO_NONE           (3 << 0)
 109#define MAX9286_I2CSLVTO_1024US         (2 << 0)
 110#define MAX9286_I2CSLVTO_256US          (1 << 0)
 111#define MAX9286_I2CSLVTO_64US           (0 << 0)
 112/* Register 0x3b */
 113#define MAX9286_REV_TRF(n)              ((n) << 4)
 114#define MAX9286_REV_AMP(n)              ((((n) - 30) / 10) << 1) /* in mV */
 115#define MAX9286_REV_AMP_X               BIT(0)
 116/* Register 0x3f */
 117#define MAX9286_EN_REV_CFG              BIT(6)
 118#define MAX9286_REV_FLEN(n)             ((n) - 20)
 119/* Register 0x49 */
 120#define MAX9286_VIDEO_DETECT_MASK       0x0f
 121/* Register 0x69 */
 122#define MAX9286_LFLTBMONMASKED          BIT(7)
 123#define MAX9286_LOCKMONMASKED           BIT(6)
 124#define MAX9286_AUTOCOMBACKEN           BIT(5)
 125#define MAX9286_AUTOMASKEN              BIT(4)
 126#define MAX9286_MASKLINK(n)             ((n) << 0)
 127
 128/*
 129 * The sink and source pads are created to match the OF graph port numbers so
 130 * that their indexes can be used interchangeably.
 131 */
 132#define MAX9286_NUM_GMSL                4
 133#define MAX9286_N_SINKS                 4
 134#define MAX9286_N_PADS                  5
 135#define MAX9286_SRC_PAD                 4
 136
 137struct max9286_source {
 138        struct v4l2_async_subdev asd;
 139        struct v4l2_subdev *sd;
 140        struct fwnode_handle *fwnode;
 141};
 142
 143#define asd_to_max9286_source(_asd) \
 144        container_of(_asd, struct max9286_source, asd)
 145
 146struct max9286_priv {
 147        struct i2c_client *client;
 148        struct gpio_desc *gpiod_pwdn;
 149        struct v4l2_subdev sd;
 150        struct media_pad pads[MAX9286_N_PADS];
 151        struct regulator *regulator;
 152
 153        struct gpio_chip gpio;
 154        u8 gpio_state;
 155
 156        struct i2c_mux_core *mux;
 157        unsigned int mux_channel;
 158        bool mux_open;
 159
 160        struct v4l2_ctrl_handler ctrls;
 161        struct v4l2_ctrl *pixelrate;
 162
 163        struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS];
 164
 165        /* Protects controls and fmt structures */
 166        struct mutex mutex;
 167
 168        unsigned int nsources;
 169        unsigned int source_mask;
 170        unsigned int route_mask;
 171        unsigned int bound_sources;
 172        unsigned int csi2_data_lanes;
 173        struct max9286_source sources[MAX9286_NUM_GMSL];
 174        struct v4l2_async_notifier notifier;
 175};
 176
 177static struct max9286_source *next_source(struct max9286_priv *priv,
 178                                          struct max9286_source *source)
 179{
 180        if (!source)
 181                source = &priv->sources[0];
 182        else
 183                source++;
 184
 185        for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) {
 186                if (source->fwnode)
 187                        return source;
 188        }
 189
 190        return NULL;
 191}
 192
 193#define for_each_source(priv, source) \
 194        for ((source) = NULL; ((source) = next_source((priv), (source))); )
 195
 196#define to_index(priv, source) ((source) - &(priv)->sources[0])
 197
 198static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd)
 199{
 200        return container_of(sd, struct max9286_priv, sd);
 201}
 202
 203/* -----------------------------------------------------------------------------
 204 * I2C IO
 205 */
 206
 207static int max9286_read(struct max9286_priv *priv, u8 reg)
 208{
 209        int ret;
 210
 211        ret = i2c_smbus_read_byte_data(priv->client, reg);
 212        if (ret < 0)
 213                dev_err(&priv->client->dev,
 214                        "%s: register 0x%02x read failed (%d)\n",
 215                        __func__, reg, ret);
 216
 217        return ret;
 218}
 219
 220static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val)
 221{
 222        int ret;
 223
 224        ret = i2c_smbus_write_byte_data(priv->client, reg, val);
 225        if (ret < 0)
 226                dev_err(&priv->client->dev,
 227                        "%s: register 0x%02x write failed (%d)\n",
 228                        __func__, reg, ret);
 229
 230        return ret;
 231}
 232
 233/* -----------------------------------------------------------------------------
 234 * I2C Multiplexer
 235 */
 236
 237static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf)
 238{
 239        max9286_write(priv, 0x0a, conf);
 240
 241        /*
 242         * We must sleep after any change to the forward or reverse channel
 243         * configuration.
 244         */
 245        usleep_range(3000, 5000);
 246}
 247
 248static void max9286_i2c_mux_open(struct max9286_priv *priv)
 249{
 250        /* Open all channels on the MAX9286 */
 251        max9286_i2c_mux_configure(priv, 0xff);
 252
 253        priv->mux_open = true;
 254}
 255
 256static void max9286_i2c_mux_close(struct max9286_priv *priv)
 257{
 258        /*
 259         * Ensure that both the forward and reverse channel are disabled on the
 260         * mux, and that the channel ID is invalidated to ensure we reconfigure
 261         * on the next max9286_i2c_mux_select() call.
 262         */
 263        max9286_i2c_mux_configure(priv, 0x00);
 264
 265        priv->mux_open = false;
 266        priv->mux_channel = -1;
 267}
 268
 269static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
 270{
 271        struct max9286_priv *priv = i2c_mux_priv(muxc);
 272
 273        /* Channel select is disabled when configured in the opened state. */
 274        if (priv->mux_open)
 275                return 0;
 276
 277        if (priv->mux_channel == chan)
 278                return 0;
 279
 280        priv->mux_channel = chan;
 281
 282        max9286_i2c_mux_configure(priv,
 283                                  MAX9286_FWDCCEN(chan) |
 284                                  MAX9286_REVCCEN(chan));
 285
 286        return 0;
 287}
 288
 289static int max9286_i2c_mux_init(struct max9286_priv *priv)
 290{
 291        struct max9286_source *source;
 292        int ret;
 293
 294        if (!i2c_check_functionality(priv->client->adapter,
 295                                     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
 296                return -ENODEV;
 297
 298        priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
 299                                  priv->nsources, 0, I2C_MUX_LOCKED,
 300                                  max9286_i2c_mux_select, NULL);
 301        if (!priv->mux)
 302                return -ENOMEM;
 303
 304        priv->mux->priv = priv;
 305
 306        for_each_source(priv, source) {
 307                unsigned int index = to_index(priv, source);
 308
 309                ret = i2c_mux_add_adapter(priv->mux, 0, index, 0);
 310                if (ret < 0)
 311                        goto error;
 312        }
 313
 314        return 0;
 315
 316error:
 317        i2c_mux_del_adapters(priv->mux);
 318        return ret;
 319}
 320
 321static void max9286_configure_i2c(struct max9286_priv *priv, bool localack)
 322{
 323        u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US |
 324                    MAX9286_I2CMSTBT_105KBPS;
 325
 326        if (localack)
 327                config |= MAX9286_I2CLOCACK;
 328
 329        max9286_write(priv, 0x34, config);
 330        usleep_range(3000, 5000);
 331}
 332
 333/*
 334 * max9286_check_video_links() - Make sure video links are detected and locked
 335 *
 336 * Performs safety checks on video link status. Make sure they are detected
 337 * and all enabled links are locked.
 338 *
 339 * Returns 0 for success, -EIO for errors.
 340 */
 341static int max9286_check_video_links(struct max9286_priv *priv)
 342{
 343        unsigned int i;
 344        int ret;
 345
 346        /*
 347         * Make sure valid video links are detected.
 348         * The delay is not characterized in de-serializer manual, wait up
 349         * to 5 ms.
 350         */
 351        for (i = 0; i < 10; i++) {
 352                ret = max9286_read(priv, 0x49);
 353                if (ret < 0)
 354                        return -EIO;
 355
 356                if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask)
 357                        break;
 358
 359                usleep_range(350, 500);
 360        }
 361
 362        if (i == 10) {
 363                dev_err(&priv->client->dev,
 364                        "Unable to detect video links: 0x%02x\n", ret);
 365                return -EIO;
 366        }
 367
 368        /* Make sure all enabled links are locked (4ms max). */
 369        for (i = 0; i < 10; i++) {
 370                ret = max9286_read(priv, 0x27);
 371                if (ret < 0)
 372                        return -EIO;
 373
 374                if (ret & MAX9286_LOCKED)
 375                        break;
 376
 377                usleep_range(350, 450);
 378        }
 379
 380        if (i == 10) {
 381                dev_err(&priv->client->dev, "Not all enabled links locked\n");
 382                return -EIO;
 383        }
 384
 385        return 0;
 386}
 387
 388/*
 389 * max9286_check_config_link() - Detect and wait for configuration links
 390 *
 391 * Determine if the configuration channel is up and settled for a link.
 392 *
 393 * Returns 0 for success, -EIO for errors.
 394 */
 395static int max9286_check_config_link(struct max9286_priv *priv,
 396                                     unsigned int source_mask)
 397{
 398        unsigned int conflink_mask = (source_mask & 0x0f) << 4;
 399        unsigned int i;
 400        int ret;
 401
 402        /*
 403         * Make sure requested configuration links are detected.
 404         * The delay is not characterized in the chip manual: wait up
 405         * to 5 milliseconds.
 406         */
 407        for (i = 0; i < 10; i++) {
 408                ret = max9286_read(priv, 0x49) & 0xf0;
 409                if (ret < 0)
 410                        return -EIO;
 411
 412                if (ret == conflink_mask)
 413                        break;
 414
 415                usleep_range(350, 500);
 416        }
 417
 418        if (ret != conflink_mask) {
 419                dev_err(&priv->client->dev,
 420                        "Unable to detect configuration links: 0x%02x expected 0x%02x\n",
 421                        ret, conflink_mask);
 422                return -EIO;
 423        }
 424
 425        dev_info(&priv->client->dev,
 426                 "Successfully detected configuration links after %u loops: 0x%02x\n",
 427                 i, conflink_mask);
 428
 429        return 0;
 430}
 431
 432/* -----------------------------------------------------------------------------
 433 * V4L2 Subdev
 434 */
 435
 436static int max9286_set_pixelrate(struct max9286_priv *priv)
 437{
 438        struct max9286_source *source = NULL;
 439        u64 pixelrate = 0;
 440
 441        for_each_source(priv, source) {
 442                struct v4l2_ctrl *ctrl;
 443                u64 source_rate = 0;
 444
 445                /* Pixel rate is mandatory to be reported by sources. */
 446                ctrl = v4l2_ctrl_find(source->sd->ctrl_handler,
 447                                      V4L2_CID_PIXEL_RATE);
 448                if (!ctrl) {
 449                        pixelrate = 0;
 450                        break;
 451                }
 452
 453                /* All source must report the same pixel rate. */
 454                source_rate = v4l2_ctrl_g_ctrl_int64(ctrl);
 455                if (!pixelrate) {
 456                        pixelrate = source_rate;
 457                } else if (pixelrate != source_rate) {
 458                        dev_err(&priv->client->dev,
 459                                "Unable to calculate pixel rate\n");
 460                        return -EINVAL;
 461                }
 462        }
 463
 464        if (!pixelrate) {
 465                dev_err(&priv->client->dev,
 466                        "No pixel rate control available in sources\n");
 467                return -EINVAL;
 468        }
 469
 470        /*
 471         * The CSI-2 transmitter pixel rate is the single source rate multiplied
 472         * by the number of available sources.
 473         */
 474        return v4l2_ctrl_s_ctrl_int64(priv->pixelrate,
 475                                      pixelrate * priv->nsources);
 476}
 477
 478static int max9286_notify_bound(struct v4l2_async_notifier *notifier,
 479                                struct v4l2_subdev *subdev,
 480                                struct v4l2_async_subdev *asd)
 481{
 482        struct max9286_priv *priv = sd_to_max9286(notifier->sd);
 483        struct max9286_source *source = asd_to_max9286_source(asd);
 484        unsigned int index = to_index(priv, source);
 485        unsigned int src_pad;
 486        int ret;
 487
 488        ret = media_entity_get_fwnode_pad(&subdev->entity,
 489                                          source->fwnode,
 490                                          MEDIA_PAD_FL_SOURCE);
 491        if (ret < 0) {
 492                dev_err(&priv->client->dev,
 493                        "Failed to find pad for %s\n", subdev->name);
 494                return ret;
 495        }
 496
 497        priv->bound_sources |= BIT(index);
 498        source->sd = subdev;
 499        src_pad = ret;
 500
 501        ret = media_create_pad_link(&source->sd->entity, src_pad,
 502                                    &priv->sd.entity, index,
 503                                    MEDIA_LNK_FL_ENABLED |
 504                                    MEDIA_LNK_FL_IMMUTABLE);
 505        if (ret) {
 506                dev_err(&priv->client->dev,
 507                        "Unable to link %s:%u -> %s:%u\n",
 508                        source->sd->name, src_pad, priv->sd.name, index);
 509                return ret;
 510        }
 511
 512        dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n",
 513                subdev->name, src_pad, index);
 514
 515        /*
 516         * We can only register v4l2_async_notifiers, which do not provide a
 517         * means to register a complete callback. bound_sources allows us to
 518         * identify when all remote serializers have completed their probe.
 519         */
 520        if (priv->bound_sources != priv->source_mask)
 521                return 0;
 522
 523        /*
 524         * All enabled sources have probed and enabled their reverse control
 525         * channels:
 526         *
 527         * - Verify all configuration links are properly detected
 528         * - Disable auto-ack as communication on the control channel are now
 529         *   stable.
 530         */
 531        max9286_check_config_link(priv, priv->source_mask);
 532
 533        /*
 534         * Re-configure I2C with local acknowledge disabled after cameras have
 535         * probed.
 536         */
 537        max9286_configure_i2c(priv, false);
 538
 539        return max9286_set_pixelrate(priv);
 540}
 541
 542static void max9286_notify_unbind(struct v4l2_async_notifier *notifier,
 543                                  struct v4l2_subdev *subdev,
 544                                  struct v4l2_async_subdev *asd)
 545{
 546        struct max9286_priv *priv = sd_to_max9286(notifier->sd);
 547        struct max9286_source *source = asd_to_max9286_source(asd);
 548        unsigned int index = to_index(priv, source);
 549
 550        source->sd = NULL;
 551        priv->bound_sources &= ~BIT(index);
 552}
 553
 554static const struct v4l2_async_notifier_operations max9286_notify_ops = {
 555        .bound = max9286_notify_bound,
 556        .unbind = max9286_notify_unbind,
 557};
 558
 559static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
 560{
 561        struct device *dev = &priv->client->dev;
 562        struct max9286_source *source = NULL;
 563        int ret;
 564
 565        if (!priv->nsources)
 566                return 0;
 567
 568        v4l2_async_notifier_init(&priv->notifier);
 569
 570        for_each_source(priv, source) {
 571                unsigned int i = to_index(priv, source);
 572
 573                source->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
 574                source->asd.match.fwnode = source->fwnode;
 575
 576                ret = v4l2_async_notifier_add_subdev(&priv->notifier,
 577                                                     &source->asd);
 578                if (ret) {
 579                        dev_err(dev, "Failed to add subdev for source %d", i);
 580                        v4l2_async_notifier_cleanup(&priv->notifier);
 581                        return ret;
 582                }
 583
 584                /*
 585                 * Balance the reference counting handled through
 586                 * v4l2_async_notifier_cleanup()
 587                 */
 588                fwnode_handle_get(source->fwnode);
 589        }
 590
 591        priv->notifier.ops = &max9286_notify_ops;
 592
 593        ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
 594        if (ret) {
 595                dev_err(dev, "Failed to register subdev_notifier");
 596                v4l2_async_notifier_cleanup(&priv->notifier);
 597                return ret;
 598        }
 599
 600        return 0;
 601}
 602
 603static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
 604{
 605        if (!priv->nsources)
 606                return;
 607
 608        v4l2_async_notifier_unregister(&priv->notifier);
 609        v4l2_async_notifier_cleanup(&priv->notifier);
 610}
 611
 612static int max9286_s_stream(struct v4l2_subdev *sd, int enable)
 613{
 614        struct max9286_priv *priv = sd_to_max9286(sd);
 615        struct max9286_source *source;
 616        unsigned int i;
 617        bool sync = false;
 618        int ret;
 619
 620        if (enable) {
 621                /*
 622                 * The frame sync between cameras is transmitted across the
 623                 * reverse channel as GPIO. We must open all channels while
 624                 * streaming to allow this synchronisation signal to be shared.
 625                 */
 626                max9286_i2c_mux_open(priv);
 627
 628                /* Start all cameras. */
 629                for_each_source(priv, source) {
 630                        ret = v4l2_subdev_call(source->sd, video, s_stream, 1);
 631                        if (ret)
 632                                return ret;
 633                }
 634
 635                ret = max9286_check_video_links(priv);
 636                if (ret)
 637                        return ret;
 638
 639                /*
 640                 * Wait until frame synchronization is locked.
 641                 *
 642                 * Manual says frame sync locking should take ~6 VTS.
 643                 * From practical experience at least 8 are required. Give
 644                 * 12 complete frames time (~400ms at 30 fps) to achieve frame
 645                 * locking before returning error.
 646                 */
 647                for (i = 0; i < 40; i++) {
 648                        if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) {
 649                                sync = true;
 650                                break;
 651                        }
 652                        usleep_range(9000, 11000);
 653                }
 654
 655                if (!sync) {
 656                        dev_err(&priv->client->dev,
 657                                "Failed to get frame synchronization\n");
 658                        return -EXDEV; /* Invalid cross-device link */
 659                }
 660
 661                /*
 662                 * Enable CSI output, VC set according to link number.
 663                 * Bit 7 must be set (chip manual says it's 0 and reserved).
 664                 */
 665                max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE |
 666                              MAX9286_CSIOUTEN | MAX9286_0X15_RESV);
 667        } else {
 668                max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
 669
 670                /* Stop all cameras. */
 671                for_each_source(priv, source)
 672                        v4l2_subdev_call(source->sd, video, s_stream, 0);
 673
 674                max9286_i2c_mux_close(priv);
 675        }
 676
 677        return 0;
 678}
 679
 680static int max9286_enum_mbus_code(struct v4l2_subdev *sd,
 681                                  struct v4l2_subdev_pad_config *cfg,
 682                                  struct v4l2_subdev_mbus_code_enum *code)
 683{
 684        if (code->pad || code->index > 0)
 685                return -EINVAL;
 686
 687        code->code = MEDIA_BUS_FMT_UYVY8_1X16;
 688
 689        return 0;
 690}
 691
 692static struct v4l2_mbus_framefmt *
 693max9286_get_pad_format(struct max9286_priv *priv,
 694                       struct v4l2_subdev_pad_config *cfg,
 695                       unsigned int pad, u32 which)
 696{
 697        switch (which) {
 698        case V4L2_SUBDEV_FORMAT_TRY:
 699                return v4l2_subdev_get_try_format(&priv->sd, cfg, pad);
 700        case V4L2_SUBDEV_FORMAT_ACTIVE:
 701                return &priv->fmt[pad];
 702        default:
 703                return NULL;
 704        }
 705}
 706
 707static int max9286_set_fmt(struct v4l2_subdev *sd,
 708                           struct v4l2_subdev_pad_config *cfg,
 709                           struct v4l2_subdev_format *format)
 710{
 711        struct max9286_priv *priv = sd_to_max9286(sd);
 712        struct v4l2_mbus_framefmt *cfg_fmt;
 713
 714        if (format->pad == MAX9286_SRC_PAD)
 715                return -EINVAL;
 716
 717        /* Refuse non YUV422 formats as we hardcode DT to 8 bit YUV422 */
 718        switch (format->format.code) {
 719        case MEDIA_BUS_FMT_UYVY8_1X16:
 720        case MEDIA_BUS_FMT_VYUY8_1X16:
 721        case MEDIA_BUS_FMT_YUYV8_1X16:
 722        case MEDIA_BUS_FMT_YVYU8_1X16:
 723                break;
 724        default:
 725                format->format.code = MEDIA_BUS_FMT_UYVY8_1X16;
 726                break;
 727        }
 728
 729        cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
 730        if (!cfg_fmt)
 731                return -EINVAL;
 732
 733        mutex_lock(&priv->mutex);
 734        *cfg_fmt = format->format;
 735        mutex_unlock(&priv->mutex);
 736
 737        return 0;
 738}
 739
 740static int max9286_get_fmt(struct v4l2_subdev *sd,
 741                           struct v4l2_subdev_pad_config *cfg,
 742                           struct v4l2_subdev_format *format)
 743{
 744        struct max9286_priv *priv = sd_to_max9286(sd);
 745        struct v4l2_mbus_framefmt *cfg_fmt;
 746        unsigned int pad = format->pad;
 747
 748        /*
 749         * Multiplexed Stream Support: Support link validation by returning the
 750         * format of the first bound link. All links must have the same format,
 751         * as we do not support mixing and matching of cameras connected to the
 752         * max9286.
 753         */
 754        if (pad == MAX9286_SRC_PAD)
 755                pad = __ffs(priv->bound_sources);
 756
 757        cfg_fmt = max9286_get_pad_format(priv, cfg, pad, format->which);
 758        if (!cfg_fmt)
 759                return -EINVAL;
 760
 761        mutex_lock(&priv->mutex);
 762        format->format = *cfg_fmt;
 763        mutex_unlock(&priv->mutex);
 764
 765        return 0;
 766}
 767
 768static const struct v4l2_subdev_video_ops max9286_video_ops = {
 769        .s_stream       = max9286_s_stream,
 770};
 771
 772static const struct v4l2_subdev_pad_ops max9286_pad_ops = {
 773        .enum_mbus_code = max9286_enum_mbus_code,
 774        .get_fmt        = max9286_get_fmt,
 775        .set_fmt        = max9286_set_fmt,
 776};
 777
 778static const struct v4l2_subdev_ops max9286_subdev_ops = {
 779        .video          = &max9286_video_ops,
 780        .pad            = &max9286_pad_ops,
 781};
 782
 783static void max9286_init_format(struct v4l2_mbus_framefmt *fmt)
 784{
 785        fmt->width              = 1280;
 786        fmt->height             = 800;
 787        fmt->code               = MEDIA_BUS_FMT_UYVY8_1X16;
 788        fmt->colorspace         = V4L2_COLORSPACE_SRGB;
 789        fmt->field              = V4L2_FIELD_NONE;
 790        fmt->ycbcr_enc          = V4L2_YCBCR_ENC_DEFAULT;
 791        fmt->quantization       = V4L2_QUANTIZATION_DEFAULT;
 792        fmt->xfer_func          = V4L2_XFER_FUNC_DEFAULT;
 793}
 794
 795static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
 796{
 797        struct v4l2_mbus_framefmt *format;
 798        unsigned int i;
 799
 800        for (i = 0; i < MAX9286_N_SINKS; i++) {
 801                format = v4l2_subdev_get_try_format(subdev, fh->pad, i);
 802                max9286_init_format(format);
 803        }
 804
 805        return 0;
 806}
 807
 808static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = {
 809        .open = max9286_open,
 810};
 811
 812static int max9286_s_ctrl(struct v4l2_ctrl *ctrl)
 813{
 814        switch (ctrl->id) {
 815        case V4L2_CID_PIXEL_RATE:
 816                return 0;
 817        default:
 818                return -EINVAL;
 819        }
 820}
 821
 822static const struct v4l2_ctrl_ops max9286_ctrl_ops = {
 823        .s_ctrl = max9286_s_ctrl,
 824};
 825
 826static int max9286_v4l2_register(struct max9286_priv *priv)
 827{
 828        struct device *dev = &priv->client->dev;
 829        struct fwnode_handle *ep;
 830        int ret;
 831        int i;
 832
 833        /* Register v4l2 async notifiers for connected Camera subdevices */
 834        ret = max9286_v4l2_notifier_register(priv);
 835        if (ret) {
 836                dev_err(dev, "Unable to register V4L2 async notifiers\n");
 837                return ret;
 838        }
 839
 840        /* Configure V4L2 for the MAX9286 itself */
 841
 842        for (i = 0; i < MAX9286_N_SINKS; i++)
 843                max9286_init_format(&priv->fmt[i]);
 844
 845        v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
 846        priv->sd.internal_ops = &max9286_subdev_internal_ops;
 847        priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 848
 849        v4l2_ctrl_handler_init(&priv->ctrls, 1);
 850        priv->pixelrate = v4l2_ctrl_new_std(&priv->ctrls,
 851                                            &max9286_ctrl_ops,
 852                                            V4L2_CID_PIXEL_RATE,
 853                                            1, INT_MAX, 1, 50000000);
 854
 855        priv->sd.ctrl_handler = &priv->ctrls;
 856        ret = priv->ctrls.error;
 857        if (ret)
 858                goto err_async;
 859
 860        priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
 861
 862        priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
 863        for (i = 0; i < MAX9286_SRC_PAD; i++)
 864                priv->pads[i].flags = MEDIA_PAD_FL_SINK;
 865        ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
 866                                     priv->pads);
 867        if (ret)
 868                goto err_async;
 869
 870        ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
 871                                             0, 0);
 872        if (!ep) {
 873                dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
 874                ret = -ENOENT;
 875                goto err_async;
 876        }
 877        priv->sd.fwnode = ep;
 878
 879        ret = v4l2_async_register_subdev(&priv->sd);
 880        if (ret < 0) {
 881                dev_err(dev, "Unable to register subdevice\n");
 882                goto err_put_node;
 883        }
 884
 885        return 0;
 886
 887err_put_node:
 888        fwnode_handle_put(ep);
 889err_async:
 890        max9286_v4l2_notifier_unregister(priv);
 891
 892        return ret;
 893}
 894
 895static void max9286_v4l2_unregister(struct max9286_priv *priv)
 896{
 897        fwnode_handle_put(priv->sd.fwnode);
 898        v4l2_async_unregister_subdev(&priv->sd);
 899        max9286_v4l2_notifier_unregister(priv);
 900}
 901
 902/* -----------------------------------------------------------------------------
 903 * Probe/Remove
 904 */
 905
 906static int max9286_setup(struct max9286_priv *priv)
 907{
 908        /*
 909         * Link ordering values for all enabled links combinations. Orders must
 910         * be assigned sequentially from 0 to the number of enabled links
 911         * without leaving any hole for disabled links. We thus assign orders to
 912         * enabled links first, and use the remaining order values for disabled
 913         * links are all links must have a different order value;
 914         */
 915        static const u8 link_order[] = {
 916                (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
 917                (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
 918                (3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
 919                (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
 920                (3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
 921                (3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
 922                (3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
 923                (3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
 924                (0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
 925                (1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
 926                (1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
 927                (2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
 928                (1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
 929                (2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
 930                (2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
 931                (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
 932        };
 933
 934        /*
 935         * Set the I2C bus speed.
 936         *
 937         * Enable I2C Local Acknowledge during the probe sequences of the camera
 938         * only. This should be disabled after the mux is initialised.
 939         */
 940        max9286_configure_i2c(priv, true);
 941
 942        /*
 943         * Reverse channel setup.
 944         *
 945         * - Enable custom reverse channel configuration (through register 0x3f)
 946         *   and set the first pulse length to 35 clock cycles.
 947         * - Increase the reverse channel amplitude to 170mV to accommodate the
 948         *   high threshold enabled by the serializer driver.
 949         */
 950        max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
 951        max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
 952                      MAX9286_REV_AMP_X);
 953        usleep_range(2000, 2500);
 954
 955        /*
 956         * Enable GMSL links, mask unused ones and autodetect link
 957         * used as CSI clock source.
 958         */
 959        max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
 960        max9286_write(priv, 0x0b, link_order[priv->route_mask]);
 961        max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
 962
 963        /*
 964         * Video format setup:
 965         * Disable CSI output, VC is set according to Link number.
 966         */
 967        max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
 968
 969        /* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
 970        max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
 971                      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
 972                      MAX9286_DATATYPE_YUV422_8BIT);
 973
 974        /* Automatic: FRAMESYNC taken from the slowest Link. */
 975        max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
 976                      MAX9286_FSYNCMETH_AUTO);
 977
 978        /* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
 979        max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
 980                      MAX9286_HVSRC_D14);
 981
 982        /*
 983         * The overlap window seems to provide additional validation by tracking
 984         * the delay between vsync and frame sync, generating an error if the
 985         * delay is bigger than the programmed window, though it's not yet clear
 986         * what value should be set.
 987         *
 988         * As it's an optional value and can be disabled, we do so by setting
 989         * a 0 overlap value.
 990         */
 991        max9286_write(priv, 0x63, 0);
 992        max9286_write(priv, 0x64, 0);
 993
 994        /*
 995         * Wait for 2ms to allow the link to resynchronize after the
 996         * configuration change.
 997         */
 998        usleep_range(2000, 5000);
 999
1000        return 0;
1001}
1002
1003static void max9286_gpio_set(struct gpio_chip *chip,
1004                             unsigned int offset, int value)
1005{
1006        struct max9286_priv *priv = gpiochip_get_data(chip);
1007
1008        if (value)
1009                priv->gpio_state |= BIT(offset);
1010        else
1011                priv->gpio_state &= ~BIT(offset);
1012
1013        max9286_write(priv, 0x0f, MAX9286_0X0F_RESERVED | priv->gpio_state);
1014}
1015
1016static int max9286_gpio_get(struct gpio_chip *chip, unsigned int offset)
1017{
1018        struct max9286_priv *priv = gpiochip_get_data(chip);
1019
1020        return priv->gpio_state & BIT(offset);
1021}
1022
1023static int max9286_register_gpio(struct max9286_priv *priv)
1024{
1025        struct device *dev = &priv->client->dev;
1026        struct gpio_chip *gpio = &priv->gpio;
1027        int ret;
1028
1029        /* Configure the GPIO */
1030        gpio->label = dev_name(dev);
1031        gpio->parent = dev;
1032        gpio->owner = THIS_MODULE;
1033        gpio->of_node = dev->of_node;
1034        gpio->ngpio = 2;
1035        gpio->base = -1;
1036        gpio->set = max9286_gpio_set;
1037        gpio->get = max9286_gpio_get;
1038        gpio->can_sleep = true;
1039
1040        /* GPIO values default to high */
1041        priv->gpio_state = BIT(0) | BIT(1);
1042
1043        ret = devm_gpiochip_add_data(dev, gpio, priv);
1044        if (ret)
1045                dev_err(dev, "Unable to create gpio_chip\n");
1046
1047        return ret;
1048}
1049
1050static int max9286_init(struct device *dev)
1051{
1052        struct max9286_priv *priv;
1053        struct i2c_client *client;
1054        int ret;
1055
1056        client = to_i2c_client(dev);
1057        priv = i2c_get_clientdata(client);
1058
1059        /* Enable the bus power. */
1060        ret = regulator_enable(priv->regulator);
1061        if (ret < 0) {
1062                dev_err(&client->dev, "Unable to turn PoC on\n");
1063                return ret;
1064        }
1065
1066        ret = max9286_setup(priv);
1067        if (ret) {
1068                dev_err(dev, "Unable to setup max9286\n");
1069                goto err_regulator;
1070        }
1071
1072        /*
1073         * Register all V4L2 interactions for the MAX9286 and notifiers for
1074         * any subdevices connected.
1075         */
1076        ret = max9286_v4l2_register(priv);
1077        if (ret) {
1078                dev_err(dev, "Failed to register with V4L2\n");
1079                goto err_regulator;
1080        }
1081
1082        ret = max9286_i2c_mux_init(priv);
1083        if (ret) {
1084                dev_err(dev, "Unable to initialize I2C multiplexer\n");
1085                goto err_v4l2_register;
1086        }
1087
1088        /* Leave the mux channels disabled until they are selected. */
1089        max9286_i2c_mux_close(priv);
1090
1091        return 0;
1092
1093err_v4l2_register:
1094        max9286_v4l2_unregister(priv);
1095err_regulator:
1096        regulator_disable(priv->regulator);
1097
1098        return ret;
1099}
1100
1101static void max9286_cleanup_dt(struct max9286_priv *priv)
1102{
1103        struct max9286_source *source;
1104
1105        for_each_source(priv, source) {
1106                fwnode_handle_put(source->fwnode);
1107                source->fwnode = NULL;
1108        }
1109}
1110
1111static int max9286_parse_dt(struct max9286_priv *priv)
1112{
1113        struct device *dev = &priv->client->dev;
1114        struct device_node *i2c_mux;
1115        struct device_node *node = NULL;
1116        unsigned int i2c_mux_mask = 0;
1117
1118        /* Balance the of_node_put() performed by of_find_node_by_name(). */
1119        of_node_get(dev->of_node);
1120        i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux");
1121        if (!i2c_mux) {
1122                dev_err(dev, "Failed to find i2c-mux node\n");
1123                return -EINVAL;
1124        }
1125
1126        /* Identify which i2c-mux channels are enabled */
1127        for_each_child_of_node(i2c_mux, node) {
1128                u32 id = 0;
1129
1130                of_property_read_u32(node, "reg", &id);
1131                if (id >= MAX9286_NUM_GMSL)
1132                        continue;
1133
1134                if (!of_device_is_available(node)) {
1135                        dev_dbg(dev, "Skipping disabled I2C bus port %u\n", id);
1136                        continue;
1137                }
1138
1139                i2c_mux_mask |= BIT(id);
1140        }
1141        of_node_put(node);
1142        of_node_put(i2c_mux);
1143
1144        /* Parse the endpoints */
1145        for_each_endpoint_of_node(dev->of_node, node) {
1146                struct max9286_source *source;
1147                struct of_endpoint ep;
1148
1149                of_graph_parse_endpoint(node, &ep);
1150                dev_dbg(dev, "Endpoint %pOF on port %d",
1151                        ep.local_node, ep.port);
1152
1153                if (ep.port > MAX9286_NUM_GMSL) {
1154                        dev_err(dev, "Invalid endpoint %s on port %d",
1155                                of_node_full_name(ep.local_node), ep.port);
1156                        continue;
1157                }
1158
1159                /* For the source endpoint just parse the bus configuration. */
1160                if (ep.port == MAX9286_SRC_PAD) {
1161                        struct v4l2_fwnode_endpoint vep = {
1162                                .bus_type = V4L2_MBUS_CSI2_DPHY
1163                        };
1164                        int ret;
1165
1166                        ret = v4l2_fwnode_endpoint_parse(
1167                                        of_fwnode_handle(node), &vep);
1168                        if (ret) {
1169                                of_node_put(node);
1170                                return ret;
1171                        }
1172
1173                        priv->csi2_data_lanes =
1174                                vep.bus.mipi_csi2.num_data_lanes;
1175
1176                        continue;
1177                }
1178
1179                /* Skip if the corresponding GMSL link is unavailable. */
1180                if (!(i2c_mux_mask & BIT(ep.port)))
1181                        continue;
1182
1183                if (priv->sources[ep.port].fwnode) {
1184                        dev_err(dev,
1185                                "Multiple port endpoints are not supported: %d",
1186                                ep.port);
1187
1188                        continue;
1189                }
1190
1191                source = &priv->sources[ep.port];
1192                source->fwnode = fwnode_graph_get_remote_endpoint(
1193                                                of_fwnode_handle(node));
1194                if (!source->fwnode) {
1195                        dev_err(dev,
1196                                "Endpoint %pOF has no remote endpoint connection\n",
1197                                ep.local_node);
1198
1199                        continue;
1200                }
1201
1202                priv->source_mask |= BIT(ep.port);
1203                priv->nsources++;
1204        }
1205        of_node_put(node);
1206
1207        priv->route_mask = priv->source_mask;
1208
1209        return 0;
1210}
1211
1212static int max9286_probe(struct i2c_client *client)
1213{
1214        struct max9286_priv *priv;
1215        int ret;
1216
1217        priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
1218        if (!priv)
1219                return -ENOMEM;
1220
1221        mutex_init(&priv->mutex);
1222
1223        priv->client = client;
1224        i2c_set_clientdata(client, priv);
1225
1226        priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable",
1227                                                   GPIOD_OUT_HIGH);
1228        if (IS_ERR(priv->gpiod_pwdn))
1229                return PTR_ERR(priv->gpiod_pwdn);
1230
1231        gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn");
1232        gpiod_set_value_cansleep(priv->gpiod_pwdn, 1);
1233
1234        /* Wait at least 4ms before the I2C lines latch to the address */
1235        if (priv->gpiod_pwdn)
1236                usleep_range(4000, 5000);
1237
1238        /*
1239         * The MAX9286 starts by default with all ports enabled, we disable all
1240         * ports early to ensure that all channels are disabled if we error out
1241         * and keep the bus consistent.
1242         */
1243        max9286_i2c_mux_close(priv);
1244
1245        /*
1246         * The MAX9286 initialises with auto-acknowledge enabled by default.
1247         * This can be invasive to other transactions on the same bus, so
1248         * disable it early. It will be enabled only as and when needed.
1249         */
1250        max9286_configure_i2c(priv, false);
1251
1252        ret = max9286_register_gpio(priv);
1253        if (ret)
1254                goto err_powerdown;
1255
1256        priv->regulator = devm_regulator_get(&client->dev, "poc");
1257        if (IS_ERR(priv->regulator)) {
1258                if (PTR_ERR(priv->regulator) != -EPROBE_DEFER)
1259                        dev_err(&client->dev,
1260                                "Unable to get PoC regulator (%ld)\n",
1261                                PTR_ERR(priv->regulator));
1262                ret = PTR_ERR(priv->regulator);
1263                goto err_powerdown;
1264        }
1265
1266        ret = max9286_parse_dt(priv);
1267        if (ret)
1268                goto err_powerdown;
1269
1270        ret = max9286_init(&client->dev);
1271        if (ret < 0)
1272                goto err_cleanup_dt;
1273
1274        return 0;
1275
1276err_cleanup_dt:
1277        max9286_cleanup_dt(priv);
1278err_powerdown:
1279        gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
1280
1281        return ret;
1282}
1283
1284static int max9286_remove(struct i2c_client *client)
1285{
1286        struct max9286_priv *priv = i2c_get_clientdata(client);
1287
1288        i2c_mux_del_adapters(priv->mux);
1289
1290        max9286_v4l2_unregister(priv);
1291
1292        regulator_disable(priv->regulator);
1293
1294        gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
1295
1296        max9286_cleanup_dt(priv);
1297
1298        return 0;
1299}
1300
1301static const struct of_device_id max9286_dt_ids[] = {
1302        { .compatible = "maxim,max9286" },
1303        {},
1304};
1305MODULE_DEVICE_TABLE(of, max9286_dt_ids);
1306
1307static struct i2c_driver max9286_i2c_driver = {
1308        .driver = {
1309                .name           = "max9286",
1310                .of_match_table = of_match_ptr(max9286_dt_ids),
1311        },
1312        .probe_new      = max9286_probe,
1313        .remove         = max9286_remove,
1314};
1315
1316module_i2c_driver(max9286_i2c_driver);
1317
1318MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver");
1319MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov");
1320MODULE_LICENSE("GPL");
1321