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9#include <linux/module.h>
10#include <linux/kernel.h>
11#include <linux/types.h>
12#include <linux/errno.h>
13#include <linux/bug.h>
14#include <linux/interrupt.h>
15#include <linux/device.h>
16#include <linux/pm_runtime.h>
17#include <linux/list.h>
18#include <linux/slab.h>
19
20#include <linux/videodev2.h>
21#include <media/v4l2-device.h>
22#include <media/v4l2-ioctl.h>
23#include <media/v4l2-mem2mem.h>
24#include <media/v4l2-rect.h>
25#include <media/videobuf2-v4l2.h>
26#include <media/videobuf2-dma-contig.h>
27
28#include "common.h"
29#include "fimc-core.h"
30#include "fimc-reg.h"
31#include "media-dev.h"
32
33static int fimc_capture_hw_init(struct fimc_dev *fimc)
34{
35 struct fimc_source_info *si = &fimc->vid_cap.source_config;
36 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
37 int ret;
38 unsigned long flags;
39
40 if (ctx == NULL || ctx->s_frame.fmt == NULL)
41 return -EINVAL;
42
43 if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
44 ret = fimc_hw_camblk_cfg_writeback(fimc);
45 if (ret < 0)
46 return ret;
47 }
48
49 spin_lock_irqsave(&fimc->slock, flags);
50 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
51 fimc_set_yuv_order(ctx);
52
53 fimc_hw_set_camera_polarity(fimc, si);
54 fimc_hw_set_camera_type(fimc, si);
55 fimc_hw_set_camera_source(fimc, si);
56 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
57
58 ret = fimc_set_scaler_info(ctx);
59 if (!ret) {
60 fimc_hw_set_input_path(ctx);
61 fimc_hw_set_prescaler(ctx);
62 fimc_hw_set_mainscaler(ctx);
63 fimc_hw_set_target_format(ctx);
64 fimc_hw_set_rotation(ctx);
65 fimc_hw_set_effect(ctx);
66 fimc_hw_set_output_path(ctx);
67 fimc_hw_set_out_dma(ctx);
68 if (fimc->drv_data->alpha_color)
69 fimc_hw_set_rgb_alpha(ctx);
70 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
71 }
72 spin_unlock_irqrestore(&fimc->slock, flags);
73 return ret;
74}
75
76
77
78
79
80
81
82
83
84static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
85{
86 struct fimc_vid_cap *cap = &fimc->vid_cap;
87 struct fimc_vid_buffer *buf;
88 unsigned long flags;
89 bool streaming;
90
91 spin_lock_irqsave(&fimc->slock, flags);
92 streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
93
94 fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
95 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
96 if (suspend)
97 fimc->state |= (1 << ST_CAPT_SUSPENDED);
98 else
99 fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
100
101
102 while (!suspend && !list_empty(&cap->pending_buf_q)) {
103 buf = fimc_pending_queue_pop(cap);
104 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
105 }
106
107 while (!list_empty(&cap->active_buf_q)) {
108 buf = fimc_active_queue_pop(cap);
109 if (suspend)
110 fimc_pending_queue_add(cap, buf);
111 else
112 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
113 }
114
115 fimc_hw_reset(fimc);
116 cap->buf_index = 0;
117
118 spin_unlock_irqrestore(&fimc->slock, flags);
119
120 if (streaming)
121 return fimc_pipeline_call(&cap->ve, set_stream, 0);
122 else
123 return 0;
124}
125
126static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
127{
128 unsigned long flags;
129
130 if (!fimc_capture_active(fimc))
131 return 0;
132
133 spin_lock_irqsave(&fimc->slock, flags);
134 set_bit(ST_CAPT_SHUT, &fimc->state);
135 fimc_deactivate_capture(fimc);
136 spin_unlock_irqrestore(&fimc->slock, flags);
137
138 wait_event_timeout(fimc->irq_queue,
139 !test_bit(ST_CAPT_SHUT, &fimc->state),
140 (2*HZ/10));
141
142 return fimc_capture_state_cleanup(fimc, suspend);
143}
144
145
146
147
148
149
150
151
152
153static int fimc_capture_config_update(struct fimc_ctx *ctx)
154{
155 struct fimc_dev *fimc = ctx->fimc_dev;
156 int ret;
157
158 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
159
160 ret = fimc_set_scaler_info(ctx);
161 if (ret)
162 return ret;
163
164 fimc_hw_set_prescaler(ctx);
165 fimc_hw_set_mainscaler(ctx);
166 fimc_hw_set_target_format(ctx);
167 fimc_hw_set_rotation(ctx);
168 fimc_hw_set_effect(ctx);
169 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
170 fimc_hw_set_out_dma(ctx);
171 if (fimc->drv_data->alpha_color)
172 fimc_hw_set_rgb_alpha(ctx);
173
174 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
175 return ret;
176}
177
178void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
179{
180 struct fimc_vid_cap *cap = &fimc->vid_cap;
181 struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
182 struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
183 struct fimc_frame *f = &cap->ctx->d_frame;
184 struct fimc_vid_buffer *v_buf;
185
186 if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
187 wake_up(&fimc->irq_queue);
188 goto done;
189 }
190
191 if (!list_empty(&cap->active_buf_q) &&
192 test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
193 v_buf = fimc_active_queue_pop(cap);
194
195 v_buf->vb.vb2_buf.timestamp = ktime_get_ns();
196 v_buf->vb.sequence = cap->frame_count++;
197
198 vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
199 }
200
201 if (!list_empty(&cap->pending_buf_q)) {
202
203 v_buf = fimc_pending_queue_pop(cap);
204 fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
205 v_buf->index = cap->buf_index;
206
207
208 fimc_active_queue_add(cap, v_buf);
209
210 dbg("next frame: %d, done frame: %d",
211 fimc_hw_get_frame_index(fimc), v_buf->index);
212
213 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
214 cap->buf_index = 0;
215 }
216
217
218
219
220 if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
221 unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
222 unsigned int size = f->payload[plane];
223 s32 index = fimc_hw_get_frame_index(fimc);
224 void *vaddr;
225
226 list_for_each_entry(v_buf, &cap->active_buf_q, list) {
227 if (v_buf->index != index)
228 continue;
229 vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);
230 v4l2_subdev_call(csis, video, s_rx_buffer,
231 vaddr, &size);
232 break;
233 }
234 }
235
236 if (cap->active_buf_cnt == 0) {
237 if (deq_buf)
238 clear_bit(ST_CAPT_RUN, &fimc->state);
239
240 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
241 cap->buf_index = 0;
242 } else {
243 set_bit(ST_CAPT_RUN, &fimc->state);
244 }
245
246 if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
247 fimc_capture_config_update(cap->ctx);
248done:
249 if (cap->active_buf_cnt == 1) {
250 fimc_deactivate_capture(fimc);
251 clear_bit(ST_CAPT_STREAM, &fimc->state);
252 }
253
254 dbg("frame: %d, active_buf_cnt: %d",
255 fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
256}
257
258
259static int start_streaming(struct vb2_queue *q, unsigned int count)
260{
261 struct fimc_ctx *ctx = q->drv_priv;
262 struct fimc_dev *fimc = ctx->fimc_dev;
263 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
264 int min_bufs;
265 int ret;
266
267 vid_cap->frame_count = 0;
268
269 ret = fimc_capture_hw_init(fimc);
270 if (ret) {
271 fimc_capture_state_cleanup(fimc, false);
272 return ret;
273 }
274
275 set_bit(ST_CAPT_PEND, &fimc->state);
276
277 min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
278
279 if (vid_cap->active_buf_cnt >= min_bufs &&
280 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
281 fimc_activate_capture(ctx);
282
283 if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
284 return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
285 }
286
287 return 0;
288}
289
290static void stop_streaming(struct vb2_queue *q)
291{
292 struct fimc_ctx *ctx = q->drv_priv;
293 struct fimc_dev *fimc = ctx->fimc_dev;
294
295 if (!fimc_capture_active(fimc))
296 return;
297
298 fimc_stop_capture(fimc, false);
299}
300
301int fimc_capture_suspend(struct fimc_dev *fimc)
302{
303 bool suspend = fimc_capture_busy(fimc);
304
305 int ret = fimc_stop_capture(fimc, suspend);
306 if (ret)
307 return ret;
308 return fimc_pipeline_call(&fimc->vid_cap.ve, close);
309}
310
311static void buffer_queue(struct vb2_buffer *vb);
312
313int fimc_capture_resume(struct fimc_dev *fimc)
314{
315 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
316 struct exynos_video_entity *ve = &vid_cap->ve;
317 struct fimc_vid_buffer *buf;
318 int i;
319
320 if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
321 return 0;
322
323 INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
324 vid_cap->buf_index = 0;
325 fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
326 fimc_capture_hw_init(fimc);
327
328 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
329
330 for (i = 0; i < vid_cap->reqbufs_count; i++) {
331 if (list_empty(&vid_cap->pending_buf_q))
332 break;
333 buf = fimc_pending_queue_pop(vid_cap);
334 buffer_queue(&buf->vb.vb2_buf);
335 }
336 return 0;
337
338}
339
340static int queue_setup(struct vb2_queue *vq,
341 unsigned int *num_buffers, unsigned int *num_planes,
342 unsigned int sizes[], struct device *alloc_devs[])
343{
344 struct fimc_ctx *ctx = vq->drv_priv;
345 struct fimc_frame *frame = &ctx->d_frame;
346 struct fimc_fmt *fmt = frame->fmt;
347 unsigned long wh = frame->f_width * frame->f_height;
348 int i;
349
350 if (fmt == NULL)
351 return -EINVAL;
352
353 if (*num_planes) {
354 if (*num_planes != fmt->memplanes)
355 return -EINVAL;
356 for (i = 0; i < *num_planes; i++)
357 if (sizes[i] < (wh * fmt->depth[i]) / 8)
358 return -EINVAL;
359 return 0;
360 }
361
362 *num_planes = fmt->memplanes;
363
364 for (i = 0; i < fmt->memplanes; i++) {
365 unsigned int size = (wh * fmt->depth[i]) / 8;
366
367 if (fimc_fmt_is_user_defined(fmt->color))
368 sizes[i] = frame->payload[i];
369 else
370 sizes[i] = max_t(u32, size, frame->payload[i]);
371 }
372
373 return 0;
374}
375
376static int buffer_prepare(struct vb2_buffer *vb)
377{
378 struct vb2_queue *vq = vb->vb2_queue;
379 struct fimc_ctx *ctx = vq->drv_priv;
380 int i;
381
382 if (ctx->d_frame.fmt == NULL)
383 return -EINVAL;
384
385 for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
386 unsigned long size = ctx->d_frame.payload[i];
387
388 if (vb2_plane_size(vb, i) < size) {
389 v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
390 "User buffer too small (%ld < %ld)\n",
391 vb2_plane_size(vb, i), size);
392 return -EINVAL;
393 }
394 vb2_set_plane_payload(vb, i, size);
395 }
396
397 return 0;
398}
399
400static void buffer_queue(struct vb2_buffer *vb)
401{
402 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
403 struct fimc_vid_buffer *buf
404 = container_of(vbuf, struct fimc_vid_buffer, vb);
405 struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
406 struct fimc_dev *fimc = ctx->fimc_dev;
407 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
408 struct exynos_video_entity *ve = &vid_cap->ve;
409 unsigned long flags;
410 int min_bufs;
411
412 spin_lock_irqsave(&fimc->slock, flags);
413 fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->paddr);
414
415 if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
416 !test_bit(ST_CAPT_STREAM, &fimc->state) &&
417 vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
418
419 int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
420 vid_cap->buf_index;
421
422 fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
423 buf->index = vid_cap->buf_index;
424 fimc_active_queue_add(vid_cap, buf);
425
426 if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
427 vid_cap->buf_index = 0;
428 } else {
429 fimc_pending_queue_add(vid_cap, buf);
430 }
431
432 min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
433
434
435 if (vb2_is_streaming(&vid_cap->vbq) &&
436 vid_cap->active_buf_cnt >= min_bufs &&
437 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
438 int ret;
439
440 fimc_activate_capture(ctx);
441 spin_unlock_irqrestore(&fimc->slock, flags);
442
443 if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
444 return;
445
446 ret = fimc_pipeline_call(ve, set_stream, 1);
447 if (ret < 0)
448 v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
449 return;
450 }
451 spin_unlock_irqrestore(&fimc->slock, flags);
452}
453
454static const struct vb2_ops fimc_capture_qops = {
455 .queue_setup = queue_setup,
456 .buf_prepare = buffer_prepare,
457 .buf_queue = buffer_queue,
458 .wait_prepare = vb2_ops_wait_prepare,
459 .wait_finish = vb2_ops_wait_finish,
460 .start_streaming = start_streaming,
461 .stop_streaming = stop_streaming,
462};
463
464static int fimc_capture_set_default_format(struct fimc_dev *fimc);
465
466static int fimc_capture_open(struct file *file)
467{
468 struct fimc_dev *fimc = video_drvdata(file);
469 struct fimc_vid_cap *vc = &fimc->vid_cap;
470 struct exynos_video_entity *ve = &vc->ve;
471 int ret = -EBUSY;
472
473 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
474
475 mutex_lock(&fimc->lock);
476
477 if (fimc_m2m_active(fimc))
478 goto unlock;
479
480 set_bit(ST_CAPT_BUSY, &fimc->state);
481 ret = pm_runtime_get_sync(&fimc->pdev->dev);
482 if (ret < 0) {
483 pm_runtime_put_sync(&fimc->pdev->dev);
484 goto unlock;
485 }
486
487 ret = v4l2_fh_open(file);
488 if (ret) {
489 pm_runtime_put_sync(&fimc->pdev->dev);
490 goto unlock;
491 }
492
493 if (v4l2_fh_is_singular_file(file)) {
494 fimc_md_graph_lock(ve);
495
496 ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
497
498 if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) {
499
500
501
502
503 fimc_ctrls_delete(vc->ctx);
504
505 ret = fimc_ctrls_create(vc->ctx);
506 if (ret == 0)
507 vc->inh_sensor_ctrls = false;
508 }
509 if (ret == 0)
510 ve->vdev.entity.use_count++;
511
512 fimc_md_graph_unlock(ve);
513
514 if (ret == 0)
515 ret = fimc_capture_set_default_format(fimc);
516
517 if (ret < 0) {
518 clear_bit(ST_CAPT_BUSY, &fimc->state);
519 pm_runtime_put_sync(&fimc->pdev->dev);
520 v4l2_fh_release(file);
521 }
522 }
523unlock:
524 mutex_unlock(&fimc->lock);
525 return ret;
526}
527
528static int fimc_capture_release(struct file *file)
529{
530 struct fimc_dev *fimc = video_drvdata(file);
531 struct fimc_vid_cap *vc = &fimc->vid_cap;
532 bool close = v4l2_fh_is_singular_file(file);
533 int ret;
534
535 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
536
537 mutex_lock(&fimc->lock);
538
539 if (close && vc->streaming) {
540 media_pipeline_stop(&vc->ve.vdev.entity);
541 vc->streaming = false;
542 }
543
544 ret = _vb2_fop_release(file, NULL);
545
546 if (close) {
547 clear_bit(ST_CAPT_BUSY, &fimc->state);
548 fimc_pipeline_call(&vc->ve, close);
549 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
550
551 fimc_md_graph_lock(&vc->ve);
552 vc->ve.vdev.entity.use_count--;
553 fimc_md_graph_unlock(&vc->ve);
554 }
555
556 pm_runtime_put_sync(&fimc->pdev->dev);
557 mutex_unlock(&fimc->lock);
558
559 return ret;
560}
561
562static const struct v4l2_file_operations fimc_capture_fops = {
563 .owner = THIS_MODULE,
564 .open = fimc_capture_open,
565 .release = fimc_capture_release,
566 .poll = vb2_fop_poll,
567 .unlocked_ioctl = video_ioctl2,
568 .mmap = vb2_fop_mmap,
569};
570
571
572
573
574
575static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
576 u32 *width, u32 *height,
577 u32 *code, u32 *fourcc, int pad)
578{
579 bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
580 struct fimc_dev *fimc = ctx->fimc_dev;
581 const struct fimc_variant *var = fimc->variant;
582 const struct fimc_pix_limit *pl = var->pix_limit;
583 struct fimc_frame *dst = &ctx->d_frame;
584 u32 depth, min_w, max_w, min_h, align_h = 3;
585 u32 mask = FMT_FLAGS_CAM;
586 struct fimc_fmt *ffmt;
587
588
589 if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
590 fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
591 *code = ctx->s_frame.fmt->mbus_code;
592
593 if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
594 mask |= FMT_FLAGS_M2M;
595
596 if (pad == FIMC_SD_PAD_SINK_FIFO)
597 mask = FMT_FLAGS_WRITEBACK;
598
599 ffmt = fimc_find_format(fourcc, code, mask, 0);
600 if (WARN_ON(!ffmt))
601 return NULL;
602
603 if (code)
604 *code = ffmt->mbus_code;
605 if (fourcc)
606 *fourcc = ffmt->fourcc;
607
608 if (pad != FIMC_SD_PAD_SOURCE) {
609 max_w = fimc_fmt_is_user_defined(ffmt->color) ?
610 pl->scaler_dis_w : pl->scaler_en_w;
611
612 v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
613 height, max_t(u32, *height, 32),
614 FIMC_CAMIF_MAX_HEIGHT,
615 fimc_fmt_is_user_defined(ffmt->color) ?
616 3 : 1,
617 0);
618 return ffmt;
619 }
620
621 if (fimc_fmt_is_user_defined(ffmt->color)) {
622 *width = ctx->s_frame.f_width;
623 *height = ctx->s_frame.f_height;
624 return ffmt;
625 }
626
627 max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
628 if (ctx->state & FIMC_COMPOSE) {
629 min_w = dst->offs_h + dst->width;
630 min_h = dst->offs_v + dst->height;
631 } else {
632 min_w = var->min_out_pixsize;
633 min_h = var->min_out_pixsize;
634 }
635 if (var->min_vsize_align == 1 && !rotation)
636 align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
637
638 depth = fimc_get_format_depth(ffmt);
639 v4l_bound_align_image(width, min_w, max_w,
640 ffs(var->min_out_pixsize) - 1,
641 height, min_h, FIMC_CAMIF_MAX_HEIGHT,
642 align_h,
643 64/(ALIGN(depth, 8)));
644
645 dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
646 pad, code ? *code : 0, *width, *height,
647 dst->f_width, dst->f_height);
648
649 return ffmt;
650}
651
652static void fimc_capture_try_selection(struct fimc_ctx *ctx,
653 struct v4l2_rect *r,
654 int target)
655{
656 bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
657 struct fimc_dev *fimc = ctx->fimc_dev;
658 const struct fimc_variant *var = fimc->variant;
659 const struct fimc_pix_limit *pl = var->pix_limit;
660 struct fimc_frame *sink = &ctx->s_frame;
661 u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
662 u32 align_sz = 0, align_h = 4;
663 u32 max_sc_h, max_sc_v;
664
665
666 if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
667 r->width = sink->f_width;
668 r->height = sink->f_height;
669 r->left = r->top = 0;
670 return;
671 }
672 if (target == V4L2_SEL_TGT_COMPOSE) {
673 u32 tmp_min_h = ffs(sink->width) - 3;
674 u32 tmp_min_v = ffs(sink->height) - 1;
675
676 if (ctx->rotation != 90 && ctx->rotation != 270)
677 align_h = 1;
678 max_sc_h = min(SCALER_MAX_HRATIO, 1 << tmp_min_h);
679 max_sc_v = min(SCALER_MAX_VRATIO, 1 << tmp_min_v);
680 min_sz = var->min_out_pixsize;
681 } else {
682 u32 depth = fimc_get_format_depth(sink->fmt);
683 align_sz = 64/ALIGN(depth, 8);
684 min_sz = var->min_inp_pixsize;
685 min_w = min_h = min_sz;
686 max_sc_h = max_sc_v = 1;
687 }
688
689
690
691
692
693
694
695
696
697 max_w = min_t(u32,
698 rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
699 rotate ? sink->f_height : sink->f_width);
700 max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
701
702 if (target == V4L2_SEL_TGT_COMPOSE) {
703 min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
704 min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
705 if (rotate) {
706 swap(max_sc_h, max_sc_v);
707 swap(min_w, min_h);
708 }
709 }
710 v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
711 &r->height, min_h, max_h, align_h,
712 align_sz);
713
714 r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
715 r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
716 r->left = round_down(r->left, var->hor_offs_align);
717
718 dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
719 target, r->left, r->top, r->width, r->height,
720 sink->f_width, sink->f_height);
721}
722
723
724
725
726static int fimc_cap_querycap(struct file *file, void *priv,
727 struct v4l2_capability *cap)
728{
729 struct fimc_dev *fimc = video_drvdata(file);
730
731 __fimc_vidioc_querycap(&fimc->pdev->dev, cap);
732 return 0;
733}
734
735static int fimc_cap_enum_fmt(struct file *file, void *priv,
736 struct v4l2_fmtdesc *f)
737{
738 struct fimc_fmt *fmt;
739
740 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
741 f->index);
742 if (!fmt)
743 return -EINVAL;
744 f->pixelformat = fmt->fourcc;
745 return 0;
746}
747
748static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
749{
750 struct media_pad *pad = &me->pads[0];
751
752 while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
753 pad = media_entity_remote_pad(pad);
754 if (!pad)
755 break;
756 me = pad->entity;
757 pad = &me->pads[0];
758 }
759
760 return me;
761}
762
763
764
765
766
767
768
769
770
771static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
772 struct v4l2_mbus_framefmt *tfmt,
773 struct fimc_fmt **fmt_id,
774 bool set)
775{
776 struct fimc_dev *fimc = ctx->fimc_dev;
777 struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
778 struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
779 struct v4l2_subdev_format sfmt;
780 struct v4l2_mbus_framefmt *mf = &sfmt.format;
781 struct media_entity *me;
782 struct fimc_fmt *ffmt;
783 struct media_pad *pad;
784 int ret, i = 1;
785 u32 fcc;
786
787 if (WARN_ON(!sd || !tfmt))
788 return -EINVAL;
789
790 memset(&sfmt, 0, sizeof(sfmt));
791 sfmt.format = *tfmt;
792 sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
793
794 me = fimc_pipeline_get_head(&sd->entity);
795
796 while (1) {
797 ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
798 FMT_FLAGS_CAM, i++);
799 if (ffmt == NULL) {
800
801
802
803
804 return -EINVAL;
805 }
806 mf->code = tfmt->code = ffmt->mbus_code;
807
808
809 while (me != &fimc->vid_cap.subdev.entity) {
810 sd = media_entity_to_v4l2_subdev(me);
811
812 sfmt.pad = 0;
813 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
814 if (ret)
815 return ret;
816
817 if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
818 sfmt.pad = me->num_pads - 1;
819 mf->code = tfmt->code;
820 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
821 &sfmt);
822 if (ret)
823 return ret;
824 }
825
826 pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
827 if (!pad)
828 return -EINVAL;
829 me = pad->entity;
830 }
831
832 if (mf->code != tfmt->code)
833 continue;
834
835 fcc = ffmt->fourcc;
836 tfmt->width = mf->width;
837 tfmt->height = mf->height;
838 ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
839 NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
840 ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
841 NULL, &fcc, FIMC_SD_PAD_SOURCE);
842 if (ffmt && ffmt->mbus_code)
843 mf->code = ffmt->mbus_code;
844 if (mf->width != tfmt->width || mf->height != tfmt->height)
845 continue;
846 tfmt->code = mf->code;
847 break;
848 }
849
850 if (fmt_id && ffmt)
851 *fmt_id = ffmt;
852 *tfmt = *mf;
853
854 return 0;
855}
856
857
858
859
860
861
862
863
864
865
866static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
867 struct v4l2_plane_pix_format *plane_fmt,
868 unsigned int num_planes, bool try)
869{
870 struct v4l2_mbus_frame_desc fd;
871 int i, ret;
872 int pad;
873
874 for (i = 0; i < num_planes; i++)
875 fd.entry[i].length = plane_fmt[i].sizeimage;
876
877 pad = sensor->entity.num_pads - 1;
878 if (try)
879 ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
880 else
881 ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
882
883 if (ret < 0)
884 return ret;
885
886 if (num_planes != fd.num_entries)
887 return -EINVAL;
888
889 for (i = 0; i < num_planes; i++)
890 plane_fmt[i].sizeimage = fd.entry[i].length;
891
892 if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
893 v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
894 fd.entry[0].length);
895
896 return -EINVAL;
897 }
898
899 return 0;
900}
901
902static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
903 struct v4l2_format *f)
904{
905 struct fimc_dev *fimc = video_drvdata(file);
906
907 __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
908 return 0;
909}
910
911
912
913
914
915
916static int __video_try_or_set_format(struct fimc_dev *fimc,
917 struct v4l2_format *f, bool try,
918 struct fimc_fmt **inp_fmt,
919 struct fimc_fmt **out_fmt)
920{
921 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
922 struct fimc_vid_cap *vc = &fimc->vid_cap;
923 struct exynos_video_entity *ve = &vc->ve;
924 struct fimc_ctx *ctx = vc->ctx;
925 unsigned int width = 0, height = 0;
926 int ret = 0;
927
928
929 if (fimc_jpeg_fourcc(pix->pixelformat)) {
930 fimc_capture_try_format(ctx, &pix->width, &pix->height,
931 NULL, &pix->pixelformat,
932 FIMC_SD_PAD_SINK_CAM);
933 if (try) {
934 width = pix->width;
935 height = pix->height;
936 } else {
937 ctx->s_frame.f_width = pix->width;
938 ctx->s_frame.f_height = pix->height;
939 }
940 }
941
942
943 *out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
944 NULL, &pix->pixelformat,
945 FIMC_SD_PAD_SOURCE);
946 if (*out_fmt == NULL)
947 return -EINVAL;
948
949
950 if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
951 pix->width = width;
952 pix->height = height;
953 }
954
955
956 if (!vc->user_subdev_api) {
957 struct v4l2_mbus_framefmt mbus_fmt;
958 struct v4l2_mbus_framefmt *mf;
959
960 mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
961
962 mf->code = (*out_fmt)->mbus_code;
963 mf->width = pix->width;
964 mf->height = pix->height;
965
966 fimc_md_graph_lock(ve);
967 ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
968 fimc_md_graph_unlock(ve);
969
970 if (ret < 0)
971 return ret;
972
973 pix->width = mf->width;
974 pix->height = mf->height;
975 }
976
977 fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
978
979 if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
980 struct v4l2_subdev *sensor;
981
982 fimc_md_graph_lock(ve);
983
984 sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
985 if (sensor)
986 fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
987 (*out_fmt)->memplanes, try);
988 else
989 ret = -EPIPE;
990
991 fimc_md_graph_unlock(ve);
992 }
993
994 return ret;
995}
996
997static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
998 struct v4l2_format *f)
999{
1000 struct fimc_dev *fimc = video_drvdata(file);
1001 struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
1002
1003 return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
1004}
1005
1006static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
1007 enum fimc_color_fmt color)
1008{
1009 bool jpeg = fimc_fmt_is_user_defined(color);
1010
1011 ctx->scaler.enabled = !jpeg;
1012 fimc_ctrls_activate(ctx, !jpeg);
1013
1014 if (jpeg)
1015 set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1016 else
1017 clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1018}
1019
1020static int __fimc_capture_set_format(struct fimc_dev *fimc,
1021 struct v4l2_format *f)
1022{
1023 struct fimc_vid_cap *vc = &fimc->vid_cap;
1024 struct fimc_ctx *ctx = vc->ctx;
1025 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
1026 struct fimc_frame *ff = &ctx->d_frame;
1027 struct fimc_fmt *inp_fmt = NULL;
1028 int ret, i;
1029
1030 if (vb2_is_busy(&fimc->vid_cap.vbq))
1031 return -EBUSY;
1032
1033 ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
1034 if (ret < 0)
1035 return ret;
1036
1037
1038 fimc_alpha_ctrl_update(ctx);
1039
1040 for (i = 0; i < ff->fmt->memplanes; i++) {
1041 ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
1042 ff->payload[i] = pix->plane_fmt[i].sizeimage;
1043 }
1044
1045 set_frame_bounds(ff, pix->width, pix->height);
1046
1047 if (!(ctx->state & FIMC_COMPOSE))
1048 set_frame_crop(ff, 0, 0, pix->width, pix->height);
1049
1050 fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
1051
1052
1053 if (!vc->user_subdev_api) {
1054 ctx->s_frame.fmt = inp_fmt;
1055 set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
1056 set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
1057 }
1058
1059 return ret;
1060}
1061
1062static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
1063 struct v4l2_format *f)
1064{
1065 struct fimc_dev *fimc = video_drvdata(file);
1066
1067 return __fimc_capture_set_format(fimc, f);
1068}
1069
1070static int fimc_cap_enum_input(struct file *file, void *priv,
1071 struct v4l2_input *i)
1072{
1073 struct fimc_dev *fimc = video_drvdata(file);
1074 struct exynos_video_entity *ve = &fimc->vid_cap.ve;
1075 struct v4l2_subdev *sd;
1076
1077 if (i->index != 0)
1078 return -EINVAL;
1079
1080 i->type = V4L2_INPUT_TYPE_CAMERA;
1081 fimc_md_graph_lock(ve);
1082 sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
1083 fimc_md_graph_unlock(ve);
1084
1085 if (sd)
1086 strscpy(i->name, sd->name, sizeof(i->name));
1087
1088 return 0;
1089}
1090
1091static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
1092{
1093 return i == 0 ? i : -EINVAL;
1094}
1095
1096static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
1097{
1098 *i = 0;
1099 return 0;
1100}
1101
1102
1103
1104
1105
1106
1107
1108
1109static int fimc_pipeline_validate(struct fimc_dev *fimc)
1110{
1111 struct v4l2_subdev_format sink_fmt, src_fmt;
1112 struct fimc_vid_cap *vc = &fimc->vid_cap;
1113 struct v4l2_subdev *sd = &vc->subdev;
1114 struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
1115 struct media_pad *sink_pad, *src_pad;
1116 int i, ret;
1117
1118 while (1) {
1119
1120
1121
1122
1123
1124 src_pad = NULL;
1125
1126 for (i = 0; i < sd->entity.num_pads; i++) {
1127 struct media_pad *p = &sd->entity.pads[i];
1128
1129 if (p->flags & MEDIA_PAD_FL_SINK) {
1130 sink_pad = p;
1131 src_pad = media_entity_remote_pad(sink_pad);
1132 if (src_pad)
1133 break;
1134 }
1135 }
1136
1137 if (!src_pad || !is_media_entity_v4l2_subdev(src_pad->entity))
1138 break;
1139
1140
1141 if (sd == &vc->subdev) {
1142 struct fimc_frame *ff = &vc->ctx->s_frame;
1143 sink_fmt.format.width = ff->f_width;
1144 sink_fmt.format.height = ff->f_height;
1145 sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
1146 } else {
1147 sink_fmt.pad = sink_pad->index;
1148 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1149 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
1150 if (ret < 0 && ret != -ENOIOCTLCMD)
1151 return -EPIPE;
1152 }
1153
1154
1155 sd = media_entity_to_v4l2_subdev(src_pad->entity);
1156 src_fmt.pad = src_pad->index;
1157 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1158 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
1159 if (ret < 0 && ret != -ENOIOCTLCMD)
1160 return -EPIPE;
1161
1162 if (src_fmt.format.width != sink_fmt.format.width ||
1163 src_fmt.format.height != sink_fmt.format.height ||
1164 src_fmt.format.code != sink_fmt.format.code)
1165 return -EPIPE;
1166
1167 if (sd == p->subdevs[IDX_SENSOR] &&
1168 fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
1169 struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
1170 struct fimc_frame *frame = &vc->ctx->d_frame;
1171 unsigned int i;
1172
1173 ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
1174 frame->fmt->memplanes,
1175 false);
1176 if (ret < 0)
1177 return -EPIPE;
1178
1179 for (i = 0; i < frame->fmt->memplanes; i++)
1180 if (frame->payload[i] < plane_fmt[i].sizeimage)
1181 return -EPIPE;
1182 }
1183 }
1184 return 0;
1185}
1186
1187static int fimc_cap_streamon(struct file *file, void *priv,
1188 enum v4l2_buf_type type)
1189{
1190 struct fimc_dev *fimc = video_drvdata(file);
1191 struct fimc_vid_cap *vc = &fimc->vid_cap;
1192 struct media_entity *entity = &vc->ve.vdev.entity;
1193 struct fimc_source_info *si = NULL;
1194 struct v4l2_subdev *sd;
1195 int ret;
1196
1197 if (fimc_capture_active(fimc))
1198 return -EBUSY;
1199
1200 ret = media_pipeline_start(entity, &vc->ve.pipe->mp);
1201 if (ret < 0)
1202 return ret;
1203
1204 sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
1205 if (sd)
1206 si = v4l2_get_subdev_hostdata(sd);
1207
1208 if (si == NULL) {
1209 ret = -EPIPE;
1210 goto err_p_stop;
1211 }
1212
1213
1214
1215
1216 vc->source_config = *si;
1217
1218 if (vc->input == GRP_ID_FIMC_IS)
1219 vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
1220
1221 if (vc->user_subdev_api) {
1222 ret = fimc_pipeline_validate(fimc);
1223 if (ret < 0)
1224 goto err_p_stop;
1225 }
1226
1227 ret = vb2_ioctl_streamon(file, priv, type);
1228 if (!ret) {
1229 vc->streaming = true;
1230 return ret;
1231 }
1232
1233err_p_stop:
1234 media_pipeline_stop(entity);
1235 return ret;
1236}
1237
1238static int fimc_cap_streamoff(struct file *file, void *priv,
1239 enum v4l2_buf_type type)
1240{
1241 struct fimc_dev *fimc = video_drvdata(file);
1242 struct fimc_vid_cap *vc = &fimc->vid_cap;
1243 int ret;
1244
1245 ret = vb2_ioctl_streamoff(file, priv, type);
1246 if (ret < 0)
1247 return ret;
1248
1249 media_pipeline_stop(&vc->ve.vdev.entity);
1250 vc->streaming = false;
1251 return 0;
1252}
1253
1254static int fimc_cap_reqbufs(struct file *file, void *priv,
1255 struct v4l2_requestbuffers *reqbufs)
1256{
1257 struct fimc_dev *fimc = video_drvdata(file);
1258 int ret;
1259
1260 ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
1261
1262 if (!ret)
1263 fimc->vid_cap.reqbufs_count = reqbufs->count;
1264
1265 return ret;
1266}
1267
1268static int fimc_cap_g_selection(struct file *file, void *fh,
1269 struct v4l2_selection *s)
1270{
1271 struct fimc_dev *fimc = video_drvdata(file);
1272 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1273 struct fimc_frame *f = &ctx->s_frame;
1274
1275 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1276 return -EINVAL;
1277
1278 switch (s->target) {
1279 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
1280 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1281 f = &ctx->d_frame;
1282
1283 case V4L2_SEL_TGT_CROP_BOUNDS:
1284 case V4L2_SEL_TGT_CROP_DEFAULT:
1285 s->r.left = 0;
1286 s->r.top = 0;
1287 s->r.width = f->o_width;
1288 s->r.height = f->o_height;
1289 return 0;
1290
1291 case V4L2_SEL_TGT_COMPOSE:
1292 f = &ctx->d_frame;
1293
1294 case V4L2_SEL_TGT_CROP:
1295 s->r.left = f->offs_h;
1296 s->r.top = f->offs_v;
1297 s->r.width = f->width;
1298 s->r.height = f->height;
1299 return 0;
1300 }
1301
1302 return -EINVAL;
1303}
1304
1305static int fimc_cap_s_selection(struct file *file, void *fh,
1306 struct v4l2_selection *s)
1307{
1308 struct fimc_dev *fimc = video_drvdata(file);
1309 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1310 struct v4l2_rect rect = s->r;
1311 struct fimc_frame *f;
1312 unsigned long flags;
1313
1314 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1315 return -EINVAL;
1316
1317 if (s->target == V4L2_SEL_TGT_COMPOSE)
1318 f = &ctx->d_frame;
1319 else if (s->target == V4L2_SEL_TGT_CROP)
1320 f = &ctx->s_frame;
1321 else
1322 return -EINVAL;
1323
1324 fimc_capture_try_selection(ctx, &rect, s->target);
1325
1326 if (s->flags & V4L2_SEL_FLAG_LE &&
1327 !v4l2_rect_enclosed(&rect, &s->r))
1328 return -ERANGE;
1329
1330 if (s->flags & V4L2_SEL_FLAG_GE &&
1331 !v4l2_rect_enclosed(&s->r, &rect))
1332 return -ERANGE;
1333
1334 s->r = rect;
1335 spin_lock_irqsave(&fimc->slock, flags);
1336 set_frame_crop(f, s->r.left, s->r.top, s->r.width,
1337 s->r.height);
1338 spin_unlock_irqrestore(&fimc->slock, flags);
1339
1340 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1341 return 0;
1342}
1343
1344static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
1345 .vidioc_querycap = fimc_cap_querycap,
1346
1347 .vidioc_enum_fmt_vid_cap = fimc_cap_enum_fmt,
1348 .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
1349 .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
1350 .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
1351
1352 .vidioc_reqbufs = fimc_cap_reqbufs,
1353 .vidioc_querybuf = vb2_ioctl_querybuf,
1354 .vidioc_qbuf = vb2_ioctl_qbuf,
1355 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1356 .vidioc_expbuf = vb2_ioctl_expbuf,
1357 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1358 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1359
1360 .vidioc_streamon = fimc_cap_streamon,
1361 .vidioc_streamoff = fimc_cap_streamoff,
1362
1363 .vidioc_g_selection = fimc_cap_g_selection,
1364 .vidioc_s_selection = fimc_cap_s_selection,
1365
1366 .vidioc_enum_input = fimc_cap_enum_input,
1367 .vidioc_s_input = fimc_cap_s_input,
1368 .vidioc_g_input = fimc_cap_g_input,
1369};
1370
1371
1372static int fimc_link_setup(struct media_entity *entity,
1373 const struct media_pad *local,
1374 const struct media_pad *remote, u32 flags)
1375{
1376 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1377 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1378 struct fimc_vid_cap *vc = &fimc->vid_cap;
1379 struct v4l2_subdev *sensor;
1380
1381 if (!is_media_entity_v4l2_subdev(remote->entity))
1382 return -EINVAL;
1383
1384 if (WARN_ON(fimc == NULL))
1385 return 0;
1386
1387 dbg("%s --> %s, flags: 0x%x. input: 0x%x",
1388 local->entity->name, remote->entity->name, flags,
1389 fimc->vid_cap.input);
1390
1391 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
1392 fimc->vid_cap.input = 0;
1393 return 0;
1394 }
1395
1396 if (vc->input != 0)
1397 return -EBUSY;
1398
1399 vc->input = sd->grp_id;
1400
1401 if (vc->user_subdev_api || vc->inh_sensor_ctrls)
1402 return 0;
1403
1404
1405 sensor = fimc_find_remote_sensor(&vc->subdev.entity);
1406 if (sensor == NULL)
1407 return 0;
1408
1409 return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
1410 sensor->ctrl_handler, NULL, true);
1411}
1412
1413static const struct media_entity_operations fimc_sd_media_ops = {
1414 .link_setup = fimc_link_setup,
1415};
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
1431 void *arg)
1432{
1433 struct fimc_source_info *si;
1434 struct fimc_vid_buffer *buf;
1435 struct fimc_md *fmd;
1436 struct fimc_dev *fimc;
1437 unsigned long flags;
1438
1439 if (sd == NULL)
1440 return;
1441
1442 si = v4l2_get_subdev_hostdata(sd);
1443 fmd = entity_to_fimc_mdev(&sd->entity);
1444
1445 spin_lock_irqsave(&fmd->slock, flags);
1446
1447 fimc = si ? source_to_sensor_info(si)->host : NULL;
1448
1449 if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
1450 test_bit(ST_CAPT_PEND, &fimc->state)) {
1451 unsigned long irq_flags;
1452 spin_lock_irqsave(&fimc->slock, irq_flags);
1453 if (!list_empty(&fimc->vid_cap.active_buf_q)) {
1454 buf = list_entry(fimc->vid_cap.active_buf_q.next,
1455 struct fimc_vid_buffer, list);
1456 vb2_set_plane_payload(&buf->vb.vb2_buf, 0,
1457 *((u32 *)arg));
1458 }
1459 fimc_capture_irq_handler(fimc, 1);
1460 fimc_deactivate_capture(fimc);
1461 spin_unlock_irqrestore(&fimc->slock, irq_flags);
1462 }
1463 spin_unlock_irqrestore(&fmd->slock, flags);
1464}
1465
1466static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1467 struct v4l2_subdev_pad_config *cfg,
1468 struct v4l2_subdev_mbus_code_enum *code)
1469{
1470 struct fimc_fmt *fmt;
1471
1472 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
1473 if (!fmt)
1474 return -EINVAL;
1475 code->code = fmt->mbus_code;
1476 return 0;
1477}
1478
1479static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
1480 struct v4l2_subdev_pad_config *cfg,
1481 struct v4l2_subdev_format *fmt)
1482{
1483 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1484 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1485 struct fimc_frame *ff = &ctx->s_frame;
1486 struct v4l2_mbus_framefmt *mf;
1487
1488 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1489 mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1490 fmt->format = *mf;
1491 return 0;
1492 }
1493
1494 mf = &fmt->format;
1495 mutex_lock(&fimc->lock);
1496
1497 switch (fmt->pad) {
1498 case FIMC_SD_PAD_SOURCE:
1499 if (!WARN_ON(ff->fmt == NULL))
1500 mf->code = ff->fmt->mbus_code;
1501
1502 mf->width = ff->width;
1503 mf->height = ff->height;
1504 break;
1505 case FIMC_SD_PAD_SINK_FIFO:
1506 *mf = fimc->vid_cap.wb_fmt;
1507 break;
1508 case FIMC_SD_PAD_SINK_CAM:
1509 default:
1510 *mf = fimc->vid_cap.ci_fmt;
1511 break;
1512 }
1513
1514 mutex_unlock(&fimc->lock);
1515 mf->colorspace = V4L2_COLORSPACE_JPEG;
1516
1517 return 0;
1518}
1519
1520static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
1521 struct v4l2_subdev_pad_config *cfg,
1522 struct v4l2_subdev_format *fmt)
1523{
1524 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1525 struct v4l2_mbus_framefmt *mf = &fmt->format;
1526 struct fimc_vid_cap *vc = &fimc->vid_cap;
1527 struct fimc_ctx *ctx = vc->ctx;
1528 struct fimc_frame *ff;
1529 struct fimc_fmt *ffmt;
1530
1531 dbg("pad%d: code: 0x%x, %dx%d",
1532 fmt->pad, mf->code, mf->width, mf->height);
1533
1534 if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
1535 return -EBUSY;
1536
1537 mutex_lock(&fimc->lock);
1538 ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
1539 &mf->code, NULL, fmt->pad);
1540 mutex_unlock(&fimc->lock);
1541 mf->colorspace = V4L2_COLORSPACE_JPEG;
1542
1543 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1544 mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1545 *mf = fmt->format;
1546 return 0;
1547 }
1548
1549 if (WARN_ON(ffmt == NULL))
1550 return -EINVAL;
1551
1552
1553 fimc_alpha_ctrl_update(ctx);
1554
1555 fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
1556 if (fmt->pad == FIMC_SD_PAD_SOURCE) {
1557 ff = &ctx->d_frame;
1558
1559 mf->width = ctx->s_frame.width;
1560 mf->height = ctx->s_frame.height;
1561 } else {
1562 ff = &ctx->s_frame;
1563 }
1564
1565 mutex_lock(&fimc->lock);
1566 set_frame_bounds(ff, mf->width, mf->height);
1567
1568 if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
1569 vc->wb_fmt = *mf;
1570 else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
1571 vc->ci_fmt = *mf;
1572
1573 ff->fmt = ffmt;
1574
1575
1576 if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
1577 set_frame_crop(ff, 0, 0, mf->width, mf->height);
1578
1579 if (fmt->pad != FIMC_SD_PAD_SOURCE)
1580 ctx->state &= ~FIMC_COMPOSE;
1581
1582 mutex_unlock(&fimc->lock);
1583 return 0;
1584}
1585
1586static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
1587 struct v4l2_subdev_pad_config *cfg,
1588 struct v4l2_subdev_selection *sel)
1589{
1590 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1591 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1592 struct fimc_frame *f = &ctx->s_frame;
1593 struct v4l2_rect *r = &sel->r;
1594 struct v4l2_rect *try_sel;
1595
1596 if (sel->pad == FIMC_SD_PAD_SOURCE)
1597 return -EINVAL;
1598
1599 mutex_lock(&fimc->lock);
1600
1601 switch (sel->target) {
1602 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1603 f = &ctx->d_frame;
1604
1605 case V4L2_SEL_TGT_CROP_BOUNDS:
1606 r->width = f->o_width;
1607 r->height = f->o_height;
1608 r->left = 0;
1609 r->top = 0;
1610 mutex_unlock(&fimc->lock);
1611 return 0;
1612
1613 case V4L2_SEL_TGT_CROP:
1614 try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1615 break;
1616 case V4L2_SEL_TGT_COMPOSE:
1617 try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
1618 f = &ctx->d_frame;
1619 break;
1620 default:
1621 mutex_unlock(&fimc->lock);
1622 return -EINVAL;
1623 }
1624
1625 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1626 sel->r = *try_sel;
1627 } else {
1628 r->left = f->offs_h;
1629 r->top = f->offs_v;
1630 r->width = f->width;
1631 r->height = f->height;
1632 }
1633
1634 dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
1635 sel->pad, r->left, r->top, r->width, r->height,
1636 f->f_width, f->f_height);
1637
1638 mutex_unlock(&fimc->lock);
1639 return 0;
1640}
1641
1642static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
1643 struct v4l2_subdev_pad_config *cfg,
1644 struct v4l2_subdev_selection *sel)
1645{
1646 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1647 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1648 struct fimc_frame *f = &ctx->s_frame;
1649 struct v4l2_rect *r = &sel->r;
1650 struct v4l2_rect *try_sel;
1651 unsigned long flags;
1652
1653 if (sel->pad == FIMC_SD_PAD_SOURCE)
1654 return -EINVAL;
1655
1656 mutex_lock(&fimc->lock);
1657 fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
1658
1659 switch (sel->target) {
1660 case V4L2_SEL_TGT_CROP:
1661 try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1662 break;
1663 case V4L2_SEL_TGT_COMPOSE:
1664 try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
1665 f = &ctx->d_frame;
1666 break;
1667 default:
1668 mutex_unlock(&fimc->lock);
1669 return -EINVAL;
1670 }
1671
1672 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1673 *try_sel = sel->r;
1674 } else {
1675 spin_lock_irqsave(&fimc->slock, flags);
1676 set_frame_crop(f, r->left, r->top, r->width, r->height);
1677 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1678 if (sel->target == V4L2_SEL_TGT_COMPOSE)
1679 ctx->state |= FIMC_COMPOSE;
1680 spin_unlock_irqrestore(&fimc->slock, flags);
1681 }
1682
1683 dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
1684 r->width, r->height);
1685
1686 mutex_unlock(&fimc->lock);
1687 return 0;
1688}
1689
1690static const struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
1691 .enum_mbus_code = fimc_subdev_enum_mbus_code,
1692 .get_selection = fimc_subdev_get_selection,
1693 .set_selection = fimc_subdev_set_selection,
1694 .get_fmt = fimc_subdev_get_fmt,
1695 .set_fmt = fimc_subdev_set_fmt,
1696};
1697
1698static const struct v4l2_subdev_ops fimc_subdev_ops = {
1699 .pad = &fimc_subdev_pad_ops,
1700};
1701
1702
1703static int fimc_capture_set_default_format(struct fimc_dev *fimc)
1704{
1705 struct v4l2_format fmt = {
1706 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
1707 .fmt.pix_mp = {
1708 .width = FIMC_DEFAULT_WIDTH,
1709 .height = FIMC_DEFAULT_HEIGHT,
1710 .pixelformat = V4L2_PIX_FMT_YUYV,
1711 .field = V4L2_FIELD_NONE,
1712 .colorspace = V4L2_COLORSPACE_JPEG,
1713 },
1714 };
1715
1716 return __fimc_capture_set_format(fimc, &fmt);
1717}
1718
1719
1720static int fimc_register_capture_device(struct fimc_dev *fimc,
1721 struct v4l2_device *v4l2_dev)
1722{
1723 struct video_device *vfd = &fimc->vid_cap.ve.vdev;
1724 struct vb2_queue *q = &fimc->vid_cap.vbq;
1725 struct fimc_ctx *ctx;
1726 struct fimc_vid_cap *vid_cap;
1727 struct fimc_fmt *fmt;
1728 int ret = -ENOMEM;
1729
1730 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1731 if (!ctx)
1732 return -ENOMEM;
1733
1734 ctx->fimc_dev = fimc;
1735 ctx->in_path = FIMC_IO_CAMERA;
1736 ctx->out_path = FIMC_IO_DMA;
1737 ctx->state = FIMC_CTX_CAP;
1738 ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1739 ctx->d_frame.fmt = ctx->s_frame.fmt;
1740
1741 memset(vfd, 0, sizeof(*vfd));
1742 snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
1743
1744 vfd->fops = &fimc_capture_fops;
1745 vfd->ioctl_ops = &fimc_capture_ioctl_ops;
1746 vfd->v4l2_dev = v4l2_dev;
1747 vfd->minor = -1;
1748 vfd->release = video_device_release_empty;
1749 vfd->queue = q;
1750 vfd->lock = &fimc->lock;
1751 vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
1752
1753 video_set_drvdata(vfd, fimc);
1754 vid_cap = &fimc->vid_cap;
1755 vid_cap->active_buf_cnt = 0;
1756 vid_cap->reqbufs_count = 0;
1757 vid_cap->ctx = ctx;
1758
1759 INIT_LIST_HEAD(&vid_cap->pending_buf_q);
1760 INIT_LIST_HEAD(&vid_cap->active_buf_q);
1761
1762 memset(q, 0, sizeof(*q));
1763 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1764 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
1765 q->drv_priv = ctx;
1766 q->ops = &fimc_capture_qops;
1767 q->mem_ops = &vb2_dma_contig_memops;
1768 q->buf_struct_size = sizeof(struct fimc_vid_buffer);
1769 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1770 q->lock = &fimc->lock;
1771 q->dev = &fimc->pdev->dev;
1772
1773 ret = vb2_queue_init(q);
1774 if (ret)
1775 goto err_free_ctx;
1776
1777
1778 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1779 vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
1780 vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
1781 vid_cap->ci_fmt.code = fmt->mbus_code;
1782
1783 ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
1784 ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
1785 ctx->s_frame.fmt = fmt;
1786
1787 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
1788 vid_cap->wb_fmt = vid_cap->ci_fmt;
1789 vid_cap->wb_fmt.code = fmt->mbus_code;
1790
1791 vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
1792 vfd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1793 ret = media_entity_pads_init(&vfd->entity, 1, &vid_cap->vd_pad);
1794 if (ret)
1795 goto err_free_ctx;
1796
1797 ret = fimc_ctrls_create(ctx);
1798 if (ret)
1799 goto err_me_cleanup;
1800
1801 ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1);
1802 if (ret)
1803 goto err_ctrl_free;
1804
1805 v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
1806 vfd->name, video_device_node_name(vfd));
1807
1808 vfd->ctrl_handler = &ctx->ctrls.handler;
1809 return 0;
1810
1811err_ctrl_free:
1812 fimc_ctrls_delete(ctx);
1813err_me_cleanup:
1814 media_entity_cleanup(&vfd->entity);
1815err_free_ctx:
1816 kfree(ctx);
1817 return ret;
1818}
1819
1820static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
1821{
1822 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1823 int ret;
1824
1825 if (fimc == NULL)
1826 return -ENXIO;
1827
1828 ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
1829 if (ret)
1830 return ret;
1831
1832 fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
1833
1834 ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
1835 if (ret) {
1836 fimc_unregister_m2m_device(fimc);
1837 fimc->vid_cap.ve.pipe = NULL;
1838 }
1839
1840 return ret;
1841}
1842
1843static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
1844{
1845 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1846 struct video_device *vdev;
1847
1848 if (fimc == NULL)
1849 return;
1850
1851 mutex_lock(&fimc->lock);
1852
1853 fimc_unregister_m2m_device(fimc);
1854 vdev = &fimc->vid_cap.ve.vdev;
1855
1856 if (video_is_registered(vdev)) {
1857 video_unregister_device(vdev);
1858 media_entity_cleanup(&vdev->entity);
1859 fimc_ctrls_delete(fimc->vid_cap.ctx);
1860 fimc->vid_cap.ve.pipe = NULL;
1861 }
1862 kfree(fimc->vid_cap.ctx);
1863 fimc->vid_cap.ctx = NULL;
1864
1865 mutex_unlock(&fimc->lock);
1866}
1867
1868static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
1869 .registered = fimc_capture_subdev_registered,
1870 .unregistered = fimc_capture_subdev_unregistered,
1871};
1872
1873int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
1874{
1875 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1876 int ret;
1877
1878 v4l2_subdev_init(sd, &fimc_subdev_ops);
1879 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1880 snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
1881
1882 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
1883 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
1884 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1885 ret = media_entity_pads_init(&sd->entity, FIMC_SD_PADS_NUM,
1886 fimc->vid_cap.sd_pads);
1887 if (ret)
1888 return ret;
1889
1890 sd->entity.ops = &fimc_sd_media_ops;
1891 sd->internal_ops = &fimc_capture_sd_internal_ops;
1892 v4l2_set_subdevdata(sd, fimc);
1893 return 0;
1894}
1895
1896void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
1897{
1898 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1899
1900 v4l2_device_unregister_subdev(sd);
1901 media_entity_cleanup(&sd->entity);
1902 v4l2_set_subdevdata(sd, NULL);
1903}
1904