LXR linux/drivers/mfd/tmio

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright(c) 2009 Ian Molton <spyro@f2s.com>
   4 */
   5
   6#include <linux/export.h>
   7#include <linux/mfd/tmio.h>
   8
   9#define CNF_CMD     0x04
  10#define CNF_CTL_BASE   0x10
  11#define CNF_INT_PIN  0x3d
  12#define CNF_STOP_CLK_CTL 0x40
  13#define CNF_GCLK_CTL 0x41
  14#define CNF_SD_CLK_MODE 0x42
  15#define CNF_PIN_STATUS 0x44
  16#define CNF_PWR_CTL_1 0x48
  17#define CNF_PWR_CTL_2 0x49
  18#define CNF_PWR_CTL_3 0x4a
  19#define CNF_CARD_DETECT_MODE 0x4c
  20#define CNF_SD_SLOT 0x50
  21#define CNF_EXT_GCLK_CTL_1 0xf0
  22#define CNF_EXT_GCLK_CTL_2 0xf1
  23#define CNF_EXT_GCLK_CTL_3 0xf9
  24#define CNF_SD_LED_EN_1 0xfa
  25#define CNF_SD_LED_EN_2 0xfe
  26
  27#define   SDCREN 0x2   /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
  28
  29int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base)
  30{
  31        /* Enable the MMC/SD Control registers */
  32        sd_config_write16(cnf, shift, CNF_CMD, SDCREN);
  33        sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe);
  34
  35        /* Disable SD power during suspend */
  36        sd_config_write8(cnf, shift, CNF_PWR_CTL_3, 0x01);
  37
  38        /* The below is required but why? FIXME */
  39        sd_config_write8(cnf, shift, CNF_STOP_CLK_CTL, 0x1f);
  40
  41        /* Power down SD bus */
  42        sd_config_write8(cnf, shift, CNF_PWR_CTL_2, 0x00);
  43
  44        return 0;
  45}
  46EXPORT_SYMBOL(tmio_core_mmc_enable);
  47
  48int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base)
  49{
  50
  51        /* Enable the MMC/SD Control registers */
  52        sd_config_write16(cnf, shift, CNF_CMD, SDCREN);
  53        sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe);
  54
  55        return 0;
  56}
  57EXPORT_SYMBOL(tmio_core_mmc_resume);
  58
  59void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state)
  60{
  61        sd_config_write8(cnf, shift, CNF_PWR_CTL_2, state ? 0x02 : 0x00);
  62}
  63EXPORT_SYMBOL(tmio_core_mmc_pwr);
  64
  65void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state)
  66{
  67        sd_config_write8(cnf, shift, CNF_SD_CLK_MODE, state ? 1 : 0);
  68}
  69EXPORT_SYMBOL(tmio_core_mmc_clk_div);
  70
  71