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49#include <linux/module.h>
50#include <linux/moduleparam.h>
51#include <linux/types.h>
52#include <linux/errno.h>
53#include <linux/ioport.h>
54#include <linux/pci.h>
55#include <linux/dma-mapping.h>
56#include <linux/kernel.h>
57#include <linux/netdevice.h>
58#include <linux/etherdevice.h>
59#include <linux/skbuff.h>
60#include <linux/delay.h>
61#include <linux/mm.h>
62#include <linux/highmem.h>
63#include <linux/sockios.h>
64#include <linux/firmware.h>
65#include <linux/slab.h>
66#include <linux/prefetch.h>
67#include <linux/if_vlan.h>
68
69#ifdef SIOCETHTOOL
70#include <linux/ethtool.h>
71#endif
72
73#include <net/sock.h>
74#include <net/ip.h>
75
76#include <asm/io.h>
77#include <asm/irq.h>
78#include <asm/byteorder.h>
79#include <linux/uaccess.h>
80
81
82#define DRV_NAME "acenic"
83
84#undef INDEX_DEBUG
85
86#ifdef CONFIG_ACENIC_OMIT_TIGON_I
87#define ACE_IS_TIGON_I(ap) 0
88#define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
89#else
90#define ACE_IS_TIGON_I(ap) (ap->version == 1)
91#define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
92#endif
93
94#ifndef PCI_VENDOR_ID_ALTEON
95#define PCI_VENDOR_ID_ALTEON 0x12ae
96#endif
97#ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
98#define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
99#define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
100#endif
101#ifndef PCI_DEVICE_ID_3COM_3C985
102#define PCI_DEVICE_ID_3COM_3C985 0x0001
103#endif
104#ifndef PCI_VENDOR_ID_NETGEAR
105#define PCI_VENDOR_ID_NETGEAR 0x1385
106#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
107#endif
108#ifndef PCI_DEVICE_ID_NETGEAR_GA620T
109#define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
110#endif
111
112
113
114
115
116
117#ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
118#define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
119#endif
120#ifndef PCI_DEVICE_ID_FARALLON_PN9100T
121#define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
122#endif
123#ifndef PCI_VENDOR_ID_SGI
124#define PCI_VENDOR_ID_SGI 0x10a9
125#endif
126#ifndef PCI_DEVICE_ID_SGI_ACENIC
127#define PCI_DEVICE_ID_SGI_ACENIC 0x0009
128#endif
129
130static const struct pci_device_id acenic_pci_tbl[] = {
131 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
132 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
133 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
134 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
135 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
136 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
137 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
138 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
139 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
140 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
141
142
143
144
145 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
146 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
147 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
148 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
149 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
150 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
151 { }
152};
153MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
154
155#define ace_sync_irq(irq) synchronize_irq(irq)
156
157#ifndef offset_in_page
158#define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
159#endif
160
161#define ACE_MAX_MOD_PARMS 8
162#define BOARD_IDX_STATIC 0
163#define BOARD_IDX_OVERFLOW -1
164
165#include "acenic.h"
166
167
168
169
170#define MAX_TEXT_LEN 96*1024
171#define MAX_RODATA_LEN 8*1024
172#define MAX_DATA_LEN 2*1024
173
174#ifndef tigon2FwReleaseLocal
175#define tigon2FwReleaseLocal 0
176#endif
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326#define RX_RING_SIZE 72
327#define RX_MINI_SIZE 64
328#define RX_JUMBO_SIZE 48
329
330#define RX_PANIC_STD_THRES 16
331#define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
332#define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
333#define RX_PANIC_MINI_THRES 12
334#define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
335#define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
336#define RX_PANIC_JUMBO_THRES 6
337#define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
338#define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
339
340
341
342
343
344
345#define ACE_MINI_SIZE 100
346
347#define ACE_MINI_BUFSIZE ACE_MINI_SIZE
348#define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
349#define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
350
351
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353
354
355
356
357
358
359#define DEF_TX_COAL 400
360#define DEF_TX_MAX_DESC 60
361#define DEF_RX_COAL 120
362#define DEF_RX_MAX_DESC 25
363#define DEF_TX_RATIO 21
364
365#define DEF_JUMBO_TX_COAL 20
366#define DEF_JUMBO_TX_MAX_DESC 60
367#define DEF_JUMBO_RX_COAL 30
368#define DEF_JUMBO_RX_MAX_DESC 6
369#define DEF_JUMBO_TX_RATIO 21
370
371#if tigon2FwReleaseLocal < 20001118
372
373
374
375
376
377
378
379#define TX_COAL_INTS_ONLY 1
380#else
381
382
383
384#define TX_COAL_INTS_ONLY 1
385#endif
386
387#define DEF_TRACE 0
388#define DEF_STAT (2 * TICKS_PER_SEC)
389
390
391static int link_state[ACE_MAX_MOD_PARMS];
392static int trace[ACE_MAX_MOD_PARMS];
393static int tx_coal_tick[ACE_MAX_MOD_PARMS];
394static int rx_coal_tick[ACE_MAX_MOD_PARMS];
395static int max_tx_desc[ACE_MAX_MOD_PARMS];
396static int max_rx_desc[ACE_MAX_MOD_PARMS];
397static int tx_ratio[ACE_MAX_MOD_PARMS];
398static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
399
400MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
401MODULE_LICENSE("GPL");
402MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
403#ifndef CONFIG_ACENIC_OMIT_TIGON_I
404MODULE_FIRMWARE("acenic/tg1.bin");
405#endif
406MODULE_FIRMWARE("acenic/tg2.bin");
407
408module_param_array_named(link, link_state, int, NULL, 0);
409module_param_array(trace, int, NULL, 0);
410module_param_array(tx_coal_tick, int, NULL, 0);
411module_param_array(max_tx_desc, int, NULL, 0);
412module_param_array(rx_coal_tick, int, NULL, 0);
413module_param_array(max_rx_desc, int, NULL, 0);
414module_param_array(tx_ratio, int, NULL, 0);
415MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
416MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
417MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
418MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
419MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
420MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
421MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
422
423
424static const char version[] =
425 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
426 " http://home.cern.ch/~jes/gige/acenic.html\n";
427
428static int ace_get_link_ksettings(struct net_device *,
429 struct ethtool_link_ksettings *);
430static int ace_set_link_ksettings(struct net_device *,
431 const struct ethtool_link_ksettings *);
432static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
433
434static const struct ethtool_ops ace_ethtool_ops = {
435 .get_drvinfo = ace_get_drvinfo,
436 .get_link_ksettings = ace_get_link_ksettings,
437 .set_link_ksettings = ace_set_link_ksettings,
438};
439
440static void ace_watchdog(struct net_device *dev, unsigned int txqueue);
441
442static const struct net_device_ops ace_netdev_ops = {
443 .ndo_open = ace_open,
444 .ndo_stop = ace_close,
445 .ndo_tx_timeout = ace_watchdog,
446 .ndo_get_stats = ace_get_stats,
447 .ndo_start_xmit = ace_start_xmit,
448 .ndo_set_rx_mode = ace_set_multicast_list,
449 .ndo_validate_addr = eth_validate_addr,
450 .ndo_set_mac_address = ace_set_mac_addr,
451 .ndo_change_mtu = ace_change_mtu,
452};
453
454static int acenic_probe_one(struct pci_dev *pdev,
455 const struct pci_device_id *id)
456{
457 struct net_device *dev;
458 struct ace_private *ap;
459 static int boards_found;
460
461 dev = alloc_etherdev(sizeof(struct ace_private));
462 if (dev == NULL)
463 return -ENOMEM;
464
465 SET_NETDEV_DEV(dev, &pdev->dev);
466
467 ap = netdev_priv(dev);
468 ap->pdev = pdev;
469 ap->name = pci_name(pdev);
470
471 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
472 dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
473
474 dev->watchdog_timeo = 5*HZ;
475 dev->min_mtu = 0;
476 dev->max_mtu = ACE_JUMBO_MTU;
477
478 dev->netdev_ops = &ace_netdev_ops;
479 dev->ethtool_ops = &ace_ethtool_ops;
480
481
482 if (!boards_found)
483 printk(version);
484
485 if (pci_enable_device(pdev))
486 goto fail_free_netdev;
487
488
489
490
491
492
493 pci_set_master(pdev);
494
495 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
496
497
498 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
499 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
500 "access - was not enabled by BIOS/Firmware\n",
501 ap->name);
502 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
503 pci_write_config_word(ap->pdev, PCI_COMMAND,
504 ap->pci_command);
505 wmb();
506 }
507
508 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
509 if (ap->pci_latency <= 0x40) {
510 ap->pci_latency = 0x40;
511 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
512 }
513
514
515
516
517
518
519 dev->base_addr = pci_resource_start(pdev, 0);
520 ap->regs = ioremap(dev->base_addr, 0x4000);
521 if (!ap->regs) {
522 printk(KERN_ERR "%s: Unable to map I/O register, "
523 "AceNIC %i will be disabled.\n",
524 ap->name, boards_found);
525 goto fail_free_netdev;
526 }
527
528 switch(pdev->vendor) {
529 case PCI_VENDOR_ID_ALTEON:
530 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
531 printk(KERN_INFO "%s: Farallon PN9100-T ",
532 ap->name);
533 } else {
534 printk(KERN_INFO "%s: Alteon AceNIC ",
535 ap->name);
536 }
537 break;
538 case PCI_VENDOR_ID_3COM:
539 printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
540 break;
541 case PCI_VENDOR_ID_NETGEAR:
542 printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
543 break;
544 case PCI_VENDOR_ID_DEC:
545 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
546 printk(KERN_INFO "%s: Farallon PN9000-SX ",
547 ap->name);
548 break;
549 }
550 fallthrough;
551 case PCI_VENDOR_ID_SGI:
552 printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
553 break;
554 default:
555 printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
556 break;
557 }
558
559 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
560 printk("irq %d\n", pdev->irq);
561
562#ifdef CONFIG_ACENIC_OMIT_TIGON_I
563 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
564 printk(KERN_ERR "%s: Driver compiled without Tigon I"
565 " support - NIC disabled\n", dev->name);
566 goto fail_uninit;
567 }
568#endif
569
570 if (ace_allocate_descriptors(dev))
571 goto fail_free_netdev;
572
573#ifdef MODULE
574 if (boards_found >= ACE_MAX_MOD_PARMS)
575 ap->board_idx = BOARD_IDX_OVERFLOW;
576 else
577 ap->board_idx = boards_found;
578#else
579 ap->board_idx = BOARD_IDX_STATIC;
580#endif
581
582 if (ace_init(dev))
583 goto fail_free_netdev;
584
585 if (register_netdev(dev)) {
586 printk(KERN_ERR "acenic: device registration failed\n");
587 goto fail_uninit;
588 }
589 ap->name = dev->name;
590
591 if (ap->pci_using_dac)
592 dev->features |= NETIF_F_HIGHDMA;
593
594 pci_set_drvdata(pdev, dev);
595
596 boards_found++;
597 return 0;
598
599 fail_uninit:
600 ace_init_cleanup(dev);
601 fail_free_netdev:
602 free_netdev(dev);
603 return -ENODEV;
604}
605
606static void acenic_remove_one(struct pci_dev *pdev)
607{
608 struct net_device *dev = pci_get_drvdata(pdev);
609 struct ace_private *ap = netdev_priv(dev);
610 struct ace_regs __iomem *regs = ap->regs;
611 short i;
612
613 unregister_netdev(dev);
614
615 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
616 if (ap->version >= 2)
617 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
618
619
620
621
622 writel(1, ®s->Mb0Lo);
623 readl(®s->CpuCtrl);
624
625
626
627
628
629
630
631
632
633
634 ace_sync_irq(dev->irq);
635
636 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
637 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
638
639 if (skb) {
640 struct ring_info *ringp;
641 dma_addr_t mapping;
642
643 ringp = &ap->skb->rx_std_skbuff[i];
644 mapping = dma_unmap_addr(ringp, mapping);
645 dma_unmap_page(&ap->pdev->dev, mapping,
646 ACE_STD_BUFSIZE, DMA_FROM_DEVICE);
647
648 ap->rx_std_ring[i].size = 0;
649 ap->skb->rx_std_skbuff[i].skb = NULL;
650 dev_kfree_skb(skb);
651 }
652 }
653
654 if (ap->version >= 2) {
655 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
656 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
657
658 if (skb) {
659 struct ring_info *ringp;
660 dma_addr_t mapping;
661
662 ringp = &ap->skb->rx_mini_skbuff[i];
663 mapping = dma_unmap_addr(ringp,mapping);
664 dma_unmap_page(&ap->pdev->dev, mapping,
665 ACE_MINI_BUFSIZE,
666 DMA_FROM_DEVICE);
667
668 ap->rx_mini_ring[i].size = 0;
669 ap->skb->rx_mini_skbuff[i].skb = NULL;
670 dev_kfree_skb(skb);
671 }
672 }
673 }
674
675 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
676 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
677 if (skb) {
678 struct ring_info *ringp;
679 dma_addr_t mapping;
680
681 ringp = &ap->skb->rx_jumbo_skbuff[i];
682 mapping = dma_unmap_addr(ringp, mapping);
683 dma_unmap_page(&ap->pdev->dev, mapping,
684 ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);
685
686 ap->rx_jumbo_ring[i].size = 0;
687 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
688 dev_kfree_skb(skb);
689 }
690 }
691
692 ace_init_cleanup(dev);
693 free_netdev(dev);
694}
695
696static struct pci_driver acenic_pci_driver = {
697 .name = "acenic",
698 .id_table = acenic_pci_tbl,
699 .probe = acenic_probe_one,
700 .remove = acenic_remove_one,
701};
702
703static void ace_free_descriptors(struct net_device *dev)
704{
705 struct ace_private *ap = netdev_priv(dev);
706 int size;
707
708 if (ap->rx_std_ring != NULL) {
709 size = (sizeof(struct rx_desc) *
710 (RX_STD_RING_ENTRIES +
711 RX_JUMBO_RING_ENTRIES +
712 RX_MINI_RING_ENTRIES +
713 RX_RETURN_RING_ENTRIES));
714 dma_free_coherent(&ap->pdev->dev, size, ap->rx_std_ring,
715 ap->rx_ring_base_dma);
716 ap->rx_std_ring = NULL;
717 ap->rx_jumbo_ring = NULL;
718 ap->rx_mini_ring = NULL;
719 ap->rx_return_ring = NULL;
720 }
721 if (ap->evt_ring != NULL) {
722 size = (sizeof(struct event) * EVT_RING_ENTRIES);
723 dma_free_coherent(&ap->pdev->dev, size, ap->evt_ring,
724 ap->evt_ring_dma);
725 ap->evt_ring = NULL;
726 }
727 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
728 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
729 dma_free_coherent(&ap->pdev->dev, size, ap->tx_ring,
730 ap->tx_ring_dma);
731 }
732 ap->tx_ring = NULL;
733
734 if (ap->evt_prd != NULL) {
735 dma_free_coherent(&ap->pdev->dev, sizeof(u32),
736 (void *)ap->evt_prd, ap->evt_prd_dma);
737 ap->evt_prd = NULL;
738 }
739 if (ap->rx_ret_prd != NULL) {
740 dma_free_coherent(&ap->pdev->dev, sizeof(u32),
741 (void *)ap->rx_ret_prd, ap->rx_ret_prd_dma);
742 ap->rx_ret_prd = NULL;
743 }
744 if (ap->tx_csm != NULL) {
745 dma_free_coherent(&ap->pdev->dev, sizeof(u32),
746 (void *)ap->tx_csm, ap->tx_csm_dma);
747 ap->tx_csm = NULL;
748 }
749}
750
751
752static int ace_allocate_descriptors(struct net_device *dev)
753{
754 struct ace_private *ap = netdev_priv(dev);
755 int size;
756
757 size = (sizeof(struct rx_desc) *
758 (RX_STD_RING_ENTRIES +
759 RX_JUMBO_RING_ENTRIES +
760 RX_MINI_RING_ENTRIES +
761 RX_RETURN_RING_ENTRIES));
762
763 ap->rx_std_ring = dma_alloc_coherent(&ap->pdev->dev, size,
764 &ap->rx_ring_base_dma, GFP_KERNEL);
765 if (ap->rx_std_ring == NULL)
766 goto fail;
767
768 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
769 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
770 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
771
772 size = (sizeof(struct event) * EVT_RING_ENTRIES);
773
774 ap->evt_ring = dma_alloc_coherent(&ap->pdev->dev, size,
775 &ap->evt_ring_dma, GFP_KERNEL);
776
777 if (ap->evt_ring == NULL)
778 goto fail;
779
780
781
782
783
784 if (!ACE_IS_TIGON_I(ap)) {
785 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
786
787 ap->tx_ring = dma_alloc_coherent(&ap->pdev->dev, size,
788 &ap->tx_ring_dma, GFP_KERNEL);
789
790 if (ap->tx_ring == NULL)
791 goto fail;
792 }
793
794 ap->evt_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32),
795 &ap->evt_prd_dma, GFP_KERNEL);
796 if (ap->evt_prd == NULL)
797 goto fail;
798
799 ap->rx_ret_prd = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32),
800 &ap->rx_ret_prd_dma, GFP_KERNEL);
801 if (ap->rx_ret_prd == NULL)
802 goto fail;
803
804 ap->tx_csm = dma_alloc_coherent(&ap->pdev->dev, sizeof(u32),
805 &ap->tx_csm_dma, GFP_KERNEL);
806 if (ap->tx_csm == NULL)
807 goto fail;
808
809 return 0;
810
811fail:
812
813 ace_init_cleanup(dev);
814 return 1;
815}
816
817
818
819
820
821
822static void ace_init_cleanup(struct net_device *dev)
823{
824 struct ace_private *ap;
825
826 ap = netdev_priv(dev);
827
828 ace_free_descriptors(dev);
829
830 if (ap->info)
831 dma_free_coherent(&ap->pdev->dev, sizeof(struct ace_info),
832 ap->info, ap->info_dma);
833 kfree(ap->skb);
834 kfree(ap->trace_buf);
835
836 if (dev->irq)
837 free_irq(dev->irq, dev);
838
839 iounmap(ap->regs);
840}
841
842
843
844
845
846static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
847{
848 u32 idx;
849
850 idx = readl(®s->CmdPrd);
851
852 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
853 idx = (idx + 1) % CMD_RING_ENTRIES;
854
855 writel(idx, ®s->CmdPrd);
856}
857
858
859static int ace_init(struct net_device *dev)
860{
861 struct ace_private *ap;
862 struct ace_regs __iomem *regs;
863 struct ace_info *info = NULL;
864 struct pci_dev *pdev;
865 unsigned long myjif;
866 u64 tmp_ptr;
867 u32 tig_ver, mac1, mac2, tmp, pci_state;
868 int board_idx, ecode = 0;
869 short i;
870 unsigned char cache_size;
871
872 ap = netdev_priv(dev);
873 regs = ap->regs;
874
875 board_idx = ap->board_idx;
876
877
878
879
880
881
882 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
883 readl(®s->HostCtrl);
884 udelay(5);
885
886
887
888
889#ifdef __BIG_ENDIAN
890
891
892
893
894 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
895 ®s->HostCtrl);
896#else
897 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
898 ®s->HostCtrl);
899#endif
900 readl(®s->HostCtrl);
901
902
903
904
905 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
906 readl(®s->CpuCtrl);
907 writel(0, ®s->Mb0Lo);
908
909 tig_ver = readl(®s->HostCtrl) >> 28;
910
911 switch(tig_ver){
912#ifndef CONFIG_ACENIC_OMIT_TIGON_I
913 case 4:
914 case 5:
915 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
916 tig_ver, ap->firmware_major, ap->firmware_minor,
917 ap->firmware_fix);
918 writel(0, ®s->LocalCtrl);
919 ap->version = 1;
920 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
921 break;
922#endif
923 case 6:
924 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
925 tig_ver, ap->firmware_major, ap->firmware_minor,
926 ap->firmware_fix);
927 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
928 readl(®s->CpuBCtrl);
929
930
931
932
933
934 writel(SRAM_BANK_512K, ®s->LocalCtrl);
935 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
936 ap->version = 2;
937 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
938 break;
939 default:
940 printk(KERN_WARNING " Unsupported Tigon version detected "
941 "(%i)\n", tig_ver);
942 ecode = -ENODEV;
943 goto init_error;
944 }
945
946
947
948
949
950
951
952
953#ifdef __BIG_ENDIAN
954 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
955 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
956#else
957 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
958 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
959#endif
960 readl(®s->ModeStat);
961
962 mac1 = 0;
963 for(i = 0; i < 4; i++) {
964 int t;
965
966 mac1 = mac1 << 8;
967 t = read_eeprom_byte(dev, 0x8c+i);
968 if (t < 0) {
969 ecode = -EIO;
970 goto init_error;
971 } else
972 mac1 |= (t & 0xff);
973 }
974 mac2 = 0;
975 for(i = 4; i < 8; i++) {
976 int t;
977
978 mac2 = mac2 << 8;
979 t = read_eeprom_byte(dev, 0x8c+i);
980 if (t < 0) {
981 ecode = -EIO;
982 goto init_error;
983 } else
984 mac2 |= (t & 0xff);
985 }
986
987 writel(mac1, ®s->MacAddrHi);
988 writel(mac2, ®s->MacAddrLo);
989
990 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
991 dev->dev_addr[1] = mac1 & 0xff;
992 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
993 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
994 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
995 dev->dev_addr[5] = mac2 & 0xff;
996
997 printk("MAC: %pM\n", dev->dev_addr);
998
999
1000
1001
1002
1003
1004
1005 pdev = ap->pdev;
1006 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1007 cache_size <<= 2;
1008 if (cache_size != SMP_CACHE_BYTES) {
1009 printk(KERN_INFO " PCI cache line size set incorrectly "
1010 "(%i bytes) by BIOS/FW, ", cache_size);
1011 if (cache_size > SMP_CACHE_BYTES)
1012 printk("expecting %i\n", SMP_CACHE_BYTES);
1013 else {
1014 printk("correcting to %i\n", SMP_CACHE_BYTES);
1015 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1016 SMP_CACHE_BYTES >> 2);
1017 }
1018 }
1019
1020 pci_state = readl(®s->PciState);
1021 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1022 "latency: %i clks\n",
1023 (pci_state & PCI_32BIT) ? 32 : 64,
1024 (pci_state & PCI_66MHZ) ? 66 : 33,
1025 ap->pci_latency);
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1038 if (ap->version >= 2) {
1039 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1040
1041
1042
1043 if (board_idx == BOARD_IDX_OVERFLOW ||
1044 dis_pci_mem_inval[board_idx]) {
1045 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1046 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1047 pci_write_config_word(pdev, PCI_COMMAND,
1048 ap->pci_command);
1049 printk(KERN_INFO " Disabling PCI memory "
1050 "write and invalidate\n");
1051 }
1052 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1053 printk(KERN_INFO " PCI memory write & invalidate "
1054 "enabled by BIOS, enabling counter measures\n");
1055
1056 switch(SMP_CACHE_BYTES) {
1057 case 16:
1058 tmp |= DMA_WRITE_MAX_16;
1059 break;
1060 case 32:
1061 tmp |= DMA_WRITE_MAX_32;
1062 break;
1063 case 64:
1064 tmp |= DMA_WRITE_MAX_64;
1065 break;
1066 case 128:
1067 tmp |= DMA_WRITE_MAX_128;
1068 break;
1069 default:
1070 printk(KERN_INFO " Cache line size %i not "
1071 "supported, PCI write and invalidate "
1072 "disabled\n", SMP_CACHE_BYTES);
1073 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1074 pci_write_config_word(pdev, PCI_COMMAND,
1075 ap->pci_command);
1076 }
1077 }
1078 }
1079
1080#ifdef __sparc__
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092 tmp &= ~DMA_READ_WRITE_MASK;
1093 tmp |= DMA_READ_MAX_64;
1094 tmp |= DMA_WRITE_MAX_64;
1095#endif
1096#ifdef __alpha__
1097 tmp &= ~DMA_READ_WRITE_MASK;
1098 tmp |= DMA_READ_MAX_128;
1099
1100
1101
1102
1103
1104 tmp |= DMA_WRITE_MAX_128;
1105#endif
1106 writel(tmp, ®s->PciState);
1107
1108#if 0
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1121 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1122 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1123 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1124 }
1125#endif
1126
1127
1128
1129
1130 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
1131 ap->pci_using_dac = 1;
1132 } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
1133 ap->pci_using_dac = 0;
1134 } else {
1135 ecode = -ENODEV;
1136 goto init_error;
1137 }
1138
1139
1140
1141
1142
1143
1144 if (!(info = dma_alloc_coherent(&ap->pdev->dev, sizeof(struct ace_info),
1145 &ap->info_dma, GFP_KERNEL))) {
1146 ecode = -EAGAIN;
1147 goto init_error;
1148 }
1149 ap->info = info;
1150
1151
1152
1153
1154 if (!(ap->skb = kzalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1155 ecode = -EAGAIN;
1156 goto init_error;
1157 }
1158
1159 ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED,
1160 DRV_NAME, dev);
1161 if (ecode) {
1162 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1163 DRV_NAME, pdev->irq);
1164 goto init_error;
1165 } else
1166 dev->irq = pdev->irq;
1167
1168#ifdef INDEX_DEBUG
1169 spin_lock_init(&ap->debug_lock);
1170 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1171 ap->last_std_rx = 0;
1172 ap->last_mini_rx = 0;
1173#endif
1174
1175 ecode = ace_load_firmware(dev);
1176 if (ecode)
1177 goto init_error;
1178
1179 ap->fw_running = 0;
1180
1181 tmp_ptr = ap->info_dma;
1182 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1183 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1184
1185 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1186
1187 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1188 info->evt_ctrl.flags = 0;
1189
1190 *(ap->evt_prd) = 0;
1191 wmb();
1192 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1193 writel(0, ®s->EvtCsm);
1194
1195 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1196 info->cmd_ctrl.flags = 0;
1197 info->cmd_ctrl.max_len = 0;
1198
1199 for (i = 0; i < CMD_RING_ENTRIES; i++)
1200 writel(0, ®s->CmdRng[i]);
1201
1202 writel(0, ®s->CmdPrd);
1203 writel(0, ®s->CmdCsm);
1204
1205 tmp_ptr = ap->info_dma;
1206 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1207 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1208
1209 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1210 info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1211 info->rx_std_ctrl.flags =
1212 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1213
1214 memset(ap->rx_std_ring, 0,
1215 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1216
1217 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1218 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1219
1220 ap->rx_std_skbprd = 0;
1221 atomic_set(&ap->cur_rx_bufs, 0);
1222
1223 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1224 (ap->rx_ring_base_dma +
1225 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1226 info->rx_jumbo_ctrl.max_len = 0;
1227 info->rx_jumbo_ctrl.flags =
1228 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1229
1230 memset(ap->rx_jumbo_ring, 0,
1231 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1232
1233 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1234 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1235
1236 ap->rx_jumbo_skbprd = 0;
1237 atomic_set(&ap->cur_jumbo_bufs, 0);
1238
1239 memset(ap->rx_mini_ring, 0,
1240 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1241
1242 if (ap->version >= 2) {
1243 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1244 (ap->rx_ring_base_dma +
1245 (sizeof(struct rx_desc) *
1246 (RX_STD_RING_ENTRIES +
1247 RX_JUMBO_RING_ENTRIES))));
1248 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1249 info->rx_mini_ctrl.flags =
1250 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|RCB_FLG_VLAN_ASSIST;
1251
1252 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1253 ap->rx_mini_ring[i].flags =
1254 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1255 } else {
1256 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1257 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1258 info->rx_mini_ctrl.max_len = 0;
1259 }
1260
1261 ap->rx_mini_skbprd = 0;
1262 atomic_set(&ap->cur_mini_bufs, 0);
1263
1264 set_aceaddr(&info->rx_return_ctrl.rngptr,
1265 (ap->rx_ring_base_dma +
1266 (sizeof(struct rx_desc) *
1267 (RX_STD_RING_ENTRIES +
1268 RX_JUMBO_RING_ENTRIES +
1269 RX_MINI_RING_ENTRIES))));
1270 info->rx_return_ctrl.flags = 0;
1271 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1272
1273 memset(ap->rx_return_ring, 0,
1274 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1275
1276 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1277 *(ap->rx_ret_prd) = 0;
1278
1279 writel(TX_RING_BASE, ®s->WinBase);
1280
1281 if (ACE_IS_TIGON_I(ap)) {
1282 ap->tx_ring = (__force struct tx_desc *) regs->Window;
1283 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
1284 * sizeof(struct tx_desc)) / sizeof(u32); i++)
1285 writel(0, (__force void __iomem *)ap->tx_ring + i * 4);
1286
1287 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1288 } else {
1289 memset(ap->tx_ring, 0,
1290 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1291
1292 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1293 }
1294
1295 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1296 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | RCB_FLG_VLAN_ASSIST;
1297
1298
1299
1300
1301 if (!ACE_IS_TIGON_I(ap))
1302 tmp |= RCB_FLG_TX_HOST_RING;
1303#if TX_COAL_INTS_ONLY
1304 tmp |= RCB_FLG_COAL_INT_ONLY;
1305#endif
1306 info->tx_ctrl.flags = tmp;
1307
1308 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1309
1310
1311
1312
1313#if 0
1314 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1315 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1316#else
1317 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1318 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1319#endif
1320
1321 writel(0, ®s->MaskInt);
1322 writel(1, ®s->IfIdx);
1323#if 0
1324
1325
1326
1327
1328 writel(1, ®s->AssistState);
1329#endif
1330
1331 writel(DEF_STAT, ®s->TuneStatTicks);
1332 writel(DEF_TRACE, ®s->TuneTrace);
1333
1334 ace_set_rxtx_parms(dev, 0);
1335
1336 if (board_idx == BOARD_IDX_OVERFLOW) {
1337 printk(KERN_WARNING "%s: more than %i NICs detected, "
1338 "ignoring module parameters!\n",
1339 ap->name, ACE_MAX_MOD_PARMS);
1340 } else if (board_idx >= 0) {
1341 if (tx_coal_tick[board_idx])
1342 writel(tx_coal_tick[board_idx],
1343 ®s->TuneTxCoalTicks);
1344 if (max_tx_desc[board_idx])
1345 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1346
1347 if (rx_coal_tick[board_idx])
1348 writel(rx_coal_tick[board_idx],
1349 ®s->TuneRxCoalTicks);
1350 if (max_rx_desc[board_idx])
1351 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1352
1353 if (trace[board_idx])
1354 writel(trace[board_idx], ®s->TuneTrace);
1355
1356 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1357 writel(tx_ratio[board_idx], ®s->TxBufRat);
1358 }
1359
1360
1361
1362
1363 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1364 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1365 if(ap->version >= 2)
1366 tmp |= LNK_TX_FLOW_CTL_Y;
1367
1368
1369
1370
1371 if ((board_idx >= 0) && link_state[board_idx]) {
1372 int option = link_state[board_idx];
1373
1374 tmp = LNK_ENABLE;
1375
1376 if (option & 0x01) {
1377 printk(KERN_INFO "%s: Setting half duplex link\n",
1378 ap->name);
1379 tmp &= ~LNK_FULL_DUPLEX;
1380 }
1381 if (option & 0x02)
1382 tmp &= ~LNK_NEGOTIATE;
1383 if (option & 0x10)
1384 tmp |= LNK_10MB;
1385 if (option & 0x20)
1386 tmp |= LNK_100MB;
1387 if (option & 0x40)
1388 tmp |= LNK_1000MB;
1389 if ((option & 0x70) == 0) {
1390 printk(KERN_WARNING "%s: No media speed specified, "
1391 "forcing auto negotiation\n", ap->name);
1392 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1393 LNK_100MB | LNK_10MB;
1394 }
1395 if ((option & 0x100) == 0)
1396 tmp |= LNK_NEG_FCTL;
1397 else
1398 printk(KERN_INFO "%s: Disabling flow control "
1399 "negotiation\n", ap->name);
1400 if (option & 0x200)
1401 tmp |= LNK_RX_FLOW_CTL_Y;
1402 if ((option & 0x400) && (ap->version >= 2)) {
1403 printk(KERN_INFO "%s: Enabling TX flow control\n",
1404 ap->name);
1405 tmp |= LNK_TX_FLOW_CTL_Y;
1406 }
1407 }
1408
1409 ap->link = tmp;
1410 writel(tmp, ®s->TuneLink);
1411 if (ap->version >= 2)
1412 writel(tmp, ®s->TuneFastLink);
1413
1414 writel(ap->firmware_start, ®s->Pc);
1415
1416 writel(0, ®s->Mb0Lo);
1417
1418
1419
1420
1421
1422
1423
1424 ap->cur_rx = 0;
1425 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1426
1427 wmb();
1428 ace_set_txprd(regs, ap, 0);
1429 writel(0, ®s->RxRetCsm);
1430
1431
1432
1433
1434
1435
1436
1437 writel(1, ®s->AssistState);
1438
1439
1440
1441
1442 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1443 readl(®s->CpuCtrl);
1444
1445
1446
1447
1448 myjif = jiffies + 3 * HZ;
1449 while (time_before(jiffies, myjif) && !ap->fw_running)
1450 cpu_relax();
1451
1452 if (!ap->fw_running) {
1453 printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1454
1455 ace_dump_trace(ap);
1456 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1457 readl(®s->CpuCtrl);
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468 if (ap->version >= 2)
1469 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1470 ®s->CpuBCtrl);
1471 writel(0, ®s->Mb0Lo);
1472 readl(®s->Mb0Lo);
1473
1474 ecode = -EBUSY;
1475 goto init_error;
1476 }
1477
1478
1479
1480
1481
1482 if (!test_and_set_bit(0, &ap->std_refill_busy))
1483 ace_load_std_rx_ring(dev, RX_RING_SIZE);
1484 else
1485 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1486 ap->name);
1487 if (ap->version >= 2) {
1488 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1489 ace_load_mini_rx_ring(dev, RX_MINI_SIZE);
1490 else
1491 printk(KERN_ERR "%s: Someone is busy refilling "
1492 "the RX mini ring\n", ap->name);
1493 }
1494 return 0;
1495
1496 init_error:
1497 ace_init_cleanup(dev);
1498 return ecode;
1499}
1500
1501
1502static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1503{
1504 struct ace_private *ap = netdev_priv(dev);
1505 struct ace_regs __iomem *regs = ap->regs;
1506 int board_idx = ap->board_idx;
1507
1508 if (board_idx >= 0) {
1509 if (!jumbo) {
1510 if (!tx_coal_tick[board_idx])
1511 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1512 if (!max_tx_desc[board_idx])
1513 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1514 if (!rx_coal_tick[board_idx])
1515 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1516 if (!max_rx_desc[board_idx])
1517 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1518 if (!tx_ratio[board_idx])
1519 writel(DEF_TX_RATIO, ®s->TxBufRat);
1520 } else {
1521 if (!tx_coal_tick[board_idx])
1522 writel(DEF_JUMBO_TX_COAL,
1523 ®s->TuneTxCoalTicks);
1524 if (!max_tx_desc[board_idx])
1525 writel(DEF_JUMBO_TX_MAX_DESC,
1526 ®s->TuneMaxTxDesc);
1527 if (!rx_coal_tick[board_idx])
1528 writel(DEF_JUMBO_RX_COAL,
1529 ®s->TuneRxCoalTicks);
1530 if (!max_rx_desc[board_idx])
1531 writel(DEF_JUMBO_RX_MAX_DESC,
1532 ®s->TuneMaxRxDesc);
1533 if (!tx_ratio[board_idx])
1534 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1535 }
1536 }
1537}
1538
1539
1540static void ace_watchdog(struct net_device *data, unsigned int txqueue)
1541{
1542 struct net_device *dev = data;
1543 struct ace_private *ap = netdev_priv(dev);
1544 struct ace_regs __iomem *regs = ap->regs;
1545
1546
1547
1548
1549
1550
1551 if (*ap->tx_csm != ap->tx_ret_csm) {
1552 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1553 dev->name, (unsigned int)readl(®s->HostCtrl));
1554
1555 } else {
1556 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1557 dev->name);
1558#if 0
1559 netif_wake_queue(dev);
1560#endif
1561 }
1562}
1563
1564
1565static void ace_tasklet(unsigned long arg)
1566{
1567 struct net_device *dev = (struct net_device *) arg;
1568 struct ace_private *ap = netdev_priv(dev);
1569 int cur_size;
1570
1571 cur_size = atomic_read(&ap->cur_rx_bufs);
1572 if ((cur_size < RX_LOW_STD_THRES) &&
1573 !test_and_set_bit(0, &ap->std_refill_busy)) {
1574#ifdef DEBUG
1575 printk("refilling buffers (current %i)\n", cur_size);
1576#endif
1577 ace_load_std_rx_ring(dev, RX_RING_SIZE - cur_size);
1578 }
1579
1580 if (ap->version >= 2) {
1581 cur_size = atomic_read(&ap->cur_mini_bufs);
1582 if ((cur_size < RX_LOW_MINI_THRES) &&
1583 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1584#ifdef DEBUG
1585 printk("refilling mini buffers (current %i)\n",
1586 cur_size);
1587#endif
1588 ace_load_mini_rx_ring(dev, RX_MINI_SIZE - cur_size);
1589 }
1590 }
1591
1592 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1593 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1594 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1595#ifdef DEBUG
1596 printk("refilling jumbo buffers (current %i)\n", cur_size);
1597#endif
1598 ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE - cur_size);
1599 }
1600 ap->tasklet_pending = 0;
1601}
1602
1603
1604
1605
1606
1607static void ace_dump_trace(struct ace_private *ap)
1608{
1609#if 0
1610 if (!ap->trace_buf)
1611 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1612 return;
1613#endif
1614}
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs)
1625{
1626 struct ace_private *ap = netdev_priv(dev);
1627 struct ace_regs __iomem *regs = ap->regs;
1628 short i, idx;
1629
1630
1631 prefetchw(&ap->cur_rx_bufs);
1632
1633 idx = ap->rx_std_skbprd;
1634
1635 for (i = 0; i < nr_bufs; i++) {
1636 struct sk_buff *skb;
1637 struct rx_desc *rd;
1638 dma_addr_t mapping;
1639
1640 skb = netdev_alloc_skb_ip_align(dev, ACE_STD_BUFSIZE);
1641 if (!skb)
1642 break;
1643
1644 mapping = dma_map_page(&ap->pdev->dev,
1645 virt_to_page(skb->data),
1646 offset_in_page(skb->data),
1647 ACE_STD_BUFSIZE, DMA_FROM_DEVICE);
1648 ap->skb->rx_std_skbuff[idx].skb = skb;
1649 dma_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1650 mapping, mapping);
1651
1652 rd = &ap->rx_std_ring[idx];
1653 set_aceaddr(&rd->addr, mapping);
1654 rd->size = ACE_STD_BUFSIZE;
1655 rd->idx = idx;
1656 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1657 }
1658
1659 if (!i)
1660 goto error_out;
1661
1662 atomic_add(i, &ap->cur_rx_bufs);
1663 ap->rx_std_skbprd = idx;
1664
1665 if (ACE_IS_TIGON_I(ap)) {
1666 struct cmd cmd;
1667 cmd.evt = C_SET_RX_PRD_IDX;
1668 cmd.code = 0;
1669 cmd.idx = ap->rx_std_skbprd;
1670 ace_issue_cmd(regs, &cmd);
1671 } else {
1672 writel(idx, ®s->RxStdPrd);
1673 wmb();
1674 }
1675
1676 out:
1677 clear_bit(0, &ap->std_refill_busy);
1678 return;
1679
1680 error_out:
1681 printk(KERN_INFO "Out of memory when allocating "
1682 "standard receive buffers\n");
1683 goto out;
1684}
1685
1686
1687static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs)
1688{
1689 struct ace_private *ap = netdev_priv(dev);
1690 struct ace_regs __iomem *regs = ap->regs;
1691 short i, idx;
1692
1693 prefetchw(&ap->cur_mini_bufs);
1694
1695 idx = ap->rx_mini_skbprd;
1696 for (i = 0; i < nr_bufs; i++) {
1697 struct sk_buff *skb;
1698 struct rx_desc *rd;
1699 dma_addr_t mapping;
1700
1701 skb = netdev_alloc_skb_ip_align(dev, ACE_MINI_BUFSIZE);
1702 if (!skb)
1703 break;
1704
1705 mapping = dma_map_page(&ap->pdev->dev,
1706 virt_to_page(skb->data),
1707 offset_in_page(skb->data),
1708 ACE_MINI_BUFSIZE, DMA_FROM_DEVICE);
1709 ap->skb->rx_mini_skbuff[idx].skb = skb;
1710 dma_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1711 mapping, mapping);
1712
1713 rd = &ap->rx_mini_ring[idx];
1714 set_aceaddr(&rd->addr, mapping);
1715 rd->size = ACE_MINI_BUFSIZE;
1716 rd->idx = idx;
1717 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1718 }
1719
1720 if (!i)
1721 goto error_out;
1722
1723 atomic_add(i, &ap->cur_mini_bufs);
1724
1725 ap->rx_mini_skbprd = idx;
1726
1727 writel(idx, ®s->RxMiniPrd);
1728 wmb();
1729
1730 out:
1731 clear_bit(0, &ap->mini_refill_busy);
1732 return;
1733 error_out:
1734 printk(KERN_INFO "Out of memory when allocating "
1735 "mini receive buffers\n");
1736 goto out;
1737}
1738
1739
1740
1741
1742
1743
1744static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs)
1745{
1746 struct ace_private *ap = netdev_priv(dev);
1747 struct ace_regs __iomem *regs = ap->regs;
1748 short i, idx;
1749
1750 idx = ap->rx_jumbo_skbprd;
1751
1752 for (i = 0; i < nr_bufs; i++) {
1753 struct sk_buff *skb;
1754 struct rx_desc *rd;
1755 dma_addr_t mapping;
1756
1757 skb = netdev_alloc_skb_ip_align(dev, ACE_JUMBO_BUFSIZE);
1758 if (!skb)
1759 break;
1760
1761 mapping = dma_map_page(&ap->pdev->dev,
1762 virt_to_page(skb->data),
1763 offset_in_page(skb->data),
1764 ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);
1765 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1766 dma_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1767 mapping, mapping);
1768
1769 rd = &ap->rx_jumbo_ring[idx];
1770 set_aceaddr(&rd->addr, mapping);
1771 rd->size = ACE_JUMBO_BUFSIZE;
1772 rd->idx = idx;
1773 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1774 }
1775
1776 if (!i)
1777 goto error_out;
1778
1779 atomic_add(i, &ap->cur_jumbo_bufs);
1780 ap->rx_jumbo_skbprd = idx;
1781
1782 if (ACE_IS_TIGON_I(ap)) {
1783 struct cmd cmd;
1784 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1785 cmd.code = 0;
1786 cmd.idx = ap->rx_jumbo_skbprd;
1787 ace_issue_cmd(regs, &cmd);
1788 } else {
1789 writel(idx, ®s->RxJumboPrd);
1790 wmb();
1791 }
1792
1793 out:
1794 clear_bit(0, &ap->jumbo_refill_busy);
1795 return;
1796 error_out:
1797 if (net_ratelimit())
1798 printk(KERN_INFO "Out of memory when allocating "
1799 "jumbo receive buffers\n");
1800 goto out;
1801}
1802
1803
1804
1805
1806
1807
1808
1809static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1810{
1811 struct ace_private *ap;
1812
1813 ap = netdev_priv(dev);
1814
1815 while (evtcsm != evtprd) {
1816 switch (ap->evt_ring[evtcsm].evt) {
1817 case E_FW_RUNNING:
1818 printk(KERN_INFO "%s: Firmware up and running\n",
1819 ap->name);
1820 ap->fw_running = 1;
1821 wmb();
1822 break;
1823 case E_STATS_UPDATED:
1824 break;
1825 case E_LNK_STATE:
1826 {
1827 u16 code = ap->evt_ring[evtcsm].code;
1828 switch (code) {
1829 case E_C_LINK_UP:
1830 {
1831 u32 state = readl(&ap->regs->GigLnkState);
1832 printk(KERN_WARNING "%s: Optical link UP "
1833 "(%s Duplex, Flow Control: %s%s)\n",
1834 ap->name,
1835 state & LNK_FULL_DUPLEX ? "Full":"Half",
1836 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1837 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1838 break;
1839 }
1840 case E_C_LINK_DOWN:
1841 printk(KERN_WARNING "%s: Optical link DOWN\n",
1842 ap->name);
1843 break;
1844 case E_C_LINK_10_100:
1845 printk(KERN_WARNING "%s: 10/100BaseT link "
1846 "UP\n", ap->name);
1847 break;
1848 default:
1849 printk(KERN_ERR "%s: Unknown optical link "
1850 "state %02x\n", ap->name, code);
1851 }
1852 break;
1853 }
1854 case E_ERROR:
1855 switch(ap->evt_ring[evtcsm].code) {
1856 case E_C_ERR_INVAL_CMD:
1857 printk(KERN_ERR "%s: invalid command error\n",
1858 ap->name);
1859 break;
1860 case E_C_ERR_UNIMP_CMD:
1861 printk(KERN_ERR "%s: unimplemented command "
1862 "error\n", ap->name);
1863 break;
1864 case E_C_ERR_BAD_CFG:
1865 printk(KERN_ERR "%s: bad config error\n",
1866 ap->name);
1867 break;
1868 default:
1869 printk(KERN_ERR "%s: unknown error %02x\n",
1870 ap->name, ap->evt_ring[evtcsm].code);
1871 }
1872 break;
1873 case E_RESET_JUMBO_RNG:
1874 {
1875 int i;
1876 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1877 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1878 ap->rx_jumbo_ring[i].size = 0;
1879 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1880 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1881 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1882 }
1883 }
1884
1885 if (ACE_IS_TIGON_I(ap)) {
1886 struct cmd cmd;
1887 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1888 cmd.code = 0;
1889 cmd.idx = 0;
1890 ace_issue_cmd(ap->regs, &cmd);
1891 } else {
1892 writel(0, &((ap->regs)->RxJumboPrd));
1893 wmb();
1894 }
1895
1896 ap->jumbo = 0;
1897 ap->rx_jumbo_skbprd = 0;
1898 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1899 ap->name);
1900 clear_bit(0, &ap->jumbo_refill_busy);
1901 break;
1902 }
1903 default:
1904 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1905 ap->name, ap->evt_ring[evtcsm].evt);
1906 }
1907 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1908 }
1909
1910 return evtcsm;
1911}
1912
1913
1914static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1915{
1916 struct ace_private *ap = netdev_priv(dev);
1917 u32 idx;
1918 int mini_count = 0, std_count = 0;
1919
1920 idx = rxretcsm;
1921
1922 prefetchw(&ap->cur_rx_bufs);
1923 prefetchw(&ap->cur_mini_bufs);
1924
1925 while (idx != rxretprd) {
1926 struct ring_info *rip;
1927 struct sk_buff *skb;
1928 struct rx_desc *retdesc;
1929 u32 skbidx;
1930 int bd_flags, desc_type, mapsize;
1931 u16 csum;
1932
1933
1934
1935 if (idx == rxretcsm)
1936 rmb();
1937
1938 retdesc = &ap->rx_return_ring[idx];
1939 skbidx = retdesc->idx;
1940 bd_flags = retdesc->flags;
1941 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1942
1943 switch(desc_type) {
1944
1945
1946
1947
1948
1949
1950
1951 case 0:
1952 rip = &ap->skb->rx_std_skbuff[skbidx];
1953 mapsize = ACE_STD_BUFSIZE;
1954 std_count++;
1955 break;
1956 case BD_FLG_JUMBO:
1957 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
1958 mapsize = ACE_JUMBO_BUFSIZE;
1959 atomic_dec(&ap->cur_jumbo_bufs);
1960 break;
1961 case BD_FLG_MINI:
1962 rip = &ap->skb->rx_mini_skbuff[skbidx];
1963 mapsize = ACE_MINI_BUFSIZE;
1964 mini_count++;
1965 break;
1966 default:
1967 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
1968 "returned by NIC\n", dev->name,
1969 retdesc->flags);
1970 goto error;
1971 }
1972
1973 skb = rip->skb;
1974 rip->skb = NULL;
1975 dma_unmap_page(&ap->pdev->dev, dma_unmap_addr(rip, mapping),
1976 mapsize, DMA_FROM_DEVICE);
1977 skb_put(skb, retdesc->size);
1978
1979
1980
1981
1982 csum = retdesc->tcp_udp_csum;
1983
1984 skb->protocol = eth_type_trans(skb, dev);
1985
1986
1987
1988
1989
1990 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
1991 skb->csum = htons(csum);
1992 skb->ip_summed = CHECKSUM_COMPLETE;
1993 } else {
1994 skb_checksum_none_assert(skb);
1995 }
1996
1997
1998 if ((bd_flags & BD_FLG_VLAN_TAG))
1999 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), retdesc->vlan);
2000 netif_rx(skb);
2001
2002 dev->stats.rx_packets++;
2003 dev->stats.rx_bytes += retdesc->size;
2004
2005 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2006 }
2007
2008 atomic_sub(std_count, &ap->cur_rx_bufs);
2009 if (!ACE_IS_TIGON_I(ap))
2010 atomic_sub(mini_count, &ap->cur_mini_bufs);
2011
2012 out:
2013
2014
2015
2016
2017 if (ACE_IS_TIGON_I(ap)) {
2018 writel(idx, &ap->regs->RxRetCsm);
2019 }
2020 ap->cur_rx = idx;
2021
2022 return;
2023 error:
2024 idx = rxretprd;
2025 goto out;
2026}
2027
2028
2029static inline void ace_tx_int(struct net_device *dev,
2030 u32 txcsm, u32 idx)
2031{
2032 struct ace_private *ap = netdev_priv(dev);
2033
2034 do {
2035 struct sk_buff *skb;
2036 struct tx_ring_info *info;
2037
2038 info = ap->skb->tx_skbuff + idx;
2039 skb = info->skb;
2040
2041 if (dma_unmap_len(info, maplen)) {
2042 dma_unmap_page(&ap->pdev->dev,
2043 dma_unmap_addr(info, mapping),
2044 dma_unmap_len(info, maplen),
2045 DMA_TO_DEVICE);
2046 dma_unmap_len_set(info, maplen, 0);
2047 }
2048
2049 if (skb) {
2050 dev->stats.tx_packets++;
2051 dev->stats.tx_bytes += skb->len;
2052 dev_consume_skb_irq(skb);
2053 info->skb = NULL;
2054 }
2055
2056 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2057 } while (idx != txcsm);
2058
2059 if (netif_queue_stopped(dev))
2060 netif_wake_queue(dev);
2061
2062 wmb();
2063 ap->tx_ret_csm = txcsm;
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092}
2093
2094
2095static irqreturn_t ace_interrupt(int irq, void *dev_id)
2096{
2097 struct net_device *dev = (struct net_device *)dev_id;
2098 struct ace_private *ap = netdev_priv(dev);
2099 struct ace_regs __iomem *regs = ap->regs;
2100 u32 idx;
2101 u32 txcsm, rxretcsm, rxretprd;
2102 u32 evtcsm, evtprd;
2103
2104
2105
2106
2107
2108
2109 if (!(readl(®s->HostCtrl) & IN_INT))
2110 return IRQ_NONE;
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120 writel(0, ®s->Mb0Lo);
2121 readl(®s->Mb0Lo);
2122
2123
2124
2125
2126
2127
2128
2129
2130 rxretprd = *ap->rx_ret_prd;
2131 rxretcsm = ap->cur_rx;
2132
2133 if (rxretprd != rxretcsm)
2134 ace_rx_int(dev, rxretprd, rxretcsm);
2135
2136 txcsm = *ap->tx_csm;
2137 idx = ap->tx_ret_csm;
2138
2139 if (txcsm != idx) {
2140
2141
2142
2143
2144
2145
2146
2147 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2148 ace_tx_int(dev, txcsm, idx);
2149 }
2150
2151 evtcsm = readl(®s->EvtCsm);
2152 evtprd = *ap->evt_prd;
2153
2154 if (evtcsm != evtprd) {
2155 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2156 writel(evtcsm, ®s->EvtCsm);
2157 }
2158
2159
2160
2161
2162
2163 if (netif_running(dev)) {
2164 int cur_size;
2165 int run_tasklet = 0;
2166
2167 cur_size = atomic_read(&ap->cur_rx_bufs);
2168 if (cur_size < RX_LOW_STD_THRES) {
2169 if ((cur_size < RX_PANIC_STD_THRES) &&
2170 !test_and_set_bit(0, &ap->std_refill_busy)) {
2171#ifdef DEBUG
2172 printk("low on std buffers %i\n", cur_size);
2173#endif
2174 ace_load_std_rx_ring(dev,
2175 RX_RING_SIZE - cur_size);
2176 } else
2177 run_tasklet = 1;
2178 }
2179
2180 if (!ACE_IS_TIGON_I(ap)) {
2181 cur_size = atomic_read(&ap->cur_mini_bufs);
2182 if (cur_size < RX_LOW_MINI_THRES) {
2183 if ((cur_size < RX_PANIC_MINI_THRES) &&
2184 !test_and_set_bit(0,
2185 &ap->mini_refill_busy)) {
2186#ifdef DEBUG
2187 printk("low on mini buffers %i\n",
2188 cur_size);
2189#endif
2190 ace_load_mini_rx_ring(dev,
2191 RX_MINI_SIZE - cur_size);
2192 } else
2193 run_tasklet = 1;
2194 }
2195 }
2196
2197 if (ap->jumbo) {
2198 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2199 if (cur_size < RX_LOW_JUMBO_THRES) {
2200 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2201 !test_and_set_bit(0,
2202 &ap->jumbo_refill_busy)){
2203#ifdef DEBUG
2204 printk("low on jumbo buffers %i\n",
2205 cur_size);
2206#endif
2207 ace_load_jumbo_rx_ring(dev,
2208 RX_JUMBO_SIZE - cur_size);
2209 } else
2210 run_tasklet = 1;
2211 }
2212 }
2213 if (run_tasklet && !ap->tasklet_pending) {
2214 ap->tasklet_pending = 1;
2215 tasklet_schedule(&ap->ace_tasklet);
2216 }
2217 }
2218
2219 return IRQ_HANDLED;
2220}
2221
2222static int ace_open(struct net_device *dev)
2223{
2224 struct ace_private *ap = netdev_priv(dev);
2225 struct ace_regs __iomem *regs = ap->regs;
2226 struct cmd cmd;
2227
2228 if (!(ap->fw_running)) {
2229 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2230 return -EBUSY;
2231 }
2232
2233 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2234
2235 cmd.evt = C_CLEAR_STATS;
2236 cmd.code = 0;
2237 cmd.idx = 0;
2238 ace_issue_cmd(regs, &cmd);
2239
2240 cmd.evt = C_HOST_STATE;
2241 cmd.code = C_C_STACK_UP;
2242 cmd.idx = 0;
2243 ace_issue_cmd(regs, &cmd);
2244
2245 if (ap->jumbo &&
2246 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2247 ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);
2248
2249 if (dev->flags & IFF_PROMISC) {
2250 cmd.evt = C_SET_PROMISC_MODE;
2251 cmd.code = C_C_PROMISC_ENABLE;
2252 cmd.idx = 0;
2253 ace_issue_cmd(regs, &cmd);
2254
2255 ap->promisc = 1;
2256 }else
2257 ap->promisc = 0;
2258 ap->mcast_all = 0;
2259
2260#if 0
2261 cmd.evt = C_LNK_NEGOTIATION;
2262 cmd.code = 0;
2263 cmd.idx = 0;
2264 ace_issue_cmd(regs, &cmd);
2265#endif
2266
2267 netif_start_queue(dev);
2268
2269
2270
2271
2272 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2273 return 0;
2274}
2275
2276
2277static int ace_close(struct net_device *dev)
2278{
2279 struct ace_private *ap = netdev_priv(dev);
2280 struct ace_regs __iomem *regs = ap->regs;
2281 struct cmd cmd;
2282 unsigned long flags;
2283 short i;
2284
2285
2286
2287
2288
2289
2290 netif_stop_queue(dev);
2291
2292
2293 if (ap->promisc) {
2294 cmd.evt = C_SET_PROMISC_MODE;
2295 cmd.code = C_C_PROMISC_DISABLE;
2296 cmd.idx = 0;
2297 ace_issue_cmd(regs, &cmd);
2298 ap->promisc = 0;
2299 }
2300
2301 cmd.evt = C_HOST_STATE;
2302 cmd.code = C_C_STACK_DOWN;
2303 cmd.idx = 0;
2304 ace_issue_cmd(regs, &cmd);
2305
2306 tasklet_kill(&ap->ace_tasklet);
2307
2308
2309
2310
2311
2312
2313 local_irq_save(flags);
2314 ace_mask_irq(dev);
2315
2316 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2317 struct sk_buff *skb;
2318 struct tx_ring_info *info;
2319
2320 info = ap->skb->tx_skbuff + i;
2321 skb = info->skb;
2322
2323 if (dma_unmap_len(info, maplen)) {
2324 if (ACE_IS_TIGON_I(ap)) {
2325
2326 struct tx_desc __iomem *tx;
2327 tx = (__force struct tx_desc __iomem *) &ap->tx_ring[i];
2328 writel(0, &tx->addr.addrhi);
2329 writel(0, &tx->addr.addrlo);
2330 writel(0, &tx->flagsize);
2331 } else
2332 memset(ap->tx_ring + i, 0,
2333 sizeof(struct tx_desc));
2334 dma_unmap_page(&ap->pdev->dev,
2335 dma_unmap_addr(info, mapping),
2336 dma_unmap_len(info, maplen),
2337 DMA_TO_DEVICE);
2338 dma_unmap_len_set(info, maplen, 0);
2339 }
2340 if (skb) {
2341 dev_kfree_skb(skb);
2342 info->skb = NULL;
2343 }
2344 }
2345
2346 if (ap->jumbo) {
2347 cmd.evt = C_RESET_JUMBO_RNG;
2348 cmd.code = 0;
2349 cmd.idx = 0;
2350 ace_issue_cmd(regs, &cmd);
2351 }
2352
2353 ace_unmask_irq(dev);
2354 local_irq_restore(flags);
2355
2356 return 0;
2357}
2358
2359
2360static inline dma_addr_t
2361ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2362 struct sk_buff *tail, u32 idx)
2363{
2364 dma_addr_t mapping;
2365 struct tx_ring_info *info;
2366
2367 mapping = dma_map_page(&ap->pdev->dev, virt_to_page(skb->data),
2368 offset_in_page(skb->data), skb->len,
2369 DMA_TO_DEVICE);
2370
2371 info = ap->skb->tx_skbuff + idx;
2372 info->skb = tail;
2373 dma_unmap_addr_set(info, mapping, mapping);
2374 dma_unmap_len_set(info, maplen, skb->len);
2375 return mapping;
2376}
2377
2378
2379static inline void
2380ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2381 u32 flagsize, u32 vlan_tag)
2382{
2383#if !USE_TX_COAL_NOW
2384 flagsize &= ~BD_FLG_COAL_NOW;
2385#endif
2386
2387 if (ACE_IS_TIGON_I(ap)) {
2388 struct tx_desc __iomem *io = (__force struct tx_desc __iomem *) desc;
2389 writel(addr >> 32, &io->addr.addrhi);
2390 writel(addr & 0xffffffff, &io->addr.addrlo);
2391 writel(flagsize, &io->flagsize);
2392 writel(vlan_tag, &io->vlanres);
2393 } else {
2394 desc->addr.addrhi = addr >> 32;
2395 desc->addr.addrlo = addr;
2396 desc->flagsize = flagsize;
2397 desc->vlanres = vlan_tag;
2398 }
2399}
2400
2401
2402static netdev_tx_t ace_start_xmit(struct sk_buff *skb,
2403 struct net_device *dev)
2404{
2405 struct ace_private *ap = netdev_priv(dev);
2406 struct ace_regs __iomem *regs = ap->regs;
2407 struct tx_desc *desc;
2408 u32 idx, flagsize;
2409 unsigned long maxjiff = jiffies + 3*HZ;
2410
2411restart:
2412 idx = ap->tx_prd;
2413
2414 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2415 goto overflow;
2416
2417 if (!skb_shinfo(skb)->nr_frags) {
2418 dma_addr_t mapping;
2419 u32 vlan_tag = 0;
2420
2421 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2422 flagsize = (skb->len << 16) | (BD_FLG_END);
2423 if (skb->ip_summed == CHECKSUM_PARTIAL)
2424 flagsize |= BD_FLG_TCP_UDP_SUM;
2425 if (skb_vlan_tag_present(skb)) {
2426 flagsize |= BD_FLG_VLAN_TAG;
2427 vlan_tag = skb_vlan_tag_get(skb);
2428 }
2429 desc = ap->tx_ring + idx;
2430 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2431
2432
2433 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2434 flagsize |= BD_FLG_COAL_NOW;
2435
2436 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2437 } else {
2438 dma_addr_t mapping;
2439 u32 vlan_tag = 0;
2440 int i, len = 0;
2441
2442 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2443 flagsize = (skb_headlen(skb) << 16);
2444 if (skb->ip_summed == CHECKSUM_PARTIAL)
2445 flagsize |= BD_FLG_TCP_UDP_SUM;
2446 if (skb_vlan_tag_present(skb)) {
2447 flagsize |= BD_FLG_VLAN_TAG;
2448 vlan_tag = skb_vlan_tag_get(skb);
2449 }
2450
2451 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2452
2453 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2454
2455 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2456 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2457 struct tx_ring_info *info;
2458
2459 len += skb_frag_size(frag);
2460 info = ap->skb->tx_skbuff + idx;
2461 desc = ap->tx_ring + idx;
2462
2463 mapping = skb_frag_dma_map(&ap->pdev->dev, frag, 0,
2464 skb_frag_size(frag),
2465 DMA_TO_DEVICE);
2466
2467 flagsize = skb_frag_size(frag) << 16;
2468 if (skb->ip_summed == CHECKSUM_PARTIAL)
2469 flagsize |= BD_FLG_TCP_UDP_SUM;
2470 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2471
2472 if (i == skb_shinfo(skb)->nr_frags - 1) {
2473 flagsize |= BD_FLG_END;
2474 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2475 flagsize |= BD_FLG_COAL_NOW;
2476
2477
2478
2479
2480
2481 info->skb = skb;
2482 } else {
2483 info->skb = NULL;
2484 }
2485 dma_unmap_addr_set(info, mapping, mapping);
2486 dma_unmap_len_set(info, maplen, skb_frag_size(frag));
2487 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2488 }
2489 }
2490
2491 wmb();
2492 ap->tx_prd = idx;
2493 ace_set_txprd(regs, ap, idx);
2494
2495 if (flagsize & BD_FLG_COAL_NOW) {
2496 netif_stop_queue(dev);
2497
2498
2499
2500
2501
2502
2503
2504 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2505 netif_wake_queue(dev);
2506 }
2507
2508 return NETDEV_TX_OK;
2509
2510overflow:
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527 if (time_before(jiffies, maxjiff)) {
2528 barrier();
2529 cpu_relax();
2530 goto restart;
2531 }
2532
2533
2534 printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2535 return NETDEV_TX_BUSY;
2536}
2537
2538
2539static int ace_change_mtu(struct net_device *dev, int new_mtu)
2540{
2541 struct ace_private *ap = netdev_priv(dev);
2542 struct ace_regs __iomem *regs = ap->regs;
2543
2544 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2545 dev->mtu = new_mtu;
2546
2547 if (new_mtu > ACE_STD_MTU) {
2548 if (!(ap->jumbo)) {
2549 printk(KERN_INFO "%s: Enabling Jumbo frame "
2550 "support\n", dev->name);
2551 ap->jumbo = 1;
2552 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2553 ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE);
2554 ace_set_rxtx_parms(dev, 1);
2555 }
2556 } else {
2557 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2558 ace_sync_irq(dev->irq);
2559 ace_set_rxtx_parms(dev, 0);
2560 if (ap->jumbo) {
2561 struct cmd cmd;
2562
2563 cmd.evt = C_RESET_JUMBO_RNG;
2564 cmd.code = 0;
2565 cmd.idx = 0;
2566 ace_issue_cmd(regs, &cmd);
2567 }
2568 }
2569
2570 return 0;
2571}
2572
2573static int ace_get_link_ksettings(struct net_device *dev,
2574 struct ethtool_link_ksettings *cmd)
2575{
2576 struct ace_private *ap = netdev_priv(dev);
2577 struct ace_regs __iomem *regs = ap->regs;
2578 u32 link;
2579 u32 supported;
2580
2581 memset(cmd, 0, sizeof(struct ethtool_link_ksettings));
2582
2583 supported = (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2584 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2585 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2586 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2587
2588 cmd->base.port = PORT_FIBRE;
2589
2590 link = readl(®s->GigLnkState);
2591 if (link & LNK_1000MB) {
2592 cmd->base.speed = SPEED_1000;
2593 } else {
2594 link = readl(®s->FastLnkState);
2595 if (link & LNK_100MB)
2596 cmd->base.speed = SPEED_100;
2597 else if (link & LNK_10MB)
2598 cmd->base.speed = SPEED_10;
2599 else
2600 cmd->base.speed = 0;
2601 }
2602 if (link & LNK_FULL_DUPLEX)
2603 cmd->base.duplex = DUPLEX_FULL;
2604 else
2605 cmd->base.duplex = DUPLEX_HALF;
2606
2607 if (link & LNK_NEGOTIATE)
2608 cmd->base.autoneg = AUTONEG_ENABLE;
2609 else
2610 cmd->base.autoneg = AUTONEG_DISABLE;
2611
2612#if 0
2613
2614
2615
2616 ecmd->trace = readl(®s->TuneTrace);
2617
2618 ecmd->txcoal = readl(®s->TuneTxCoalTicks);
2619 ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
2620#endif
2621
2622 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
2623 supported);
2624
2625 return 0;
2626}
2627
2628static int ace_set_link_ksettings(struct net_device *dev,
2629 const struct ethtool_link_ksettings *cmd)
2630{
2631 struct ace_private *ap = netdev_priv(dev);
2632 struct ace_regs __iomem *regs = ap->regs;
2633 u32 link, speed;
2634
2635 link = readl(®s->GigLnkState);
2636 if (link & LNK_1000MB)
2637 speed = SPEED_1000;
2638 else {
2639 link = readl(®s->FastLnkState);
2640 if (link & LNK_100MB)
2641 speed = SPEED_100;
2642 else if (link & LNK_10MB)
2643 speed = SPEED_10;
2644 else
2645 speed = SPEED_100;
2646 }
2647
2648 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2649 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2650 if (!ACE_IS_TIGON_I(ap))
2651 link |= LNK_TX_FLOW_CTL_Y;
2652 if (cmd->base.autoneg == AUTONEG_ENABLE)
2653 link |= LNK_NEGOTIATE;
2654 if (cmd->base.speed != speed) {
2655 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2656 switch (cmd->base.speed) {
2657 case SPEED_1000:
2658 link |= LNK_1000MB;
2659 break;
2660 case SPEED_100:
2661 link |= LNK_100MB;
2662 break;
2663 case SPEED_10:
2664 link |= LNK_10MB;
2665 break;
2666 }
2667 }
2668
2669 if (cmd->base.duplex == DUPLEX_FULL)
2670 link |= LNK_FULL_DUPLEX;
2671
2672 if (link != ap->link) {
2673 struct cmd cmd;
2674 printk(KERN_INFO "%s: Renegotiating link state\n",
2675 dev->name);
2676
2677 ap->link = link;
2678 writel(link, ®s->TuneLink);
2679 if (!ACE_IS_TIGON_I(ap))
2680 writel(link, ®s->TuneFastLink);
2681 wmb();
2682
2683 cmd.evt = C_LNK_NEGOTIATION;
2684 cmd.code = 0;
2685 cmd.idx = 0;
2686 ace_issue_cmd(regs, &cmd);
2687 }
2688 return 0;
2689}
2690
2691static void ace_get_drvinfo(struct net_device *dev,
2692 struct ethtool_drvinfo *info)
2693{
2694 struct ace_private *ap = netdev_priv(dev);
2695
2696 strlcpy(info->driver, "acenic", sizeof(info->driver));
2697 snprintf(info->fw_version, sizeof(info->version), "%i.%i.%i",
2698 ap->firmware_major, ap->firmware_minor, ap->firmware_fix);
2699
2700 if (ap->pdev)
2701 strlcpy(info->bus_info, pci_name(ap->pdev),
2702 sizeof(info->bus_info));
2703
2704}
2705
2706
2707
2708
2709static int ace_set_mac_addr(struct net_device *dev, void *p)
2710{
2711 struct ace_private *ap = netdev_priv(dev);
2712 struct ace_regs __iomem *regs = ap->regs;
2713 struct sockaddr *addr=p;
2714 u8 *da;
2715 struct cmd cmd;
2716
2717 if(netif_running(dev))
2718 return -EBUSY;
2719
2720 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2721
2722 da = (u8 *)dev->dev_addr;
2723
2724 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2725 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2726 ®s->MacAddrLo);
2727
2728 cmd.evt = C_SET_MAC_ADDR;
2729 cmd.code = 0;
2730 cmd.idx = 0;
2731 ace_issue_cmd(regs, &cmd);
2732
2733 return 0;
2734}
2735
2736
2737static void ace_set_multicast_list(struct net_device *dev)
2738{
2739 struct ace_private *ap = netdev_priv(dev);
2740 struct ace_regs __iomem *regs = ap->regs;
2741 struct cmd cmd;
2742
2743 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2744 cmd.evt = C_SET_MULTICAST_MODE;
2745 cmd.code = C_C_MCAST_ENABLE;
2746 cmd.idx = 0;
2747 ace_issue_cmd(regs, &cmd);
2748 ap->mcast_all = 1;
2749 } else if (ap->mcast_all) {
2750 cmd.evt = C_SET_MULTICAST_MODE;
2751 cmd.code = C_C_MCAST_DISABLE;
2752 cmd.idx = 0;
2753 ace_issue_cmd(regs, &cmd);
2754 ap->mcast_all = 0;
2755 }
2756
2757 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2758 cmd.evt = C_SET_PROMISC_MODE;
2759 cmd.code = C_C_PROMISC_ENABLE;
2760 cmd.idx = 0;
2761 ace_issue_cmd(regs, &cmd);
2762 ap->promisc = 1;
2763 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2764 cmd.evt = C_SET_PROMISC_MODE;
2765 cmd.code = C_C_PROMISC_DISABLE;
2766 cmd.idx = 0;
2767 ace_issue_cmd(regs, &cmd);
2768 ap->promisc = 0;
2769 }
2770
2771
2772
2773
2774
2775
2776
2777 if (!netdev_mc_empty(dev) && !ap->mcast_all) {
2778 cmd.evt = C_SET_MULTICAST_MODE;
2779 cmd.code = C_C_MCAST_ENABLE;
2780 cmd.idx = 0;
2781 ace_issue_cmd(regs, &cmd);
2782 }else if (!ap->mcast_all) {
2783 cmd.evt = C_SET_MULTICAST_MODE;
2784 cmd.code = C_C_MCAST_DISABLE;
2785 cmd.idx = 0;
2786 ace_issue_cmd(regs, &cmd);
2787 }
2788}
2789
2790
2791static struct net_device_stats *ace_get_stats(struct net_device *dev)
2792{
2793 struct ace_private *ap = netdev_priv(dev);
2794 struct ace_mac_stats __iomem *mac_stats =
2795 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2796
2797 dev->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2798 dev->stats.multicast = readl(&mac_stats->kept_mc);
2799 dev->stats.collisions = readl(&mac_stats->coll);
2800
2801 return &dev->stats;
2802}
2803
2804
2805static void ace_copy(struct ace_regs __iomem *regs, const __be32 *src,
2806 u32 dest, int size)
2807{
2808 void __iomem *tdest;
2809 short tsize, i;
2810
2811 if (size <= 0)
2812 return;
2813
2814 while (size > 0) {
2815 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2816 min_t(u32, size, ACE_WINDOW_SIZE));
2817 tdest = (void __iomem *) ®s->Window +
2818 (dest & (ACE_WINDOW_SIZE - 1));
2819 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2820 for (i = 0; i < (tsize / 4); i++) {
2821
2822 writel(be32_to_cpup(src), tdest);
2823 src++;
2824 tdest += 4;
2825 dest += 4;
2826 size -= 4;
2827 }
2828 }
2829}
2830
2831
2832static void ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2833{
2834 void __iomem *tdest;
2835 short tsize = 0, i;
2836
2837 if (size <= 0)
2838 return;
2839
2840 while (size > 0) {
2841 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2842 min_t(u32, size, ACE_WINDOW_SIZE));
2843 tdest = (void __iomem *) ®s->Window +
2844 (dest & (ACE_WINDOW_SIZE - 1));
2845 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2846
2847 for (i = 0; i < (tsize / 4); i++) {
2848 writel(0, tdest + i*4);
2849 }
2850
2851 dest += tsize;
2852 size -= tsize;
2853 }
2854}
2855
2856
2857
2858
2859
2860
2861
2862
2863static int ace_load_firmware(struct net_device *dev)
2864{
2865 const struct firmware *fw;
2866 const char *fw_name = "acenic/tg2.bin";
2867 struct ace_private *ap = netdev_priv(dev);
2868 struct ace_regs __iomem *regs = ap->regs;
2869 const __be32 *fw_data;
2870 u32 load_addr;
2871 int ret;
2872
2873 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
2874 printk(KERN_ERR "%s: trying to download firmware while the "
2875 "CPU is running!\n", ap->name);
2876 return -EFAULT;
2877 }
2878
2879 if (ACE_IS_TIGON_I(ap))
2880 fw_name = "acenic/tg1.bin";
2881
2882 ret = request_firmware(&fw, fw_name, &ap->pdev->dev);
2883 if (ret) {
2884 printk(KERN_ERR "%s: Failed to load firmware \"%s\"\n",
2885 ap->name, fw_name);
2886 return ret;
2887 }
2888
2889 fw_data = (void *)fw->data;
2890
2891
2892
2893
2894
2895
2896 ap->firmware_major = fw->data[0];
2897 ap->firmware_minor = fw->data[1];
2898 ap->firmware_fix = fw->data[2];
2899
2900 ap->firmware_start = be32_to_cpu(fw_data[1]);
2901 if (ap->firmware_start < 0x4000 || ap->firmware_start >= 0x80000) {
2902 printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2903 ap->name, ap->firmware_start, fw_name);
2904 ret = -EINVAL;
2905 goto out;
2906 }
2907
2908 load_addr = be32_to_cpu(fw_data[2]);
2909 if (load_addr < 0x4000 || load_addr >= 0x80000) {
2910 printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2911 ap->name, load_addr, fw_name);
2912 ret = -EINVAL;
2913 goto out;
2914 }
2915
2916
2917
2918
2919
2920 ace_clear(regs, 0x2000, 0x80000-0x2000);
2921 ace_copy(regs, &fw_data[3], load_addr, fw->size-12);
2922 out:
2923 release_firmware(fw);
2924 return ret;
2925}
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943static void eeprom_start(struct ace_regs __iomem *regs)
2944{
2945 u32 local;
2946
2947 readl(®s->LocalCtrl);
2948 udelay(ACE_SHORT_DELAY);
2949 local = readl(®s->LocalCtrl);
2950 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
2951 writel(local, ®s->LocalCtrl);
2952 readl(®s->LocalCtrl);
2953 mb();
2954 udelay(ACE_SHORT_DELAY);
2955 local |= EEPROM_CLK_OUT;
2956 writel(local, ®s->LocalCtrl);
2957 readl(®s->LocalCtrl);
2958 mb();
2959 udelay(ACE_SHORT_DELAY);
2960 local &= ~EEPROM_DATA_OUT;
2961 writel(local, ®s->LocalCtrl);
2962 readl(®s->LocalCtrl);
2963 mb();
2964 udelay(ACE_SHORT_DELAY);
2965 local &= ~EEPROM_CLK_OUT;
2966 writel(local, ®s->LocalCtrl);
2967 readl(®s->LocalCtrl);
2968 mb();
2969}
2970
2971
2972static void eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
2973{
2974 short i;
2975 u32 local;
2976
2977 udelay(ACE_SHORT_DELAY);
2978 local = readl(®s->LocalCtrl);
2979 local &= ~EEPROM_DATA_OUT;
2980 local |= EEPROM_WRITE_ENABLE;
2981 writel(local, ®s->LocalCtrl);
2982 readl(®s->LocalCtrl);
2983 mb();
2984
2985 for (i = 0; i < 8; i++, magic <<= 1) {
2986 udelay(ACE_SHORT_DELAY);
2987 if (magic & 0x80)
2988 local |= EEPROM_DATA_OUT;
2989 else
2990 local &= ~EEPROM_DATA_OUT;
2991 writel(local, ®s->LocalCtrl);
2992 readl(®s->LocalCtrl);
2993 mb();
2994
2995 udelay(ACE_SHORT_DELAY);
2996 local |= EEPROM_CLK_OUT;
2997 writel(local, ®s->LocalCtrl);
2998 readl(®s->LocalCtrl);
2999 mb();
3000 udelay(ACE_SHORT_DELAY);
3001 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3002 writel(local, ®s->LocalCtrl);
3003 readl(®s->LocalCtrl);
3004 mb();
3005 }
3006}
3007
3008
3009static int eeprom_check_ack(struct ace_regs __iomem *regs)
3010{
3011 int state;
3012 u32 local;
3013
3014 local = readl(®s->LocalCtrl);
3015 local &= ~EEPROM_WRITE_ENABLE;
3016 writel(local, ®s->LocalCtrl);
3017 readl(®s->LocalCtrl);
3018 mb();
3019 udelay(ACE_LONG_DELAY);
3020 local |= EEPROM_CLK_OUT;
3021 writel(local, ®s->LocalCtrl);
3022 readl(®s->LocalCtrl);
3023 mb();
3024 udelay(ACE_SHORT_DELAY);
3025
3026 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3027 udelay(ACE_SHORT_DELAY);
3028 mb();
3029 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3030 readl(®s->LocalCtrl);
3031 mb();
3032
3033 return state;
3034}
3035
3036
3037static void eeprom_stop(struct ace_regs __iomem *regs)
3038{
3039 u32 local;
3040
3041 udelay(ACE_SHORT_DELAY);
3042 local = readl(®s->LocalCtrl);
3043 local |= EEPROM_WRITE_ENABLE;
3044 writel(local, ®s->LocalCtrl);
3045 readl(®s->LocalCtrl);
3046 mb();
3047 udelay(ACE_SHORT_DELAY);
3048 local &= ~EEPROM_DATA_OUT;
3049 writel(local, ®s->LocalCtrl);
3050 readl(®s->LocalCtrl);
3051 mb();
3052 udelay(ACE_SHORT_DELAY);
3053 local |= EEPROM_CLK_OUT;
3054 writel(local, ®s->LocalCtrl);
3055 readl(®s->LocalCtrl);
3056 mb();
3057 udelay(ACE_SHORT_DELAY);
3058 local |= EEPROM_DATA_OUT;
3059 writel(local, ®s->LocalCtrl);
3060 readl(®s->LocalCtrl);
3061 mb();
3062 udelay(ACE_LONG_DELAY);
3063 local &= ~EEPROM_CLK_OUT;
3064 writel(local, ®s->LocalCtrl);
3065 mb();
3066}
3067
3068
3069
3070
3071
3072static int read_eeprom_byte(struct net_device *dev, unsigned long offset)
3073{
3074 struct ace_private *ap = netdev_priv(dev);
3075 struct ace_regs __iomem *regs = ap->regs;
3076 unsigned long flags;
3077 u32 local;
3078 int result = 0;
3079 short i;
3080
3081
3082
3083
3084
3085 local_irq_save(flags);
3086
3087 eeprom_start(regs);
3088
3089 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3090 if (eeprom_check_ack(regs)) {
3091 local_irq_restore(flags);
3092 printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3093 result = -EIO;
3094 goto eeprom_read_error;
3095 }
3096
3097 eeprom_prep(regs, (offset >> 8) & 0xff);
3098 if (eeprom_check_ack(regs)) {
3099 local_irq_restore(flags);
3100 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3101 ap->name);
3102 result = -EIO;
3103 goto eeprom_read_error;
3104 }
3105
3106 eeprom_prep(regs, offset & 0xff);
3107 if (eeprom_check_ack(regs)) {
3108 local_irq_restore(flags);
3109 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3110 ap->name);
3111 result = -EIO;
3112 goto eeprom_read_error;
3113 }
3114
3115 eeprom_start(regs);
3116 eeprom_prep(regs, EEPROM_READ_SELECT);
3117 if (eeprom_check_ack(regs)) {
3118 local_irq_restore(flags);
3119 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3120 ap->name);
3121 result = -EIO;
3122 goto eeprom_read_error;
3123 }
3124
3125 for (i = 0; i < 8; i++) {
3126 local = readl(®s->LocalCtrl);
3127 local &= ~EEPROM_WRITE_ENABLE;
3128 writel(local, ®s->LocalCtrl);
3129 readl(®s->LocalCtrl);
3130 udelay(ACE_LONG_DELAY);
3131 mb();
3132 local |= EEPROM_CLK_OUT;
3133 writel(local, ®s->LocalCtrl);
3134 readl(®s->LocalCtrl);
3135 mb();
3136 udelay(ACE_SHORT_DELAY);
3137
3138 result = (result << 1) |
3139 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3140 udelay(ACE_SHORT_DELAY);
3141 mb();
3142 local = readl(®s->LocalCtrl);
3143 local &= ~EEPROM_CLK_OUT;
3144 writel(local, ®s->LocalCtrl);
3145 readl(®s->LocalCtrl);
3146 udelay(ACE_SHORT_DELAY);
3147 mb();
3148 if (i == 7) {
3149 local |= EEPROM_WRITE_ENABLE;
3150 writel(local, ®s->LocalCtrl);
3151 readl(®s->LocalCtrl);
3152 mb();
3153 udelay(ACE_SHORT_DELAY);
3154 }
3155 }
3156
3157 local |= EEPROM_DATA_OUT;
3158 writel(local, ®s->LocalCtrl);
3159 readl(®s->LocalCtrl);
3160 mb();
3161 udelay(ACE_SHORT_DELAY);
3162 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3163 readl(®s->LocalCtrl);
3164 udelay(ACE_LONG_DELAY);
3165 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3166 readl(®s->LocalCtrl);
3167 mb();
3168 udelay(ACE_SHORT_DELAY);
3169 eeprom_stop(regs);
3170
3171 local_irq_restore(flags);
3172 out:
3173 return result;
3174
3175 eeprom_read_error:
3176 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3177 ap->name, offset);
3178 goto out;
3179}
3180
3181module_pci_driver(acenic_pci_driver);
3182